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Apr 7 2016, 1:13 AM (197 w, 4 d)

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Oct 11 2019

• qshanz committed rL374524: [TableGen] Fix a bug that MCSchedClassDesc is interfered between different….
[TableGen] Fix a bug that MCSchedClassDesc is interfered between different…
Oct 11 2019, 1:37 AM

Sep 2 2019

• qshanz committed rL370632: Request commit access for qshanz.
Request commit access for qshanz
Sep 2 2019, 2:27 AM

Jul 4 2019

• qshanz committed rL365110: [NFC][PowerPC] Make the PowerPC scheduling strategy feature only control the….
[NFC][PowerPC] Make the PowerPC scheduling strategy feature only control the…
Jul 4 2019, 12:45 AM

Jul 1 2019

• qshanz committed rL364886: [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook.
[PowerPC] Implement the areMemAccessesTriviallyDisjoint hook
Jul 1 2019, 8:29 PM
• qshanz closed D63804: [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook.
Jul 1 2019, 8:29 PM · Restricted Project

Jun 25 2019

• qshanz committed rL364382: Teach the DAGCombine to fold this pattern(c1 and c2 is constant)..
Teach the DAGCombine to fold this pattern(c1 and c2 is constant).
Jun 25 2019, 10:13 PM
• qshanz closed D63318: [DAGCombine] Teach DAGCombine to fold the aext + select pattern.
Jun 25 2019, 10:13 PM · Restricted Project

Jun 9 2019

• qshanz committed rL362921: [DAGCombine] Match a pattern where a wide type scalar value is stored by….
[DAGCombine] Match a pattern where a wide type scalar value is stored by…
Jun 9 2019, 10:37 PM
• qshanz closed D62897: [DAGCombine] Initialize the bytes offset vector as INT64_MAX to avoid inference the endian check.
Jun 9 2019, 10:37 PM · Restricted Project

Jun 4 2019

• qshanz committed rL362472: [DAGCombine] Match a pattern where a wide type scalar value is stored by….
[DAGCombine] Match a pattern where a wide type scalar value is stored by…
Jun 4 2019, 1:51 AM
• qshanz closed D61843: [DAGCombine] Match a pattern where a wide type scalar value is stored by several narrow stores.
Jun 4 2019, 1:51 AM · Restricted Project
• qshanz committed rL362471: [NFC] Update the test to check the endianness after the CodeGenPrepare instead….
[NFC] Update the test to check the endianness after the CodeGenPrepare instead…
Jun 4 2019, 1:44 AM

May 23 2019

• qshanz committed rL361600: [Power9] Add a specific heuristic to schedule the addi before the load.
[Power9] Add a specific heuristic to schedule the addi before the load
May 23 2019, 10:28 PM
• qshanz closed D61930: [Power9] Add a specific heuristic to schedule the addi before the load.
May 23 2019, 10:28 PM · Restricted Project

May 20 2019

• qshanz committed rL361221: [NFC][PowerPC] Add a test to verify if the scheduler schedule the addi before….
[NFC][PowerPC] Add a test to verify if the scheduler schedule the addi before…
May 20 2019, 11:30 PM

May 8 2019

• qshanz committed rL360229: [NFC][PowerPC] Add test for store combine optimization..
[NFC][PowerPC] Add test for store combine optimization.
May 8 2019, 12:56 AM
• qshanz committed rL360228: [CodeGenPrepare] Don't split the store if it is volatile.
[CodeGenPrepare] Don't split the store if it is volatile
May 8 2019, 12:30 AM
• qshanz closed D61169: [CodeGenPrepare] Don't split the store if it is volatile.
May 8 2019, 12:30 AM · Restricted Project
• qshanz committed rL360226: [NFC] Add a static function to do the endian check.
[NFC] Add a static function to do the endian check
May 8 2019, 12:21 AM
• qshanz closed D61236: [NFC] Add a static function to do the endian check.
May 8 2019, 12:21 AM · Restricted Project

Mar 26 2019

• qshanz committed rL357047: [NFC][PowerPC] Custom PowerPC specific machine-scheduler.
[NFC][PowerPC] Custom PowerPC specific machine-scheduler
Mar 26 2019, 8:49 PM
• qshanz closed D59284: [NFC][PowerPC] Custom PowerPC specific machine-scheduler.
Mar 26 2019, 8:49 PM · Restricted Project

Mar 5 2019

• qshanz committed rL355475: [NFC] Declare the member data of class PostGenericScheduler as "protected"….
[NFC] Declare the member data of class PostGenericScheduler as "protected"…
Mar 5 2019, 6:38 PM
• qshanz closed D58949: [NFC] Declare the member data of class PostGenericScheduler as "protected" instead of "private".
Mar 5 2019, 6:38 PM · Restricted Project

Jan 2 2019

• qshanz committed rL350285: [Power9] Enable the Out-of-Order scheduling model for P9 hw.
[Power9] Enable the Out-of-Order scheduling model for P9 hw
Jan 2 2019, 9:08 PM
• qshanz closed D55810: [Power9] Enable the Out-of-Order scheduling model for P9 hw.
Jan 2 2019, 9:08 PM

Dec 27 2018

• qshanz committed rL350115: [PowerPC] Remove the implicit use of the register if it is replaced by Imm.
[PowerPC] Remove the implicit use of the register if it is replaced by Imm
Dec 27 2018, 7:41 PM
• qshanz closed D56078: [PowerPC] Remove the implicit use of the register if it is replaced by Imm.
Dec 27 2018, 7:41 PM

Dec 17 2018

• qshanz committed rL349443: [NFC] Add new test to cover the lhs scheduling issue for P9..
[NFC] Add new test to cover the lhs scheduling issue for P9.
Dec 17 2018, 10:37 PM
• qshanz committed rL349439: [NFC] fix test case issue that with wrong label check..
[NFC] fix test case issue that with wrong label check.
Dec 17 2018, 8:29 PM

Dec 2 2018

• qshanz committed rL348108: [NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global is….
[NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global is…
Dec 2 2018, 7:35 PM
• qshanz closed D54925: [NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global is accessed as got-indirect or not..
Dec 2 2018, 7:35 PM

Oct 9 2018

• qshanz committed rL344109: [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8.
[PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8
Oct 9 2018, 7:35 PM
• qshanz closed D52449: [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8.
Oct 9 2018, 7:35 PM

Sep 19 2018

• qshanz committed rC342614: [PowerPC] [Clang] Add vector int128 pack/unpack builtins.
[PowerPC] [Clang] Add vector int128 pack/unpack builtins
Sep 19 2018, 10:07 PM
• qshanz committed rL342614: [PowerPC] [Clang] Add vector int128 pack/unpack builtins.
[PowerPC] [Clang] Add vector int128 pack/unpack builtins
Sep 19 2018, 10:07 PM
• qshanz closed D52074: [PowerPC] [Clang] Add vector int128 pack/unpack builtins.
Sep 19 2018, 10:07 PM
• qshanz committed rL342611: [PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1.
[PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1
Sep 19 2018, 8:12 PM
• qshanz closed D52072: [PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1.
Sep 19 2018, 8:12 PM

Sep 17 2018

• qshanz committed rL342441: [PowerPC] Add Itineraries of IIC_IntMulHD for P7/P8.
[PowerPC] Add Itineraries of IIC_IntMulHD for P7/P8
Sep 17 2018, 7:06 PM
• qshanz closed D52040: [PowerPC] Add Itineraries of IIC_IntMulHD for P7/P8 .
Sep 17 2018, 7:06 PM
• qshanz committed rL342440: [PowerPC][NFC] Add a mulld testcase for scheduling check..
[PowerPC][NFC] Add a mulld testcase for scheduling check.
Sep 17 2018, 7:00 PM
• qshanz closed D52039: [PowerPC][NFC] Add a mulld testcase for scheduling check..
Sep 17 2018, 7:00 PM

Sep 7 2018

• qshanz committed rL341634: [PowerPC] Combine ADD to ADDZE.
[PowerPC] Combine ADD to ADDZE
Sep 7 2018, 12:57 AM
• qshanz closed D51403: [PowerPC] Combine ADD to ADDZE.
Sep 7 2018, 12:57 AM

Sep 2 2018

• qshanz committed rL341293: [PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8.
[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8
Sep 2 2018, 8:16 PM
• qshanz closed D51506: [PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8 .
Sep 2 2018, 8:16 PM

Aug 19 2018

• qshanz committed rL340149: [PowerPC] Add a peephole post RA to transform the inst that fed by add.
[PowerPC] Add a peephole post RA to transform the inst that fed by add
Aug 19 2018, 7:54 PM
• qshanz closed D49007: [PowerPC] Add a peephole post RA to transform the inst that fed by add.
Aug 19 2018, 7:53 PM

Jul 1 2018

• qshanz committed rL336074: [PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multiple….
[PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multiple…
Jul 1 2018, 10:51 PM
• qshanz closed D48813: [PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multiple for i64 pre-inc load/store.
Jul 1 2018, 10:51 PM

Jun 18 2018

• qshanz committed rL335024: If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction….
If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction…
Jun 18 2018, 11:59 PM
• qshanz closed D47568: [Power9] Do the add-imm peephole for pseudo instruction DFLOADf32/DFLOADf64 and the store pair.
Jun 18 2018, 11:59 PM

Jun 15 2018

• qshanz committed rL334808: add myself to the CREDITS.TXT.
add myself to the CREDITS.TXT
Jun 15 2018, 1:39 AM