[WebAssembly] Massive instruction renaming

[tlively]

Summary

An automated renaming of all the instructions listed at
https://github.com/WebAssembly/spec/issues/884#issuecomment-426433329
as well as some similarly-named identifiers.

[aardappel]

I'm fine with this, though it is not obvious to me from the associated github issue that consensus was reached.. can you point me in the right direction?

[tlively]

In D56338#1348396, @aardappel wrote:

I'm fine with this, though it is not obvious to me from the associated github issue that consensus was reached.. can you point me in the right direction?

https://github.com/WebAssembly/spec/issues/884#issuecomment-447518428 I don't think there was a formal consensus but the changes were landed in the spec.

llvm/trunk/include/llvm/BinaryFormat/Wasm.h

 
 // Type immediate encodings used in various contexts.
 enum : unsigned {
   WASM_TYPE_I32 = 0x7F,
   WASM_TYPE_I64 = 0x7E,
   WASM_TYPE_F32 = 0x7D,
   WASM_TYPE_F64 = 0x7C,
   WASM_TYPE_V128 = 0x7B,
-  WASM_TYPE_ANYFUNC = 0x70,
+  WASM_TYPE_FUNCREF = 0x70,
   WASM_TYPE_EXCEPT_REF = 0x68,
   WASM_TYPE_FUNC = 0x60,
   WASM_TYPE_NORESULT = 0x40, // for blocks with no result values
 };
 
 // Kinds of externals (for imports and exports).
 enum : unsigned {
   WASM_EXTERNAL_FUNCTION = 0x0,
   WASM_EXTERNAL_TABLE = 0x1,
   WASM_EXTERNAL_MEMORY = 0x2,
   WASM_EXTERNAL_GLOBAL = 0x3,
   WASM_EXTERNAL_EVENT = 0x4,
 };
 
 // Opcodes used in initializer expressions.
 enum : unsigned {
   WASM_OPCODE_END = 0x0b,
-  WASM_OPCODE_GET_GLOBAL = 0x23,
+  WASM_OPCODE_GLOBAL_GET = 0x23,
   WASM_OPCODE_I32_CONST = 0x41,
   WASM_OPCODE_I64_CONST = 0x42,
   WASM_OPCODE_F32_CONST = 0x43,
   WASM_OPCODE_F64_CONST = 0x44,
 };
 
 enum : unsigned {
   WASM_LIMITS_FLAG_HAS_MAX = 0x1,

llvm/trunk/lib/MC/WasmObjectWriter.cpp

uint64_t WasmObjectWriter::writeObject(MCAssembler &Asm,
   // valid without it. In the future, we could perhaps be more clever and omit
   // it if there are no indirect calls.
   MCSymbolWasm *TableSym =
       cast<MCSymbolWasm>(Ctx.getOrCreateSymbol("__indirect_function_table"));
   wasm::WasmImport TableImport;
   TableImport.Module = TableSym->getModuleName();
   TableImport.Field = TableSym->getName();
   TableImport.Kind = wasm::WASM_EXTERNAL_TABLE;
-  TableImport.Table.ElemType = wasm::WASM_TYPE_ANYFUNC;
+  TableImport.Table.ElemType = wasm::WASM_TYPE_FUNCREF;
   Imports.push_back(TableImport);
 
   // Populate SignatureIndices, and Imports and WasmIndices for undefined
   // symbols.  This must be done before populating WasmIndices for defined
   // symbols.
   for (const MCSymbol &S : Asm.symbols()) {
     const auto &WS = static_cast<const MCSymbolWasm &>(S);
 

llvm/trunk/lib/Object/WasmObjectFile.cpp

case wasm::WASM_OPCODE_I64_CONST:
     Expr.Value.Int64 = readVarint64(Ctx);
     break;
   case wasm::WASM_OPCODE_F32_CONST:
     Expr.Value.Float32 = readFloat32(Ctx);
     break;
   case wasm::WASM_OPCODE_F64_CONST:
     Expr.Value.Float64 = readFloat64(Ctx);
     break;
-  case wasm::WASM_OPCODE_GET_GLOBAL:
+  case wasm::WASM_OPCODE_GLOBAL_GET:
     Expr.Value.Global = readULEB128(Ctx);
     break;
   default:
     return make_error<GenericBinaryError>("Invalid opcode in init_expr",
                                           object_error::parse_failed);
   }
 
   uint8_t EndOpcode = readOpcode(Ctx);
case wasm::WASM_EXTERNAL_GLOBAL:
       Im.Global.Type = readUint8(Ctx);
       Im.Global.Mutable = readVaruint1(Ctx);
       break;
     case wasm::WASM_EXTERNAL_MEMORY:
       Im.Memory = readLimits(Ctx);
       break;
     case wasm::WASM_EXTERNAL_TABLE:
       Im.Table = readTable(Ctx);
-      if (Im.Table.ElemType != wasm::WASM_TYPE_ANYFUNC)
+      if (Im.Table.ElemType != wasm::WASM_TYPE_FUNCREF)
         return make_error<GenericBinaryError>("Invalid table element type",
                                               object_error::parse_failed);
       break;
     case wasm::WASM_EXTERNAL_EVENT:
       NumImportedEvents++;
       Im.Event.Attribute = readVarint32(Ctx);
       Im.Event.SigIndex = readVarint32(Ctx);
       break;
Error WasmObjectFile::parseFunctionSection(ReadContext &Ctx) {
   return Error::success();
 }
 
 Error WasmObjectFile::parseTableSection(ReadContext &Ctx) {
   uint32_t Count = readVaruint32(Ctx);
   Tables.reserve(Count);
   while (Count--) {
     Tables.push_back(readTable(Ctx));
-    if (Tables.back().ElemType != wasm::WASM_TYPE_ANYFUNC) {
+    if (Tables.back().ElemType != wasm::WASM_TYPE_FUNCREF) {
       return make_error<GenericBinaryError>("Invalid table element type",
                                             object_error::parse_failed);
     }
   }
   if (Ctx.Ptr != Ctx.End)
     return make_error<GenericBinaryError>("Table section ended prematurely",
                                           object_error::parse_failed);
   return Error::success();

llvm/trunk/lib/ObjectYAML/WasmYAML.cpp

case wasm::WASM_OPCODE_I64_CONST:
     IO.mapRequired("Value", Expr.Value.Int64);
     break;
   case wasm::WASM_OPCODE_F32_CONST:
     IO.mapRequired("Value", Expr.Value.Float32);
     break;
   case wasm::WASM_OPCODE_F64_CONST:
     IO.mapRequired("Value", Expr.Value.Float64);
     break;
-  case wasm::WASM_OPCODE_GET_GLOBAL:
+  case wasm::WASM_OPCODE_GLOBAL_GET:
     IO.mapRequired("Index", Expr.Value.Global);
     break;
   }
 }
 
 void MappingTraits<WasmYAML::DataSegment>::mapping(
     IO &IO, WasmYAML::DataSegment &Segment) {
   IO.mapOptional("SectionOffset", Segment.SectionOffset);

 void ScalarEnumerationTraits<WasmYAML::ValueType>::enumeration(
     IO &IO, WasmYAML::ValueType &Type) {
 #define ECase(X) IO.enumCase(Type, #X, wasm::WASM_TYPE_##X);
   ECase(I32);
   ECase(I64);
   ECase(F32);
   ECase(F64);
   ECase(V128);
-  ECase(ANYFUNC);
+  ECase(FUNCREF);
   ECase(FUNC);
   ECase(NORESULT);
 #undef ECase
 }
 
 void ScalarEnumerationTraits<WasmYAML::ExportKind>::enumeration(
     IO &IO, WasmYAML::ExportKind &Kind) {
 #define ECase(X) IO.enumCase(Kind, #X, wasm::WASM_EXTERNAL_##X);
   ECase(FUNCTION);
   ECase(TABLE);
   ECase(MEMORY);
   ECase(GLOBAL);
   ECase(EVENT);
 #undef ECase
 }
 
 void ScalarEnumerationTraits<WasmYAML::Opcode>::enumeration(
     IO &IO, WasmYAML::Opcode &Code) {
 #define ECase(X) IO.enumCase(Code, #X, wasm::WASM_OPCODE_##X);
   ECase(END);
   ECase(I32_CONST);
   ECase(I64_CONST);
   ECase(F64_CONST);
   ECase(F32_CONST);
-  ECase(GET_GLOBAL);
+  ECase(GLOBAL_GET);
 #undef ECase
 }
 
 void ScalarEnumerationTraits<WasmYAML::TableType>::enumeration(
     IO &IO, WasmYAML::TableType &Type) {
 #define ECase(X) IO.enumCase(Type, #X, wasm::WASM_TYPE_##X);
-  ECase(ANYFUNC);
+  ECase(FUNCREF);
 #undef ECase
 }
 
 void ScalarEnumerationTraits<WasmYAML::RelocType>::enumeration(
     IO &IO, WasmYAML::RelocType &Type) {
 #define WASM_RELOC(name, value) IO.enumCase(Type, #name, wasm::name);
 #include "llvm/BinaryFormat/WasmRelocs.def"
 #undef WASM_RELOC
 }
 
 } // end namespace yaml
 
 } // end namespace llvm

llvm/trunk/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp

 WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI,
                                                const MCInstrInfo &MII,
                                                const MCRegisterInfo &MRI)
     : MCInstPrinter(MAI, MII, MRI) {}
 
 void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
                                           unsigned RegNo) const {
   assert(RegNo != WebAssemblyFunctionInfo::UnusedReg);
-  // Note that there's an implicit get_local/set_local here!
+  // Note that there's an implicit local.get/local.set here!
   OS << "$" << RegNo;
 }
 
 void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
                                        StringRef Annot,
                                        const MCSubtargetInfo &STI) {
   // Print the instruction (this uses the AsmStrings from the .td files).
   printInstruction(MI, OS);
const char *llvm::WebAssembly::anyTypeToString(unsigned Ty) {
   case wasm::WASM_TYPE_I64:
     return "i64";
   case wasm::WASM_TYPE_F32:
     return "f32";
   case wasm::WASM_TYPE_F64:
     return "f64";
   case wasm::WASM_TYPE_V128:
     return "v128";
-  case wasm::WASM_TYPE_ANYFUNC:
-    return "anyfunc";
+  case wasm::WASM_TYPE_FUNCREF:
+    return "funcref";
   case wasm::WASM_TYPE_FUNC:
     return "func";
   case wasm::WASM_TYPE_EXCEPT_REF:
     return "except_ref";
   case wasm::WASM_TYPE_NORESULT:
     return "void";
   default:
     return "invalid_type";
   }
 }
 
 const char *llvm::WebAssembly::typeToString(wasm::ValType Ty) {
   return anyTypeToString(static_cast<unsigned>(Ty));
 }

llvm/trunk/lib/Target/WebAssembly/README.txt

 code like this:
 
     i32.const   $4=, 0
     i32.const   $3=, 0
 
 It could be done with a smaller encoding like this:
 
     i32.const   $push5=, 0
-    tee_local   $push6=, $4=, $pop5
-    copy_local  $3=, $pop6
+    local.tee   $push6=, $4=, $pop5
+    local.copy  $3=, $pop6
 
 //===---------------------------------------------------------------------===//
 
 WebAssembly registers are implicitly initialized to zero. Explicit zeroing is
 therefore often redundant and could be optimized away.
 
 //===---------------------------------------------------------------------===//
 

 //===---------------------------------------------------------------------===//
 
 Add support for mergeable sections in the Wasm writer, such as for strings and
 floating-point constants.
 
 //===---------------------------------------------------------------------===//
 
 The function @dynamic_alloca_redzone in test/CodeGen/WebAssembly/userstack.ll
-ends up with a tee_local in its prolog which has an unused result, requiring
+ends up with a local.tee in its prolog which has an unused result, requiring
 an extra drop:
 
-    get_global  $push8=, 0
-    tee_local   $push9=, 1, $pop8
+    global.get  $push8=, 0
+    local.tee   $push9=, 1, $pop8
     drop        $pop9
     [...]
 
 The prologue code initially thinks it needs an FP register, but later it
 turns out to be unneeded, so one could either approach this by being more
 clever about not inserting code for an FP in the first place, or optimizing
 away the copy later.
 
 //===---------------------------------------------------------------------===//

llvm/trunk/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp

 //===-- WebAssemblyExplicitLocals.cpp - Make Locals Explicit --------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// This file converts any remaining registers into WebAssembly locals.
 ///
 /// After register stackification and register coloring, convert non-stackified
-/// registers into locals, inserting explicit get_local and set_local
+/// registers into locals, inserting explicit local.get and local.set
 /// instructions.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
 #include "WebAssembly.h"
 #include "WebAssemblyMachineFunctionInfo.h"
 #include "WebAssemblySubtarget.h"
if (RC == &WebAssembly::F64RegClass)
     return WebAssembly::DROP_F64;
   if (RC == &WebAssembly::V128RegClass)
     return WebAssembly::DROP_V128;
   if (RC == &WebAssembly::EXCEPT_REFRegClass)
     return WebAssembly::DROP_EXCEPT_REF;
   llvm_unreachable("Unexpected register class");
 }
 
-/// Get the appropriate get_local opcode for the given register class.
+/// Get the appropriate local.get opcode for the given register class.
 static unsigned getGetLocalOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
-    return WebAssembly::GET_LOCAL_I32;
+    return WebAssembly::LOCAL_GET_I32;
   if (RC == &WebAssembly::I64RegClass)
-    return WebAssembly::GET_LOCAL_I64;
+    return WebAssembly::LOCAL_GET_I64;
   if (RC == &WebAssembly::F32RegClass)
-    return WebAssembly::GET_LOCAL_F32;
+    return WebAssembly::LOCAL_GET_F32;
   if (RC == &WebAssembly::F64RegClass)
-    return WebAssembly::GET_LOCAL_F64;
+    return WebAssembly::LOCAL_GET_F64;
   if (RC == &WebAssembly::V128RegClass)
-    return WebAssembly::GET_LOCAL_V128;
+    return WebAssembly::LOCAL_GET_V128;
   if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::GET_LOCAL_EXCEPT_REF;
+    return WebAssembly::LOCAL_GET_EXCEPT_REF;
   llvm_unreachable("Unexpected register class");
 }
 
-/// Get the appropriate set_local opcode for the given register class.
+/// Get the appropriate local.set opcode for the given register class.
 static unsigned getSetLocalOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
-    return WebAssembly::SET_LOCAL_I32;
+    return WebAssembly::LOCAL_SET_I32;
   if (RC == &WebAssembly::I64RegClass)
-    return WebAssembly::SET_LOCAL_I64;
+    return WebAssembly::LOCAL_SET_I64;
   if (RC == &WebAssembly::F32RegClass)
-    return WebAssembly::SET_LOCAL_F32;
+    return WebAssembly::LOCAL_SET_F32;
   if (RC == &WebAssembly::F64RegClass)
-    return WebAssembly::SET_LOCAL_F64;
+    return WebAssembly::LOCAL_SET_F64;
   if (RC == &WebAssembly::V128RegClass)
-    return WebAssembly::SET_LOCAL_V128;
+    return WebAssembly::LOCAL_SET_V128;
   if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::SET_LOCAL_EXCEPT_REF;
+    return WebAssembly::LOCAL_SET_EXCEPT_REF;
   llvm_unreachable("Unexpected register class");
 }
 
-/// Get the appropriate tee_local opcode for the given register class.
+/// Get the appropriate local.tee opcode for the given register class.
 static unsigned getTeeLocalOpcode(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
-    return WebAssembly::TEE_LOCAL_I32;
+    return WebAssembly::LOCAL_TEE_I32;
   if (RC == &WebAssembly::I64RegClass)
-    return WebAssembly::TEE_LOCAL_I64;
+    return WebAssembly::LOCAL_TEE_I64;
   if (RC == &WebAssembly::F32RegClass)
-    return WebAssembly::TEE_LOCAL_F32;
+    return WebAssembly::LOCAL_TEE_F32;
   if (RC == &WebAssembly::F64RegClass)
-    return WebAssembly::TEE_LOCAL_F64;
+    return WebAssembly::LOCAL_TEE_F64;
   if (RC == &WebAssembly::V128RegClass)
-    return WebAssembly::TEE_LOCAL_V128;
+    return WebAssembly::LOCAL_TEE_V128;
   if (RC == &WebAssembly::EXCEPT_REFRegClass)
-    return WebAssembly::TEE_LOCAL_EXCEPT_REF;
+    return WebAssembly::LOCAL_TEE_EXCEPT_REF;
   llvm_unreachable("Unexpected register class");
 }
 
 /// Get the type associated with the given register class.
 static MVT typeForRegClass(const TargetRegisterClass *RC) {
   if (RC == &WebAssembly::I32RegClass)
     return MVT::i32;
   if (RC == &WebAssembly::I64RegClass)
bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) {
   for (MachineBasicBlock &MBB : MF) {
     for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
       MachineInstr &MI = *I++;
       assert(!WebAssembly::isArgument(MI));
 
       if (MI.isDebugInstr() || MI.isLabel())
         continue;
 
-      // Replace tee instructions with tee_local. The difference is that tee
-      // instructions have two defs, while tee_local instructions have one def
+      // Replace tee instructions with local.tee. The difference is that tee
+      // instructions have two defs, while local.tee instructions have one def
       // and an index of a local to write to.
       if (WebAssembly::isTee(MI)) {
         assert(MFI.isVRegStackified(MI.getOperand(0).getReg()));
         assert(!MFI.isVRegStackified(MI.getOperand(1).getReg()));
         unsigned OldReg = MI.getOperand(2).getReg();
         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
 
         // Stackify the input if it isn't stackified yet.
         if (!MFI.isVRegStackified(OldReg)) {
           unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
           unsigned NewReg = MRI.createVirtualRegister(RC);
           unsigned Opc = getGetLocalOpcode(RC);
           BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg)
               .addImm(LocalId);
           MI.getOperand(2).setReg(NewReg);
           MFI.stackifyVReg(NewReg);
         }
 
-        // Replace the TEE with a TEE_LOCAL.
+        // Replace the TEE with a LOCAL_TEE.
         unsigned LocalId =
             getLocalId(Reg2Local, CurLocal, MI.getOperand(1).getReg());
         unsigned Opc = getTeeLocalOpcode(RC);
         BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
                 MI.getOperand(0).getReg())
             .addImm(LocalId)
             .addReg(MI.getOperand(2).getReg());
 
         MI.eraseFromParent();
         Changed = true;
         continue;
       }
 
-      // Insert set_locals for any defs that aren't stackified yet. Currently
+      // Insert local.sets for any defs that aren't stackified yet. Currently
       // we handle at most one def.
       assert(MI.getDesc().getNumDefs() <= 1);
       if (MI.getDesc().getNumDefs() == 1) {
         unsigned OldReg = MI.getOperand(0).getReg();
         if (!MFI.isVRegStackified(OldReg)) {
           const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
           unsigned NewReg = MRI.createVirtualRegister(RC);
           auto InsertPt = std::next(MachineBasicBlock::iterator(&MI));
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
             unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
             unsigned Opc = getSetLocalOpcode(RC);
             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
                 .addImm(LocalId)
                 .addReg(NewReg);
           }
           MI.getOperand(0).setReg(NewReg);
           // This register operand of the original instruction is now being used
-          // by the inserted drop or set_local instruction, so make it not dead
+          // by the inserted drop or local.set instruction, so make it not dead
           // yet.
           MI.getOperand(0).setIsDead(false);
           MFI.stackifyVReg(NewReg);
           Changed = true;
         }
       }
 
-      // Insert get_locals for any uses that aren't stackified yet.
+      // Insert local.gets for any uses that aren't stackified yet.
       MachineInstr *InsertPt = &MI;
       for (MachineOperand &MO : reverse(MI.explicit_uses())) {
         if (!MO.isReg())
           continue;
 
         unsigned OldReg = MO.getReg();
 
         // Inline asm may have a def in the middle of the operands. Our contract
         // with inline asm register operands is to provide local indices as
         // immediates.
         if (MO.isDef()) {
           assert(MI.getOpcode() == TargetOpcode::INLINEASM);
           unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
           // If this register operand is tied to another operand, we can't
           // change it to an immediate. Untie it first.
           MI.untieRegOperand(MI.getOperandNo(&MO));
           MO.ChangeToImmediate(LocalId);
           continue;
         }
 
         // If we see a stackified register, prepare to insert subsequent
-        // get_locals before the start of its tree.
+        // local.gets before the start of its tree.
         if (MFI.isVRegStackified(OldReg)) {
           InsertPt = findStartOfTree(MO, MRI, MFI);
           continue;
         }
 
         // Our contract with inline asm register operands is to provide local
         // indices as immediates.
         if (MI.getOpcode() == TargetOpcode::INLINEASM) {
           unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
           // Untie it first if this reg operand is tied to another operand.
           MI.untieRegOperand(MI.getOperandNo(&MO));
           MO.ChangeToImmediate(LocalId);
           continue;
         }
 
-        // Insert a get_local.
+        // Insert a local.get.
         unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
         unsigned NewReg = MRI.createVirtualRegister(RC);
         unsigned Opc = getGetLocalOpcode(RC);
         InsertPt =
             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg)
                 .addImm(LocalId);
         MO.setReg(NewReg);

llvm/trunk/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp

 
 void WebAssemblyFrameLowering::writeSPToGlobal(
     unsigned SrcReg, MachineFunction &MF, MachineBasicBlock &MBB,
     MachineBasicBlock::iterator &InsertStore, const DebugLoc &DL) const {
   const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
 
   const char *ES = "__stack_pointer";
   auto *SPSymbol = MF.createExternalSymbolName(ES);
-  BuildMI(MBB, InsertStore, DL, TII->get(WebAssembly::SET_GLOBAL_I32))
+  BuildMI(MBB, InsertStore, DL, TII->get(WebAssembly::GLOBAL_SET_I32))
       .addExternalSymbol(SPSymbol, WebAssemblyII::MO_SYMBOL_GLOBAL)
       .addReg(SrcReg);
 }
 
 MachineBasicBlock::iterator
 WebAssemblyFrameLowering::eliminateCallFramePseudoInstr(
     MachineFunction &MF, MachineBasicBlock &MBB,
     MachineBasicBlock::iterator I) const {
void WebAssemblyFrameLowering::emitPrologue(MachineFunction &MF,
   const TargetRegisterClass *PtrRC =
       MRI.getTargetRegisterInfo()->getPointerRegClass(MF);
   unsigned SPReg = WebAssembly::SP32;
   if (StackSize)
     SPReg = MRI.createVirtualRegister(PtrRC);
 
   const char *ES = "__stack_pointer";
   auto *SPSymbol = MF.createExternalSymbolName(ES);
-  BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::GET_GLOBAL_I32), SPReg)
+  BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::GLOBAL_GET_I32), SPReg)
       .addExternalSymbol(SPSymbol, WebAssemblyII::MO_SYMBOL_GLOBAL);
 
   bool HasBP = hasBP(MF);
   if (HasBP) {
     auto FI = MF.getInfo<WebAssemblyFunctionInfo>();
     unsigned BasePtr = MRI.createVirtualRegister(PtrRC);
     FI->setBasePointerVreg(BasePtr);
     BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::COPY), BasePtr)

llvm/trunk/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

 SDValue WebAssemblyTargetLowering::LowerCopyToReg(SDValue Op,
                                                   SelectionDAG &DAG) const {
   SDValue Src = Op.getOperand(2);
   if (isa<FrameIndexSDNode>(Src.getNode())) {
     // CopyToReg nodes don't support FrameIndex operands. Other targets select
     // the FI to some LEA-like instruction, but since we don't have that, we
     // need to insert some kind of instruction that can take an FI operand and
     // produces a value usable by CopyToReg (i.e. in a vreg). So insert a dummy
-    // copy_local between Op and its FI operand.
+    // local.copy between Op and its FI operand.
     SDValue Chain = Op.getOperand(0);
     SDLoc DL(Op);
     unsigned Reg = cast<RegisterSDNode>(Op.getOperand(1))->getReg();
     EVT VT = Src.getValueType();
     SDValue Copy(DAG.getMachineNode(VT == MVT::i32 ? WebAssembly::COPY_I32
                                                    : WebAssembly::COPY_I64,
                                     DL, VT, Src),
                  0);

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td

 def : LoadPatNoOffset<i64, zext_aload_16_64, ATOMIC_LOAD16_U_I64>;
 def : LoadPatNoOffset<i64, zext_aload_32_64, ATOMIC_LOAD32_U_I64>;
 
 // Select sign-extending loads with no constant offset
 def : LoadPatNoOffset<i32, atomic_load_8, ATOMIC_LOAD8_U_I32>;
 def : LoadPatNoOffset<i32, atomic_load_16, ATOMIC_LOAD16_U_I32>;
 def : LoadPatNoOffset<i64, sext_aload_8_64, ATOMIC_LOAD8_U_I64>;
 def : LoadPatNoOffset<i64, sext_aload_16_64, ATOMIC_LOAD16_U_I64>;
-// 32->64 sext load gets selected as i32.atomic.load, i64.extend_s/i32
+// 32->64 sext load gets selected as i32.atomic.load, i64.extend_i32_s
 
 // Zero-extending loads with constant offset
 def : LoadPatImmOff<i32, zext_aload_8_32, regPlusImm, ATOMIC_LOAD8_U_I32>;
 def : LoadPatImmOff<i32, zext_aload_16_32, regPlusImm, ATOMIC_LOAD16_U_I32>;
 def : LoadPatImmOff<i32, zext_aload_8_32, or_is_add, ATOMIC_LOAD8_U_I32>;
 def : LoadPatImmOff<i32, zext_aload_16_32, or_is_add, ATOMIC_LOAD16_U_I32>;
 def : LoadPatImmOff<i64, zext_aload_8_64, regPlusImm, ATOMIC_LOAD8_U_I64>;
 def : LoadPatImmOff<i64, zext_aload_16_64, regPlusImm, ATOMIC_LOAD16_U_I64>;
defm "" : I<(outs rc:$dst),
               (outs), (ins P2Align:$p2align, offset32_op:$off), [],
               !strconcat(Name, "\t$dst, ${off}(${addr})${p2align}, $val"),
               !strconcat(Name, "\t${off}, ${p2align}"), Opcode>;
 }
 
 defm ATOMIC_RMW_ADD_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.add", 0xfe1e>;
 defm ATOMIC_RMW_ADD_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.add", 0xfe1f>;
 defm ATOMIC_RMW8_U_ADD_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw8_u.add", 0xfe20>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw8.add_u", 0xfe20>;
 defm ATOMIC_RMW16_U_ADD_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw16_u.add", 0xfe21>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw16.add_u", 0xfe21>;
 defm ATOMIC_RMW8_U_ADD_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw8_u.add", 0xfe22>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw8.add_u", 0xfe22>;
 defm ATOMIC_RMW16_U_ADD_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw16_u.add", 0xfe23>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw16.add_u", 0xfe23>;
 defm ATOMIC_RMW32_U_ADD_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw32_u.add", 0xfe24>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw32.add_u", 0xfe24>;
 
 defm ATOMIC_RMW_SUB_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.sub", 0xfe25>;
 defm ATOMIC_RMW_SUB_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.sub", 0xfe26>;
 defm ATOMIC_RMW8_U_SUB_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw8_u.sub", 0xfe27>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw8.sub_u", 0xfe27>;
 defm ATOMIC_RMW16_U_SUB_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw16_u.sub", 0xfe28>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw16.sub_u", 0xfe28>;
 defm ATOMIC_RMW8_U_SUB_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw8_u.sub", 0xfe29>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw8.sub_u", 0xfe29>;
 defm ATOMIC_RMW16_U_SUB_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw16_u.sub", 0xfe2a>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw16.sub_u", 0xfe2a>;
 defm ATOMIC_RMW32_U_SUB_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw32_u.sub", 0xfe2b>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw32.sub_u", 0xfe2b>;
 
 defm ATOMIC_RMW_AND_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.and", 0xfe2c>;
 defm ATOMIC_RMW_AND_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.and", 0xfe2d>;
 defm ATOMIC_RMW8_U_AND_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw8_u.and", 0xfe2e>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw8.and_u", 0xfe2e>;
 defm ATOMIC_RMW16_U_AND_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw16_u.and", 0xfe2f>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw16.and_u", 0xfe2f>;
 defm ATOMIC_RMW8_U_AND_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw8_u.and", 0xfe30>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw8.and_u", 0xfe30>;
 defm ATOMIC_RMW16_U_AND_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw16_u.and", 0xfe31>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw16.and_u", 0xfe31>;
 defm ATOMIC_RMW32_U_AND_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw32_u.and", 0xfe32>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw32.and_u", 0xfe32>;
 
 defm ATOMIC_RMW_OR_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.or", 0xfe33>;
 defm ATOMIC_RMW_OR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.or", 0xfe34>;
 defm ATOMIC_RMW8_U_OR_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw8_u.or", 0xfe35>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw8.or_u", 0xfe35>;
 defm ATOMIC_RMW16_U_OR_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw16_u.or", 0xfe36>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw16.or_u", 0xfe36>;
 defm ATOMIC_RMW8_U_OR_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw8_u.or", 0xfe37>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw8.or_u", 0xfe37>;
 defm ATOMIC_RMW16_U_OR_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw16_u.or", 0xfe38>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw16.or_u", 0xfe38>;
 defm ATOMIC_RMW32_U_OR_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw32_u.or", 0xfe39>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw32.or_u", 0xfe39>;
 
 defm ATOMIC_RMW_XOR_I32 : WebAssemblyBinRMW<I32, "i32.atomic.rmw.xor", 0xfe3a>;
 defm ATOMIC_RMW_XOR_I64 : WebAssemblyBinRMW<I64, "i64.atomic.rmw.xor", 0xfe3b>;
 defm ATOMIC_RMW8_U_XOR_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw8_u.xor", 0xfe3c>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw8.xor_u", 0xfe3c>;
 defm ATOMIC_RMW16_U_XOR_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw16_u.xor", 0xfe3d>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw16.xor_u", 0xfe3d>;
 defm ATOMIC_RMW8_U_XOR_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw8_u.xor", 0xfe3e>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw8.xor_u", 0xfe3e>;
 defm ATOMIC_RMW16_U_XOR_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw16_u.xor", 0xfe3f>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw16.xor_u", 0xfe3f>;
 defm ATOMIC_RMW32_U_XOR_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw32_u.xor", 0xfe40>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw32.xor_u", 0xfe40>;
 
 defm ATOMIC_RMW_XCHG_I32 :
   WebAssemblyBinRMW<I32, "i32.atomic.rmw.xchg", 0xfe41>;
 defm ATOMIC_RMW_XCHG_I64 :
   WebAssemblyBinRMW<I64, "i64.atomic.rmw.xchg", 0xfe42>;
 defm ATOMIC_RMW8_U_XCHG_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw8_u.xchg", 0xfe43>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw8.xchg_u", 0xfe43>;
 defm ATOMIC_RMW16_U_XCHG_I32 :
-  WebAssemblyBinRMW<I32, "i32.atomic.rmw16_u.xchg", 0xfe44>;
+  WebAssemblyBinRMW<I32, "i32.atomic.rmw16.xchg_u", 0xfe44>;
 defm ATOMIC_RMW8_U_XCHG_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw8_u.xchg", 0xfe45>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw8.xchg_u", 0xfe45>;
 defm ATOMIC_RMW16_U_XCHG_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw16_u.xchg", 0xfe46>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw16.xchg_u", 0xfe46>;
 defm ATOMIC_RMW32_U_XCHG_I64 :
-  WebAssemblyBinRMW<I64, "i64.atomic.rmw32_u.xchg", 0xfe47>;
+  WebAssemblyBinRMW<I64, "i64.atomic.rmw32.xchg_u", 0xfe47>;
 
 // Select binary RMWs with no constant offset.
 class BinRMWPatNoOffset<ValueType ty, PatFrag kind, NI inst> :
   Pat<(ty (kind I32:$addr, ty:$val)), (inst 0, 0, I32:$addr, ty:$val)>;
 
 // Select binary RMWs with a constant offset.
 
 // Pattern with address + immediate offset

 // is selected by itself.
 class sext_bin_rmw_8_32<PatFrag kind> :
   PatFrag<(ops node:$addr, node:$val), (kind node:$addr, node:$val)>;
 class sext_bin_rmw_16_32<PatFrag kind> : sext_bin_rmw_8_32<kind>;
 class sext_bin_rmw_8_64<PatFrag kind> :
   PatFrag<(ops node:$addr, node:$val),
           (anyext (i32 (kind node:$addr, (i32 (trunc (i64 node:$val))))))>;
 class sext_bin_rmw_16_64<PatFrag kind> : sext_bin_rmw_8_64<kind>;
-// 32->64 sext RMW gets selected as i32.atomic.rmw.***, i64.extend_s/i32
+// 32->64 sext RMW gets selected as i32.atomic.rmw.***, i64.extend_i32_s
 
 // Patterns for various addressing modes for truncating-extending binary RMWs.
 multiclass BinRMWTruncExtPattern<
   PatFrag rmw_8, PatFrag rmw_16, PatFrag rmw_32, PatFrag rmw_64,
   NI inst8_32, NI inst16_32, NI inst8_64, NI inst16_64, NI inst32_64> {
   // Truncating-extending binary RMWs with no constant offset
   def : BinRMWPatNoOffset<i32, zext_bin_rmw_8_32<rmw_8>, inst8_32>;
   def : BinRMWPatNoOffset<i32, zext_bin_rmw_16_32<rmw_16>, inst16_32>;
defm "" : I<(outs rc:$dst),
               !strconcat(Name, "\t${off}, ${p2align}"), Opcode>;
 }
 
 defm ATOMIC_RMW_CMPXCHG_I32 :
   WebAssemblyTerRMW<I32, "i32.atomic.rmw.cmpxchg", 0xfe48>;
 defm ATOMIC_RMW_CMPXCHG_I64 :
   WebAssemblyTerRMW<I64, "i64.atomic.rmw.cmpxchg", 0xfe49>;
 defm ATOMIC_RMW8_U_CMPXCHG_I32 :
-  WebAssemblyTerRMW<I32, "i32.atomic.rmw8_u.cmpxchg", 0xfe4a>;
+  WebAssemblyTerRMW<I32, "i32.atomic.rmw8.cmpxchg_u", 0xfe4a>;
 defm ATOMIC_RMW16_U_CMPXCHG_I32 :
-  WebAssemblyTerRMW<I32, "i32.atomic.rmw16_u.cmpxchg", 0xfe4b>;
+  WebAssemblyTerRMW<I32, "i32.atomic.rmw16.cmpxchg_u", 0xfe4b>;
 defm ATOMIC_RMW8_U_CMPXCHG_I64 :
-  WebAssemblyTerRMW<I64, "i64.atomic.rmw8_u.cmpxchg", 0xfe4c>;
+  WebAssemblyTerRMW<I64, "i64.atomic.rmw8.cmpxchg_u", 0xfe4c>;
 defm ATOMIC_RMW16_U_CMPXCHG_I64 :
-  WebAssemblyTerRMW<I64, "i64.atomic.rmw16_u.cmpxchg", 0xfe4d>;
+  WebAssemblyTerRMW<I64, "i64.atomic.rmw16.cmpxchg_u", 0xfe4d>;
 defm ATOMIC_RMW32_U_CMPXCHG_I64 :
-  WebAssemblyTerRMW<I64, "i64.atomic.rmw32_u.cmpxchg", 0xfe4e>;
+  WebAssemblyTerRMW<I64, "i64.atomic.rmw32.cmpxchg_u", 0xfe4e>;
 
 // Select ternary RMWs with no constant offset.
 class TerRMWPatNoOffset<ValueType ty, PatFrag kind, NI inst> :
   Pat<(ty (kind I32:$addr, ty:$exp, ty:$new)),
       (inst 0, 0, I32:$addr, ty:$exp, ty:$new)>;
 
 // Select ternary RMWs with a constant offset.
 

 class sext_ter_rmw_16_32<PatFrag kind> : sext_ter_rmw_8_32<kind>;
 class sext_ter_rmw_8_64<PatFrag kind> :
   PatFrag<(ops node:$addr, node:$exp, node:$new),
           (anyext (i32 (assertzext (i32
             (kind node:$addr,
                   (i32 (trunc (i64 node:$exp))),
                   (i32 (trunc (i64 node:$new))))))))>;
 class sext_ter_rmw_16_64<PatFrag kind> : sext_ter_rmw_8_64<kind>;
-// 32->64 sext RMW gets selected as i32.atomic.rmw.***, i64.extend_s/i32
+// 32->64 sext RMW gets selected as i32.atomic.rmw.***, i64.extend_i32_s
 
 // Patterns for various addressing modes for truncating-extending ternary RMWs.
 multiclass TerRMWTruncExtPattern<
   PatFrag rmw_8, PatFrag rmw_16, PatFrag rmw_32, PatFrag rmw_64,
   NI inst8_32, NI inst16_32, NI inst8_64, NI inst16_64, NI inst32_64> {
   // Truncating-extending ternary RMWs with no constant offset
   def : TerRMWPatNoOffset<i32, zext_ter_rmw_8_32<rmw_8>, inst8_32>;
   def : TerRMWPatNoOffset<i32, zext_ter_rmw_16_32<rmw_16>, inst16_32>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrConv.td

 /// \file
 /// WebAssembly datatype conversions, truncations, reinterpretations,
 /// promotions, and demotions operand code-gen constructs.
 ///
 //===----------------------------------------------------------------------===//
 
 defm I32_WRAP_I64 : I<(outs I32:$dst), (ins I64:$src), (outs), (ins),
                       [(set I32:$dst, (trunc I64:$src))],
-                      "i32.wrap/i64\t$dst, $src", "i32.wrap/i64", 0xa7>;
+                      "i32.wrap_i64\t$dst, $src", "i32.wrap_i64", 0xa7>;
 
 defm I64_EXTEND_S_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins),
                           [(set I64:$dst, (sext I32:$src))],
-                          "i64.extend_s/i32\t$dst, $src", "i64.extend_s/i32",
+                          "i64.extend_i32_s\t$dst, $src", "i64.extend_i32_s",
                           0xac>;
 defm I64_EXTEND_U_I32 : I<(outs I64:$dst), (ins I32:$src), (outs), (ins),
                           [(set I64:$dst, (zext I32:$src))],
-                          "i64.extend_u/i32\t$dst, $src", "i64.extend_u/i32",
+                          "i64.extend_i32_u\t$dst, $src", "i64.extend_i32_u",
                           0xad>;
 
 let Predicates = [HasSignExt] in {
 defm I32_EXTEND8_S_I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins),
                            [(set I32:$dst, (sext_inreg I32:$src, i8))],
                            "i32.extend8_s\t$dst, $src", "i32.extend8_s",
                            0xc0>;
 defm I32_EXTEND16_S_I32 : I<(outs I32:$dst), (ins I32:$src), (outs), (ins),

 // somewhat arbitrarily, although it favors popular hardware architectures
 // and is conceptually a simpler operation).
 def : Pat<(i64 (anyext I32:$src)), (I64_EXTEND_U_I32 I32:$src)>;
 
 // Conversion from floating point to integer instructions which don't trap on
 // overflow or invalid.
 defm I32_TRUNC_S_SAT_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
                              [(set I32:$dst, (fp_to_sint F32:$src))],
-                             "i32.trunc_s:sat/f32\t$dst, $src",
-                             "i32.trunc_s:sat/f32", 0xfc00>,
+                             "i32.trunc_sat_f32_s\t$dst, $src",
+                             "i32.trunc_sat_f32_s", 0xfc00>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I32_TRUNC_U_SAT_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
                              [(set I32:$dst, (fp_to_uint F32:$src))],
-                             "i32.trunc_u:sat/f32\t$dst, $src",
-                             "i32.trunc_u:sat/f32", 0xfc01>,
+                             "i32.trunc_sat_f32_u\t$dst, $src",
+                             "i32.trunc_sat_f32_u", 0xfc01>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I64_TRUNC_S_SAT_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
                              [(set I64:$dst, (fp_to_sint F32:$src))],
-                             "i64.trunc_s:sat/f32\t$dst, $src",
-                             "i64.trunc_s:sat/f32", 0xfc04>,
+                             "i64.trunc_sat_f32_s\t$dst, $src",
+                             "i64.trunc_sat_f32_s", 0xfc04>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I64_TRUNC_U_SAT_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
                              [(set I64:$dst, (fp_to_uint F32:$src))],
-                             "i64.trunc_u:sat/f32\t$dst, $src",
-                             "i64.trunc_u:sat/f32", 0xfc05>,
+                             "i64.trunc_sat_f32_u\t$dst, $src",
+                             "i64.trunc_sat_f32_u", 0xfc05>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I32_TRUNC_S_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
                              [(set I32:$dst, (fp_to_sint F64:$src))],
-                             "i32.trunc_s:sat/f64\t$dst, $src",
-                             "i32.trunc_s:sat/f64", 0xfc02>,
+                             "i32.trunc_sat_f64_s\t$dst, $src",
+                             "i32.trunc_sat_f64_s", 0xfc02>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I32_TRUNC_U_SAT_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
                              [(set I32:$dst, (fp_to_uint F64:$src))],
-                             "i32.trunc_u:sat/f64\t$dst, $src",
-                             "i32.trunc_u:sat/f64", 0xfc03>,
+                             "i32.trunc_sat_f64_u\t$dst, $src",
+                             "i32.trunc_sat_f64_u", 0xfc03>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I64_TRUNC_S_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
                              [(set I64:$dst, (fp_to_sint F64:$src))],
-                             "i64.trunc_s:sat/f64\t$dst, $src",
-                             "i64.trunc_s:sat/f64", 0xfc06>,
+                             "i64.trunc_sat_f64_s\t$dst, $src",
+                             "i64.trunc_sat_f64_s", 0xfc06>,
                              Requires<[HasNontrappingFPToInt]>;
 defm I64_TRUNC_U_SAT_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
                              [(set I64:$dst, (fp_to_uint F64:$src))],
-                             "i64.trunc_u:sat/f64\t$dst, $src",
-                             "i64.trunc_u:sat/f64", 0xfc07>,
+                             "i64.trunc_sat_f64_u\t$dst, $src",
+                             "i64.trunc_sat_f64_u", 0xfc07>,
                              Requires<[HasNontrappingFPToInt]>;
 
 // Lower llvm.wasm.trunc.saturate.* to saturating instructions
 def : Pat<(int_wasm_trunc_saturate_signed F32:$src),
           (I32_TRUNC_S_SAT_F32 F32:$src)>;
 def : Pat<(int_wasm_trunc_saturate_unsigned F32:$src),
           (I32_TRUNC_U_SAT_F32 F32:$src)>;
 def : Pat<(int_wasm_trunc_saturate_signed F64:$src),

 defm FP_TO_UINT_I64_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
                             [(set I64:$dst, (fp_to_uint F64:$src))], "", "", 0>,
                             Requires<[NotHasNontrappingFPToInt]>;
 } // usesCustomInserter, isCodeGenOnly = 1
 
 // Conversion from floating point to integer traps on overflow and invalid.
 let hasSideEffects = 1 in {
 defm I32_TRUNC_S_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
-                         [], "i32.trunc_s/f32\t$dst, $src", "i32.trunc_s/f32",
+                         [], "i32.trunc_f32_s\t$dst, $src", "i32.trunc_f32_s",
                          0xa8>;
 defm I32_TRUNC_U_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
-                         [], "i32.trunc_u/f32\t$dst, $src", "i32.trunc_u/f32",
+                         [], "i32.trunc_f32_u\t$dst, $src", "i32.trunc_f32_u",
                          0xa9>;
 defm I64_TRUNC_S_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
-                         [], "i64.trunc_s/f32\t$dst, $src", "i64.trunc_s/f32",
+                         [], "i64.trunc_f32_s\t$dst, $src", "i64.trunc_f32_s",
                          0xae>;
 defm I64_TRUNC_U_F32 : I<(outs I64:$dst), (ins F32:$src), (outs), (ins),
-                         [], "i64.trunc_u/f32\t$dst, $src", "i64.trunc_u/f32",
+                         [], "i64.trunc_f32_u\t$dst, $src", "i64.trunc_f32_u",
                          0xaf>;
 defm I32_TRUNC_S_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
-                         [], "i32.trunc_s/f64\t$dst, $src", "i32.trunc_s/f64",
+                         [], "i32.trunc_f64_s\t$dst, $src", "i32.trunc_f64_s",
                          0xaa>;
 defm I32_TRUNC_U_F64 : I<(outs I32:$dst), (ins F64:$src), (outs), (ins),
-                         [], "i32.trunc_u/f64\t$dst, $src", "i32.trunc_u/f64",
+                         [], "i32.trunc_f64_u\t$dst, $src", "i32.trunc_f64_u",
                          0xab>;
 defm I64_TRUNC_S_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
-                         [], "i64.trunc_s/f64\t$dst, $src", "i64.trunc_s/f64",
+                         [], "i64.trunc_f64_s\t$dst, $src", "i64.trunc_f64_s",
                          0xb0>;
 defm I64_TRUNC_U_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
-                         [], "i64.trunc_u/f64\t$dst, $src", "i64.trunc_u/f64",
+                         [], "i64.trunc_f64_u\t$dst, $src", "i64.trunc_f64_u",
                          0xb1>;
 } // hasSideEffects = 1
 
 defm F32_CONVERT_S_I32 : I<(outs F32:$dst), (ins I32:$src), (outs), (ins),
                            [(set F32:$dst, (sint_to_fp I32:$src))],
-                           "f32.convert_s/i32\t$dst, $src", "f32.convert_s/i32",
+                           "f32.convert_i32_s\t$dst, $src", "f32.convert_i32_s",
                            0xb2>;
 defm F32_CONVERT_U_I32 : I<(outs F32:$dst), (ins I32:$src), (outs), (ins),
                            [(set F32:$dst, (uint_to_fp I32:$src))],
-                           "f32.convert_u/i32\t$dst, $src", "f32.convert_u/i32",
+                           "f32.convert_i32_u\t$dst, $src", "f32.convert_i32_u",
                            0xb3>;
 defm F64_CONVERT_S_I32 : I<(outs F64:$dst), (ins I32:$src), (outs), (ins),
                            [(set F64:$dst, (sint_to_fp I32:$src))],
-                           "f64.convert_s/i32\t$dst, $src", "f64.convert_s/i32",
+                           "f64.convert_i32_s\t$dst, $src", "f64.convert_i32_s",
                            0xb7>;
 defm F64_CONVERT_U_I32 : I<(outs F64:$dst), (ins I32:$src), (outs), (ins),
                            [(set F64:$dst, (uint_to_fp I32:$src))],
-                           "f64.convert_u/i32\t$dst, $src", "f64.convert_u/i32",
+                           "f64.convert_i32_u\t$dst, $src", "f64.convert_i32_u",
                            0xb8>;
 defm F32_CONVERT_S_I64 : I<(outs F32:$dst), (ins I64:$src), (outs), (ins),
                            [(set F32:$dst, (sint_to_fp I64:$src))],
-                           "f32.convert_s/i64\t$dst, $src", "f32.convert_s/i64",
+                           "f32.convert_i64_s\t$dst, $src", "f32.convert_i64_s",
                            0xb4>;
 defm F32_CONVERT_U_I64 : I<(outs F32:$dst), (ins I64:$src), (outs), (ins),
                            [(set F32:$dst, (uint_to_fp I64:$src))],
-                           "f32.convert_u/i64\t$dst, $src", "f32.convert_u/i64",
+                           "f32.convert_i64_u\t$dst, $src", "f32.convert_i64_u",
                            0xb5>;
 defm F64_CONVERT_S_I64 : I<(outs F64:$dst), (ins I64:$src), (outs), (ins),
                            [(set F64:$dst, (sint_to_fp I64:$src))],
-                           "f64.convert_s/i64\t$dst, $src", "f64.convert_s/i64",
+                           "f64.convert_i64_s\t$dst, $src", "f64.convert_i64_s",
                            0xb9>;
 defm F64_CONVERT_U_I64 : I<(outs F64:$dst), (ins I64:$src), (outs), (ins),
                            [(set F64:$dst, (uint_to_fp I64:$src))],
-                           "f64.convert_u/i64\t$dst, $src", "f64.convert_u/i64",
+                           "f64.convert_i64_u\t$dst, $src", "f64.convert_i64_u",
                            0xba>;
 
 defm F64_PROMOTE_F32 : I<(outs F64:$dst), (ins F32:$src), (outs), (ins),
                          [(set F64:$dst, (fpextend F32:$src))],
-                         "f64.promote/f32\t$dst, $src", "f64.promote/f32",
+                         "f64.promote_f32\t$dst, $src", "f64.promote_f32",
                          0xbb>;
 defm F32_DEMOTE_F64 : I<(outs F32:$dst), (ins F64:$src), (outs), (ins),
                         [(set F32:$dst, (fpround F64:$src))],
-                        "f32.demote/f64\t$dst, $src", "f32.demote/f64",
+                        "f32.demote_f64\t$dst, $src", "f32.demote_f64",
                         0xb6>;
 
 defm I32_REINTERPRET_F32 : I<(outs I32:$dst), (ins F32:$src), (outs), (ins),
                              [(set I32:$dst, (bitconvert F32:$src))],
-                             "i32.reinterpret/f32\t$dst, $src",
-                             "i32.reinterpret/f32", 0xbc>;
+                             "i32.reinterpret_f32\t$dst, $src",
+                             "i32.reinterpret_f32", 0xbc>;
 defm F32_REINTERPRET_I32 : I<(outs F32:$dst), (ins I32:$src), (outs), (ins),
                              [(set F32:$dst, (bitconvert I32:$src))],
-                             "f32.reinterpret/i32\t$dst, $src",
-                             "f32.reinterpret/i32", 0xbe>;
+                             "f32.reinterpret_i32\t$dst, $src",
+                             "f32.reinterpret_i32", 0xbe>;
 defm I64_REINTERPRET_F64 : I<(outs I64:$dst), (ins F64:$src), (outs), (ins),
                              [(set I64:$dst, (bitconvert F64:$src))],
-                             "i64.reinterpret/f64\t$dst, $src",
-                             "i64.reinterpret/f64", 0xbd>;
+                             "i64.reinterpret_f64\t$dst, $src",
+                             "i64.reinterpret_f64", 0xbd>;
 defm F64_REINTERPRET_I64 : I<(outs F64:$dst), (ins I64:$src), (outs), (ins),
                              [(set F64:$dst, (bitconvert I64:$src))],
-                             "f64.reinterpret/i64\t$dst, $src",
-                             "f64.reinterpret/i64", 0xbf>;
+                             "f64.reinterpret_i64\t$dst, $src",
+                             "f64.reinterpret_i64", 0xbf>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td

class NI<dag oops, dag iops, list<dag> pattern, string stack,
   let Defs           = [ARGUMENTS];
 }
 
 // Generates both register and stack based versions of one actual instruction.
 // We have 2 sets of operands (oops & iops) for the register and stack
 // based version of this instruction, as well as the corresponding asmstr.
 // The register versions have virtual-register operands which correspond to wasm
 // locals or stack locations. Each use and def of the register corresponds to an
-// implicit get_local / set_local or access of stack operands in wasm. These
+// implicit local.get / local.set or access of stack operands in wasm. These
 // instructions are used for ISel and all MI passes. The stack versions of the
 // instructions do not have register operands (they implicitly operate on the
-// stack), and get_locals and set_locals are explicit. The register instructions
+// stack), and local.gets and local.sets are explicit. The register instructions
 // are converted to their corresponding stack instructions before lowering to
 // MC.
 // Every instruction should want to be based on this multi-class to guarantee
 // there is always an equivalent pair of instructions.
 multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
              list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "",
              bits<32> inst = -1> {
   let isCodeGenOnly = 1 in

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInfo.td

I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno),
       [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>;
 }
 defm "": ARGUMENT<I32, i32>;
 defm "": ARGUMENT<I64, i64>;
 defm "": ARGUMENT<F32, f32>;
 defm "": ARGUMENT<F64, f64>;
 defm "": ARGUMENT<EXCEPT_REF, ExceptRef>;
 
-// get_local and set_local are not generated by instruction selection; they
+// local.get and local.set are not generated by instruction selection; they
 // are implied by virtual register uses and defs.
 multiclass LOCAL<WebAssemblyRegClass vt> {
 let hasSideEffects = 0 in {
-  // COPY is not an actual instruction in wasm, but since we allow get_local and
-  // set_local to be implicit during most of codegen, we can have a COPY which
-  // is actually a no-op because all the work is done in the implied get_local
-  // and set_local. COPYs are eliminated (and replaced with
-  // get_local/set_local) in the ExplicitLocals pass.
+  // COPY is not an actual instruction in wasm, but since we allow local.get and
+  // local.set to be implicit during most of codegen, we can have a COPY which
+  // is actually a no-op because all the work is done in the implied local.get
+  // and local.set. COPYs are eliminated (and replaced with
+  // local.get/local.set) in the ExplicitLocals pass.
   let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
   defm COPY_#vt : I<(outs vt:$res), (ins vt:$src), (outs), (ins), [],
-                    "copy_local\t$res, $src", "copy_local">;
+                    "local.copy\t$res, $src", "local.copy">;
 
   // TEE is similar to COPY, but writes two copies of its result. Typically
   // this would be used to stackify one result and write the other result to a
   // local.
   let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
   defm TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), (outs), (ins), [],
-                   "tee_local\t$res, $also, $src", "tee_local">;
+                   "local.tee\t$res, $also, $src", "local.tee">;
 
-  // This is the actual get_local instruction in wasm. These are made explicit
+  // This is the actual local.get instruction in wasm. These are made explicit
   // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm
   // local, which is a side effect not otherwise modeled in LLVM.
   let mayLoad = 1, isAsCheapAsAMove = 1 in
-  defm GET_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local),
+  defm LOCAL_GET_#vt : I<(outs vt:$res), (ins local_op:$local),
                          (outs), (ins local_op:$local), [],
-                         "get_local\t$res, $local", "get_local\t$local", 0x20>;
+                         "local.get\t$res, $local", "local.get\t$local", 0x20>;
 
-  // This is the actual set_local instruction in wasm. These are made explicit
+  // This is the actual local.set instruction in wasm. These are made explicit
   // by the ExplicitLocals pass. It has mayStore because it writes to a wasm
   // local, which is a side effect not otherwise modeled in LLVM.
   let mayStore = 1, isAsCheapAsAMove = 1 in
-  defm SET_LOCAL_#vt : I<(outs), (ins local_op:$local, vt:$src),
+  defm LOCAL_SET_#vt : I<(outs), (ins local_op:$local, vt:$src),
                          (outs), (ins local_op:$local), [],
-                         "set_local\t$local, $src", "set_local\t$local", 0x21>;
+                         "local.set\t$local, $src", "local.set\t$local", 0x21>;
 
-  // This is the actual tee_local instruction in wasm. TEEs are turned into
-  // TEE_LOCALs by the ExplicitLocals pass. It has mayStore for the same reason
-  // as SET_LOCAL.
+  // This is the actual local.tee instruction in wasm. TEEs are turned into
+  // LOCAL_TEEs by the ExplicitLocals pass. It has mayStore for the same reason
+  // as LOCAL_SET.
   let mayStore = 1, isAsCheapAsAMove = 1 in
-  defm TEE_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src),
+  defm LOCAL_TEE_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src),
                          (outs), (ins local_op:$local), [],
-                         "tee_local\t$res, $local, $src", "tee_local\t$local",
+                         "local.tee\t$res, $local, $src", "local.tee\t$local",
                          0x22>;
 
   // Unused values must be dropped in some contexts.
   defm DROP_#vt : I<(outs), (ins vt:$src), (outs), (ins), [],
                     "drop\t$src", "drop", 0x1a>;
 
   let mayLoad = 1 in
-  defm GET_GLOBAL_#vt : I<(outs vt:$res), (ins global_op:$local),
+  defm GLOBAL_GET_#vt : I<(outs vt:$res), (ins global_op:$local),
                           (outs), (ins global_op:$local), [],
-                          "get_global\t$res, $local", "get_global\t$local",
+                          "global.get\t$res, $local", "global.get\t$local",
                           0x23>;
 
   let mayStore = 1 in
-  defm SET_GLOBAL_#vt : I<(outs), (ins global_op:$local, vt:$src),
+  defm GLOBAL_SET_#vt : I<(outs), (ins global_op:$local, vt:$src),
                           (outs), (ins global_op:$local), [],
-                          "set_global\t$local, $src", "set_global\t$local",
+                          "global.set\t$local, $src", "global.set\t$local",
                           0x24>;
 
 } // hasSideEffects = 0
 }
 defm "" : LOCAL<I32>;
 defm "" : LOCAL<I64>;
 defm "" : LOCAL<F32>;
 defm "" : LOCAL<F64>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

 multiclass SIMDConvert<ValueType vec_t, ValueType arg_t, SDNode op,
                        string name, bits<32> simdop> {
   defm op#_#vec_t#_#arg_t :
     SIMD_I<(outs V128:$dst), (ins V128:$vec), (outs), (ins),
            [(set (vec_t V128:$dst), (vec_t (op (arg_t V128:$vec))))],
            name#"\t$dst, $vec", name, simdop>;
 }
 
-// Integer to floating point: convert_s / convert_u
-defm "" : SIMDConvert<v4f32, v4i32, sint_to_fp, "f32x4.convert_s/i32x4", 175>;
-defm "" : SIMDConvert<v4f32, v4i32, uint_to_fp, "f32x4.convert_u/i32x4", 176>;
-defm "" : SIMDConvert<v2f64, v2i64, sint_to_fp, "f64x2.convert_s/i64x2", 177>;
-defm "" : SIMDConvert<v2f64, v2i64, uint_to_fp, "f64x2.convert_u/i64x2", 178>;
-
-// Floating point to integer with saturation: trunc_sat_s / trunc_sat_u
-defm "" : SIMDConvert<v4i32, v4f32, fp_to_sint, "i32x4.trunc_sat_s/f32x4", 171>;
-defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_sat_u/f32x4", 172>;
-defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_sat_s/f64x2", 173>;
-defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_sat_u/f64x2", 174>;
+// Integer to floating point: convert
+defm "" : SIMDConvert<v4f32, v4i32, sint_to_fp, "f32x4.convert_i32x4_s", 175>;
+defm "" : SIMDConvert<v4f32, v4i32, uint_to_fp, "f32x4.convert_i32x4_u", 176>;
+defm "" : SIMDConvert<v2f64, v2i64, sint_to_fp, "f64x2.convert_i64x2_s", 177>;
+defm "" : SIMDConvert<v2f64, v2i64, uint_to_fp, "f64x2.convert_i64x2_u", 178>;
+
+// Floating point to integer with saturation: trunc_sat
+defm "" : SIMDConvert<v4i32, v4f32, fp_to_sint, "i32x4.trunc_sat_f32x4_s", 171>;
+defm "" : SIMDConvert<v4i32, v4f32, fp_to_uint, "i32x4.trunc_sat_f32x4_u", 172>;
+defm "" : SIMDConvert<v2i64, v2f64, fp_to_sint, "i64x2.trunc_sat_f64x2_s", 173>;
+defm "" : SIMDConvert<v2i64, v2f64, fp_to_uint, "i64x2.trunc_sat_f64x2_u", 174>;
 
 // Lower llvm.wasm.trunc.saturate.* to saturating instructions
 def : Pat<(v4i32 (int_wasm_trunc_saturate_signed (v4f32 V128:$src))),
           (fp_to_sint_v4i32_v4f32 (v4f32 V128:$src))>;
 def : Pat<(v4i32 (int_wasm_trunc_saturate_unsigned (v4f32 V128:$src))),
           (fp_to_uint_v4i32_v4f32 (v4f32 V128:$src))>;
 def : Pat<(v2i64 (int_wasm_trunc_saturate_signed (v2f64 V128:$src))),
           (fp_to_sint_v2i64_v2f64 (v2f64 V128:$src))>;

llvm/trunk/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp

bool WebAssemblyLateEHPrepare::addRethrows(MachineFunction &MF) {
   return Changed;
 }
 
 // Terminate pads are an single-BB EH pad in the form of
 // termpad:
 //   %exn = catch 0
 //   call @__clang_call_terminate(%exn)
 //   unreachable
-// (There can be set_local and get_locals before the call if we didn't run
+// (There can be local.set and local.gets before the call if we didn't run
 // RegStackify)
 // But code transformations can change or add more control flow, so the call to
 // __clang_call_terminate() function may not be in the original EH pad anymore.
 // This ensures every terminate pad is a single BB in the form illustrated
 // above.
 bool WebAssemblyLateEHPrepare::ensureSingleBBTermPads(MachineFunction &MF) {
   const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
 
for (auto *Call : ClangCallTerminateCalls) {
     // move the call to the end of EH pad and add an unreachable instruction
     // after that. Delete all successors and their children if any, because here
     // the program terminates.
     Changed = true;
     MachineInstr *Catch = &*EHPad->begin();
     // This runs after hoistCatches(), so catch instruction should be at the top
     assert(WebAssembly::isCatch(*Catch));
     // Takes the result register of the catch instruction as argument. There may
-    // have been some other set_local/get_locals in between, but at this point
+    // have been some other local.set/local.gets in between, but at this point
     // we don't care.
     Call->getOperand(1).setReg(Catch->getOperand(0).getReg());
     auto InsertPos = std::next(MachineBasicBlock::iterator(Catch));
     EHPad->insert(InsertPos, Call->removeFromParent());
     BuildMI(*EHPad, InsertPos, Call->getDebugLoc(),
             TII.get(WebAssembly::UNREACHABLE));
     EHPad->erase(InsertPos, EHPad->end());
     SmallVector<MachineBasicBlock *, 8> Succs(EHPad->succ_begin(),

llvm/trunk/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp

if (UseInst == OneUseInst) {
       if (&OneUse > &Use)
         return false;
     } else {
       // Test that the use is dominated by the one selected use.
       while (!MDT.dominates(OneUseInst, UseInst)) {
         // Actually, dominating is over-conservative. Test that the use would
         // happen after the one selected use in the stack evaluation order.
         //
-        // This is needed as a consequence of using implicit get_locals for
-        // uses and implicit set_locals for defs.
+        // This is needed as a consequence of using implicit local.gets for
+        // uses and implicit local.sets for defs.
         if (UseInst->getDesc().getNumDefs() == 0)
           return false;
         const MachineOperand &MO = UseInst->getOperand(0);
         if (!MO.isReg())
           return false;
         unsigned DefReg = MO.getReg();
         if (!TargetRegisterInfo::isVirtualRegister(DefReg) ||
             !MFI.isVRegStackified(DefReg))

 /// to this:
 ///
 ///    DefReg = INST ...     // Def (to become the new Insert)
 ///    TeeReg, Reg = TEE_... DefReg
 ///    INST ..., TeeReg, ... // Insert
 ///    INST ..., Reg, ...
 ///    INST ..., Reg, ...
 ///
-/// with DefReg and TeeReg stackified. This eliminates a get_local from the
+/// with DefReg and TeeReg stackified. This eliminates a local.get from the
 /// resulting code.
 static MachineInstr *MoveAndTeeForMultiUse(
     unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB,
     MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI,
     MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) {
   LLVM_DEBUG(dbgs() << "Move and tee for multi-use:"; Def->dump());
 
   // Move Def into place.
bool HasRemainingOperands(const MachineInstr *Instr) const {
     const RangeTy &Range = Worklist.back();
     return Range.begin() != Range.end() && Range.begin()->getParent() == Instr;
   }
 
   /// Test whether the given register is present on the stack, indicating an
   /// operand in the tree that we haven't visited yet. Moving a definition of
   /// Reg to a point in the tree after that would change its value.
   ///
-  /// This is needed as a consequence of using implicit get_locals for
-  /// uses and implicit set_locals for defs.
+  /// This is needed as a consequence of using implicit local.gets for
+  /// uses and implicit local.sets for defs.
   bool IsOnStack(unsigned Reg) const {
     for (const RangeTy &Range : Worklist)
       for (const MachineOperand &MO : Range)
         if (MO.isReg() && MO.getReg() == Reg)
           return true;
     return false;
   }
 };

llvm/trunk/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp

 /// \file
 /// This file implements an optimization pass using store result values.
 ///
 /// WebAssembly's store instructions return the stored value. This is to enable
 /// an optimization wherein uses of the stored value can be replaced by uses of
 /// the store's result value, making the stored value register more likely to
 /// be single-use, thus more likely to be useful to register stackifying, and
 /// potentially also exposing the store to register stackifying. These both can
-/// reduce get_local/set_local traffic.
+/// reduce local.get/local.set traffic.
 ///
 /// This pass also performs this optimization for memcpy, memmove, and memset
 /// calls, since the LLVM intrinsics for these return void so they can't use the
 /// returned attribute and consequently aren't handled by the OptimizeReturned
 /// pass.
 ///
 //===----------------------------------------------------------------------===//
 

llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp

if (getOptLevel() != CodeGenOpt::None) {
     addPass(createWebAssemblyRegStackify());
 
     // Run the register coloring pass to reduce the total number of registers.
     // This runs after stackification so that it doesn't consider registers
     // that become stackified.
     addPass(createWebAssemblyRegColoring());
   }
 
-  // Insert explicit get_local and set_local operators.
+  // Insert explicit local.get and local.set operators.
   addPass(createWebAssemblyExplicitLocals());
 
   // Sort the blocks of the CFG into topological order, a prerequisite for
   // BLOCK and LOOP markers.
   addPass(createWebAssemblyCFGSort());
 
   // Insert BLOCK and LOOP markers.
   addPass(createWebAssemblyCFGStackify());

llvm/trunk/test/CodeGen/WebAssembly/atomic-rmw.ll

 ;===----------------------------------------------------------------------------
 ; Atomic truncating & sign-extending RMWs
 ;===----------------------------------------------------------------------------
 
 ; add
 
 ; CHECK-LABEL: add_sext_i8_i32:
 ; CHECK-NEXT: .functype add_sext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @add_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: add_sext_i16_i32:
 ; CHECK-NEXT: .functype add_sext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @add_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw add i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: add_sext_i8_i64:
 ; CHECK-NEXT: .functype add_sext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @add_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw add i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: add_sext_i16_i64:
 ; CHECK-NEXT: .functype add_sext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @add_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw add i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.add, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.add, i64.extend_i32_s
 ; CHECK-LABEL: add_sext_i32_i64:
 ; CHECK-NEXT: .functype add_sext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push0=, $1{{$}}
+; CHECK: i32.wrap_i64 $push0=, $1{{$}}
 ; CHECK: i32.atomic.rmw.add $push1=, 0($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 ; CHECK-NEXT: return $pop2{{$}}
 define i64 @add_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw add i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; sub
 
 ; CHECK-LABEL: sub_sext_i8_i32:
 ; CHECK-NEXT: .functype sub_sext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @sub_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw sub i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sub_sext_i16_i32:
 ; CHECK-NEXT: .functype sub_sext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @sub_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw sub i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sub_sext_i8_i64:
 ; CHECK-NEXT: .functype sub_sext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @sub_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw sub i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sub_sext_i16_i64:
 ; CHECK-NEXT: .functype sub_sext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @sub_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw sub i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.sub, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.sub, i64.extend_i32_s
 ; CHECK-LABEL: sub_sext_i32_i64:
 ; CHECK-NEXT: .functype sub_sext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push0=, $1
+; CHECK: i32.wrap_i64 $push0=, $1
 ; CHECK: i32.atomic.rmw.sub $push1=, 0($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 ; CHECK-NEXT: return $pop2{{$}}
 define i64 @sub_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw sub i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; and
 
 ; CHECK-LABEL: and_sext_i8_i32:
 ; CHECK-NEXT: .functype and_sext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @and_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw and i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: and_sext_i16_i32:
 ; CHECK-NEXT: .functype and_sext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @and_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw and i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: and_sext_i8_i64:
 ; CHECK-NEXT: .functype and_sext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @and_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw and i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: and_sext_i16_i64:
 ; CHECK-NEXT: .functype and_sext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @and_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw and i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.and, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.and, i64.extend_i32_s
 ; CHECK-LABEL: and_sext_i32_i64:
 ; CHECK-NEXT: .functype and_sext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push0=, $1{{$}}
+; CHECK: i32.wrap_i64 $push0=, $1{{$}}
 ; CHECK: i32.atomic.rmw.and $push1=, 0($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 ; CHECK-NEXT: return $pop2{{$}}
 define i64 @and_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw and i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; or
 
 ; CHECK-LABEL: or_sext_i8_i32:
 ; CHECK-NEXT: .functype or_sext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @or_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw or i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: or_sext_i16_i32:
 ; CHECK-NEXT: .functype or_sext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @or_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw or i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: or_sext_i8_i64:
 ; CHECK-NEXT: .functype or_sext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @or_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw or i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: or_sext_i16_i64:
 ; CHECK-NEXT: .functype or_sext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @or_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw or i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.or, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.or, i64.extend_i32_s
 ; CHECK-LABEL: or_sext_i32_i64:
 ; CHECK-NEXT: .functype or_sext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push0=, $1{{$}}
+; CHECK: i32.wrap_i64 $push0=, $1{{$}}
 ; CHECK: i32.atomic.rmw.or $push1=, 0($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 ; CHECK-NEXT: return $pop2{{$}}
 define i64 @or_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw or i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; xor
 
 ; CHECK-LABEL: xor_sext_i8_i32:
 ; CHECK-NEXT: .functype xor_sext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @xor_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw xor i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xor_sext_i16_i32:
 ; CHECK-NEXT: .functype xor_sext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @xor_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw xor i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xor_sext_i8_i64:
 ; CHECK-NEXT: .functype xor_sext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @xor_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw xor i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: xor_sext_i16_i64:
 ; CHECK-NEXT: .functype xor_sext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @xor_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw xor i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.xor, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.xor, i64.extend_i32_s
 ; CHECK-LABEL: xor_sext_i32_i64:
 ; CHECK-NEXT: .functype xor_sext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push0=, $1{{$}}
+; CHECK: i32.wrap_i64 $push0=, $1{{$}}
 ; CHECK: i32.atomic.rmw.xor $push1=, 0($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 ; CHECK-NEXT: return $pop2{{$}}
 define i64 @xor_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw xor i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; xchg
 
 ; CHECK-LABEL: xchg_sext_i8_i32:
 ; CHECK-NEXT: .functype xchg_sext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @xchg_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw xchg i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xchg_sext_i16_i32:
 ; CHECK-NEXT: .functype xchg_sext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @xchg_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw xchg i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xchg_sext_i8_i64:
 ; CHECK-NEXT: .functype xchg_sext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @xchg_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw xchg i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: xchg_sext_i16_i64:
 ; CHECK-NEXT: .functype xchg_sext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @xchg_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw xchg i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.xchg, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.xchg, i64.extend_i32_s
 ; CHECK-LABEL: xchg_sext_i32_i64:
 ; CHECK-NEXT: .functype xchg_sext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push0=, $1{{$}}
+; CHECK: i32.wrap_i64 $push0=, $1{{$}}
 ; CHECK: i32.atomic.rmw.xchg $push1=, 0($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 ; CHECK-NEXT: return $pop2{{$}}
 define i64 @xchg_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw xchg i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; cmpxchg
 
 ; CHECK-LABEL: cmpxchg_sext_i8_i32:
 ; CHECK-NEXT: .functype cmpxchg_sext_i8_i32 (i32, i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @cmpxchg_sext_i8_i32(i8* %p, i32 %exp, i32 %new) {
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: cmpxchg_sext_i16_i32:
 ; CHECK-NEXT: .functype cmpxchg_sext_i16_i32 (i32, i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw16.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i32 @cmpxchg_sext_i16_i32(i16* %p, i32 %exp, i32 %new) {
   %exp_t = trunc i32 %exp to i16
   %new_t = trunc i32 %new to i16
   %pair = cmpxchg i16* %p, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: cmpxchg_sext_i8_i64:
 ; CHECK-NEXT: .functype cmpxchg_sext_i8_i64 (i32, i64, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw8.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: i64.extend8_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @cmpxchg_sext_i8_i64(i8* %p, i64 %exp, i64 %new) {
   %exp_t = trunc i64 %exp to i8
   %new_t = trunc i64 %new to i8
   %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: cmpxchg_sext_i16_i64:
 ; CHECK-NEXT: .functype cmpxchg_sext_i16_i64 (i32, i64, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw16.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @cmpxchg_sext_i16_i64(i16* %p, i64 %exp, i64 %new) {
   %exp_t = trunc i64 %exp to i16
   %new_t = trunc i64 %new to i16
   %pair = cmpxchg i16* %p, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.cmpxchg, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.cmpxchg, i64.extend_i32_s
 ; CHECK-LABEL: cmpxchg_sext_i32_i64:
 ; CHECK-NEXT: .functype cmpxchg_sext_i32_i64 (i32, i64, i64) -> (i64){{$}}
-; CHECK: i32.wrap/i64 $push1=, $1{{$}}
-; CHECK-NEXT: i32.wrap/i64 $push0=, $2{{$}}
+; CHECK: i32.wrap_i64 $push1=, $1{{$}}
+; CHECK-NEXT: i32.wrap_i64 $push0=, $2{{$}}
 ; CHECK-NEXT: i32.atomic.rmw.cmpxchg $push2=, 0($0), $pop1, $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push3=, $pop2{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push3=, $pop2{{$}}
 ; CHECK-NEXT: return $pop3{{$}}
 define i64 @cmpxchg_sext_i32_i64(i32* %p, i64 %exp, i64 %new) {
   %exp_t = trunc i64 %exp to i32
   %new_t = trunc i64 %new to i32
   %pair = cmpxchg i32* %p, i32 %exp_t, i32 %new_t seq_cst seq_cst
   %old = extractvalue { i32, i1 } %pair, 0
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ; Unsupported instructions are expanded using cmpxchg with a loop.
 ; Here we take a nand as an example.
 
 ; nand
 
 ; CHECK-LABEL: nand_sext_i8_i32:
 ; CHECK-NEXT: .functype nand_sext_i8_i32 (i32, i32) -> (i32){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw8_u.cmpxchg
+; CHECK: i32.atomic.rmw8.cmpxchg_u
 ; CHECK: i32.extend8_s
 define i32 @nand_sext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw nand i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: nand_sext_i16_i32:
 ; CHECK-NEXT: .functype nand_sext_i16_i32 (i32, i32) -> (i32){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw16_u.cmpxchg
+; CHECK: i32.atomic.rmw16.cmpxchg_u
 ; CHECK: i32.extend16_s
 define i32 @nand_sext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw nand i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i32
   ret i32 %e
 }
 
-; FIXME Currently this cannot make use of i64.atomic.rmw8_u.cmpxchg
+; FIXME Currently this cannot make use of i64.atomic.rmw8.cmpxchg_u
 ; CHECK-LABEL: nand_sext_i8_i64:
 ; CHECK-NEXT: .functype nand_sext_i8_i64 (i32, i64) -> (i64){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw8_u.cmpxchg
-; CHECK: i64.extend_u/i32
+; CHECK: i32.atomic.rmw8.cmpxchg_u
+; CHECK: i64.extend_i32_u
 ; CHECK: i64.extend8_s
 define i64 @nand_sext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw nand i8* %p, i8 %t seq_cst
   %e = sext i8 %old to i64
   ret i64 %e
 }
 
-; FIXME Currently this cannot make use of i64.atomic.rmw16_u.cmpxchg
+; FIXME Currently this cannot make use of i64.atomic.rmw16.cmpxchg_u
 ; CHECK-LABEL: nand_sext_i16_i64:
 ; CHECK-NEXT: .functype nand_sext_i16_i64 (i32, i64) -> (i64){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw16_u.cmpxchg
-; CHECK: i64.extend_u/i32
+; CHECK: i32.atomic.rmw16.cmpxchg_u
+; CHECK: i64.extend_i32_u
 ; CHECK: i64.extend16_s
 define i64 @nand_sext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw nand i16* %p, i16 %t seq_cst
   %e = sext i16 %old to i64
   ret i64 %e
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.nand, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.nand, i64.extend_i32_s
 ; CHECK-LABEL: nand_sext_i32_i64:
 ; CHECK-NEXT: .functype nand_sext_i32_i64 (i32, i64) -> (i64){{$}}
 ; CHECK: loop
 ; CHECK: i32.atomic.rmw.cmpxchg
-; CHECK: i64.extend_s/i32
+; CHECK: i64.extend_i32_s
 define i64 @nand_sext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw nand i32* %p, i32 %t seq_cst
   %e = sext i32 %old to i64
   ret i64 %e
 }
 
 ;===----------------------------------------------------------------------------
 ; Atomic truncating & zero-extending RMWs
 ;===----------------------------------------------------------------------------
 
 ; add
 
 ; CHECK-LABEL: add_zext_i8_i32:
 ; CHECK-NEXT: .functype add_zext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @add_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: add_zext_i16_i32:
 ; CHECK-NEXT: .functype add_zext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @add_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw add i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: add_zext_i8_i64:
 ; CHECK-NEXT: .functype add_zext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @add_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw add i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: add_zext_i16_i64:
 ; CHECK-NEXT: .functype add_zext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @add_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw add i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: add_zext_i32_i64:
 ; CHECK-NEXT: .functype add_zext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @add_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw add i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; sub
 
 ; CHECK-LABEL: sub_zext_i8_i32:
 ; CHECK-NEXT: .functype sub_zext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @sub_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw sub i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sub_zext_i16_i32:
 ; CHECK-NEXT: .functype sub_zext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @sub_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw sub i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: sub_zext_i8_i64:
 ; CHECK-NEXT: .functype sub_zext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @sub_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw sub i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sub_zext_i16_i64:
 ; CHECK-NEXT: .functype sub_zext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @sub_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw sub i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sub_zext_i32_i64:
 ; CHECK-NEXT: .functype sub_zext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.sub $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.sub_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @sub_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw sub i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; and
 
 ; CHECK-LABEL: and_zext_i8_i32:
 ; CHECK-NEXT: .functype and_zext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @and_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw and i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: and_zext_i16_i32:
 ; CHECK-NEXT: .functype and_zext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @and_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw and i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: and_zext_i8_i64:
 ; CHECK-NEXT: .functype and_zext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @and_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw and i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: and_zext_i16_i64:
 ; CHECK-NEXT: .functype and_zext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @and_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw and i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: and_zext_i32_i64:
 ; CHECK-NEXT: .functype and_zext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.and $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.and_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @and_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw and i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; or
 
 ; CHECK-LABEL: or_zext_i8_i32:
 ; CHECK-NEXT: .functype or_zext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @or_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw or i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: or_zext_i16_i32:
 ; CHECK-NEXT: .functype or_zext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @or_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw or i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: or_zext_i8_i64:
 ; CHECK-NEXT: .functype or_zext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @or_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw or i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: or_zext_i16_i64:
 ; CHECK-NEXT: .functype or_zext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @or_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw or i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: or_zext_i32_i64:
 ; CHECK-NEXT: .functype or_zext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.or $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.or_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @or_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw or i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; xor
 
 ; CHECK-LABEL: xor_zext_i8_i32:
 ; CHECK-NEXT: .functype xor_zext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @xor_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw xor i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xor_zext_i16_i32:
 ; CHECK-NEXT: .functype xor_zext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @xor_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw xor i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xor_zext_i8_i64:
 ; CHECK-NEXT: .functype xor_zext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xor_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw xor i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: xor_zext_i16_i64:
 ; CHECK-NEXT: .functype xor_zext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xor_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw xor i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: xor_zext_i32_i64:
 ; CHECK-NEXT: .functype xor_zext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.xor $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.xor_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xor_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw xor i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; xchg
 
 ; CHECK-LABEL: xchg_zext_i8_i32:
 ; CHECK-NEXT: .functype xchg_zext_i8_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @xchg_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw xchg i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xchg_zext_i16_i32:
 ; CHECK-NEXT: .functype xchg_zext_i16_i32 (i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @xchg_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw xchg i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: xchg_zext_i8_i64:
 ; CHECK-NEXT: .functype xchg_zext_i8_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw8.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xchg_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw xchg i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: xchg_zext_i16_i64:
 ; CHECK-NEXT: .functype xchg_zext_i16_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xchg_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw xchg i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: xchg_zext_i32_i64:
 ; CHECK-NEXT: .functype xchg_zext_i32_i64 (i32, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.xchg $push0=, 0($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.xchg_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xchg_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw xchg i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; cmpxchg
 
 ; CHECK-LABEL: cmpxchg_zext_i8_i32:
 ; CHECK-NEXT: .functype cmpxchg_zext_i8_i32 (i32, i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @cmpxchg_zext_i8_i32(i8* %p, i32 %exp, i32 %new) {
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: cmpxchg_zext_i16_i32:
 ; CHECK-NEXT: .functype cmpxchg_zext_i16_i32 (i32, i32, i32) -> (i32){{$}}
-; CHECK: i32.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw16.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @cmpxchg_zext_i16_i32(i16* %p, i32 %exp, i32 %new) {
   %exp_t = trunc i32 %exp to i16
   %new_t = trunc i32 %new to i16
   %pair = cmpxchg i16* %p, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: cmpxchg_zext_i8_i64:
 ; CHECK-NEXT: .functype cmpxchg_zext_i8_i64 (i32, i64, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw8_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw8.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @cmpxchg_zext_i8_i64(i8* %p, i64 %exp, i64 %new) {
   %exp_t = trunc i64 %exp to i8
   %new_t = trunc i64 %new to i8
   %pair = cmpxchg i8* %p, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: cmpxchg_zext_i16_i64:
 ; CHECK-NEXT: .functype cmpxchg_zext_i16_i64 (i32, i64, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw16_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw16.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @cmpxchg_zext_i16_i64(i16* %p, i64 %exp, i64 %new) {
   %exp_t = trunc i64 %exp to i16
   %new_t = trunc i64 %new to i16
   %pair = cmpxchg i16* %p, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: cmpxchg_zext_i32_i64:
 ; CHECK-NEXT: .functype cmpxchg_zext_i32_i64 (i32, i64, i64) -> (i64){{$}}
-; CHECK: i64.atomic.rmw32_u.cmpxchg $push0=, 0($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw32.cmpxchg_u $push0=, 0($0), $1, $2{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @cmpxchg_zext_i32_i64(i32* %p, i64 %exp, i64 %new) {
   %exp_t = trunc i64 %exp to i32
   %new_t = trunc i64 %new to i32
   %pair = cmpxchg i32* %p, i32 %exp_t, i32 %new_t seq_cst seq_cst
   %old = extractvalue { i32, i1 } %pair, 0
   %e = zext i32 %old to i64
   ret i64 %e
 }
 
 ; Unsupported instructions are expanded using cmpxchg with a loop.
 ; Here we take a nand as an example.
 
 ; nand
 
 ; CHECK-LABEL: nand_zext_i8_i32:
 ; CHECK-NEXT: .functype nand_zext_i8_i32 (i32, i32) -> (i32){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw8_u.cmpxchg
+; CHECK: i32.atomic.rmw8.cmpxchg_u
 define i32 @nand_zext_i8_i32(i8* %p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw nand i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i32
   ret i32 %e
 }
 
 ; CHECK-LABEL: nand_zext_i16_i32:
 ; CHECK-NEXT: .functype nand_zext_i16_i32 (i32, i32) -> (i32){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw16_u.cmpxchg
+; CHECK: i32.atomic.rmw16.cmpxchg_u
 define i32 @nand_zext_i16_i32(i16* %p, i32 %v) {
   %t = trunc i32 %v to i16
   %old = atomicrmw nand i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i32
   ret i32 %e
 }
 
-; FIXME Currently this cannot make use of i64.atomic.rmw8_u.cmpxchg
+; FIXME Currently this cannot make use of i64.atomic.rmw8.cmpxchg_u
 ; CHECK-LABEL: nand_zext_i8_i64:
 ; CHECK-NEXT: .functype nand_zext_i8_i64 (i32, i64) -> (i64){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw8_u.cmpxchg
-; CHECK: i64.extend_u/i32
+; CHECK: i32.atomic.rmw8.cmpxchg_u
+; CHECK: i64.extend_i32_u
 define i64 @nand_zext_i8_i64(i8* %p, i64 %v) {
   %t = trunc i64 %v to i8
   %old = atomicrmw nand i8* %p, i8 %t seq_cst
   %e = zext i8 %old to i64
   ret i64 %e
 }
 
-; FIXME Currently this cannot make use of i64.atomic.rmw16_u.cmpxchg
+; FIXME Currently this cannot make use of i64.atomic.rmw16.cmpxchg_u
 ; CHECK-LABEL: nand_zext_i16_i64:
 ; CHECK-NEXT: .functype nand_zext_i16_i64 (i32, i64) -> (i64){{$}}
 ; CHECK: loop
-; CHECK: i32.atomic.rmw16_u.cmpxchg
-; CHECK: i64.extend_u/i32
+; CHECK: i32.atomic.rmw16.cmpxchg_u
+; CHECK: i64.extend_i32_u
 define i64 @nand_zext_i16_i64(i16* %p, i64 %v) {
   %t = trunc i64 %v to i16
   %old = atomicrmw nand i16* %p, i16 %t seq_cst
   %e = zext i16 %old to i64
   ret i64 %e
 }
 
-; FIXME Currently this cannot make use of i64.atomic.rmw32_u.cmpxchg
+; FIXME Currently this cannot make use of i64.atomic.rmw32.cmpxchg_u
 ; CHECK-LABEL: nand_zext_i32_i64:
 ; CHECK-NEXT: .functype nand_zext_i32_i64 (i32, i64) -> (i64){{$}}
 ; CHECK: loop
 ; CHECK: i32.atomic.rmw.cmpxchg
-; CHECK: i64.extend_u/i32
+; CHECK: i64.extend_i32_u
 define i64 @nand_zext_i32_i64(i32* %p, i64 %v) {
   %t = trunc i64 %v to i32
   %old = atomicrmw nand i32* %p, i32 %t seq_cst
   %e = zext i32 %old to i64
   ret i64 %e
 }

llvm/trunk/test/CodeGen/WebAssembly/byval.ll

 declare void @ext_byval_func_align8(%SmallStruct* byval align 8)
 declare void @ext_byval_func_alignedstruct(%AlignedStruct* byval)
 declare void @ext_byval_func_empty(%EmptyStruct* byval)
 
 ; CHECK-LABEL: byval_arg
 define void @byval_arg(%SmallStruct* %ptr) {
  ; CHECK: .functype byval_arg (i32) -> ()
  ; Subtract 16 from SP (SP is 16-byte aligned)
- ; CHECK-NEXT: get_global $push[[L2:.+]]=, __stack_pointer@GLOBAL
+ ; CHECK-NEXT: global.get $push[[L2:.+]]=, __stack_pointer@GLOBAL
  ; CHECK-NEXT: i32.const $push[[L3:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L11:.+]]=, $pop[[L2]], $pop[[L3]]
  ; Ensure SP is stored back before the call
- ; CHECK-NEXT: tee_local $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
+ ; CHECK-NEXT: local.tee $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
  ; Copy the SmallStruct argument to the stack (SP+12, original SP-4)
  ; CHECK-NEXT: i32.load $push[[L0:.+]]=, 0($0)
  ; CHECK-NEXT: i32.store 12($[[SP]]), $pop[[L0]]
  ; Pass a pointer to the stack slot to the function
  ; CHECK-NEXT: i32.const $push[[L5:.+]]=, 12{{$}}
  ; CHECK-NEXT: i32.add $push[[ARG:.+]]=, $[[SP]], $pop[[L5]]{{$}}
  ; CHECK-NEXT: call ext_byval_func@FUNCTION, $pop[[ARG]]{{$}}
  call void @ext_byval_func(%SmallStruct* byval %ptr)
  ; Restore the stack
  ; CHECK-NEXT: i32.const $push[[L6:.+]]=, 16
  ; CHECK-NEXT: i32.add $push[[L8:.+]]=, $[[SP]], $pop[[L6]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L8]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L8]]
  ; CHECK-NEXT: return
  ret void
 }
 
 ; CHECK-LABEL: byval_arg_align8
 define void @byval_arg_align8(%SmallStruct* %ptr) {
  ; CHECK: .functype byval_arg_align8 (i32) -> ()
  ; Don't check the entire SP sequence, just enough to get the alignment.
  ; CHECK: i32.const $push[[L1:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L11:.+]]=, {{.+}}, $pop[[L1]]
- ; CHECK-NEXT: tee_local $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
+ ; CHECK-NEXT: local.tee $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
  ; Copy the SmallStruct argument to the stack (SP+8, original SP-8)
  ; CHECK-NEXT: i32.load $push[[L0:.+]]=, 0($0){{$}}
  ; CHECK-NEXT: i32.store 8($[[SP]]), $pop[[L0]]{{$}}
  ; Pass a pointer to the stack slot to the function
  ; CHECK-NEXT: i32.const $push[[L5:.+]]=, 8{{$}}
  ; CHECK-NEXT: i32.add $push[[ARG:.+]]=, $[[SP]], $pop[[L5]]{{$}}
  ; CHECK-NEXT: call ext_byval_func_align8@FUNCTION, $pop[[ARG]]{{$}}
  call void @ext_byval_func_align8(%SmallStruct* byval align 8 %ptr)
  ret void
 }
 
 ; CHECK-LABEL: byval_arg_double
 define void @byval_arg_double(%AlignedStruct* %ptr) {
  ; CHECK: .functype byval_arg_double (i32) -> ()
  ; Subtract 16 from SP (SP is 16-byte aligned)
  ; CHECK: i32.const $push[[L1:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L14:.+]]=, {{.+}}, $pop[[L1]]
- ; CHECK-NEXT: tee_local $push[[L13:.+]]=, $[[SP:.+]]=, $pop[[L14]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L13]]
+ ; CHECK-NEXT: local.tee $push[[L13:.+]]=, $[[SP:.+]]=, $pop[[L14]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L13]]
  ; Copy the AlignedStruct argument to the stack (SP+0, original SP-16)
  ; Just check the last load/store pair of the memcpy
  ; CHECK: i64.load $push[[L4:.+]]=, 0($0)
  ; CHECK-NEXT: i64.store 0($[[SP]]), $pop[[L4]]
  ; Pass a pointer to the stack slot to the function
  ; CHECK-NEXT: call ext_byval_func_alignedstruct@FUNCTION, $[[SP]]
  tail call void @ext_byval_func_alignedstruct(%AlignedStruct* byval %ptr)
  ret void

  ; CHECK: .functype byval_empty_callee (i32) -> ()
  ; CHECK: call ext_func_empty@FUNCTION, $0
  call void @ext_func_empty(%EmptyStruct* %ptr)
  ret void
 }
 
 ; Call memcpy for "big" byvals.
 ; CHECK-LABEL: big_byval:
-; CHECK:      get_global $push[[L2:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK:      global.get $push[[L2:.+]]=, __stack_pointer@GLOBAL{{$}}
 ; CHECK-NEXT: i32.const $push[[L3:.+]]=, 131072
 ; CHECK-NEXT: i32.sub $push[[L11:.+]]=, $pop[[L2]], $pop[[L3]]
-; CHECK-NEXT: tee_local $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
+; CHECK-NEXT: local.tee $push[[L10:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
 ; CHECK-NEXT: i32.const $push[[L0:.+]]=, 131072
 ; CHECK-NEXT: i32.call       $push[[L11:.+]]=, memcpy@FUNCTION, $[[SP]], ${{.+}}, $pop{{.+}}
-; CHECK-NEXT: tee_local      $push[[L9:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
+; CHECK-NEXT: local.tee      $push[[L9:.+]]=, $[[SP:.+]]=, $pop[[L11]]{{$}}
 ; CHECK-NEXT: call           big_byval_callee@FUNCTION,
 %big = type [131072 x i8]
 declare void @big_byval_callee(%big* byval align 1)
 define void @big_byval(%big* byval align 1 %x) {
   call void @big_byval_callee(%big* byval align 1 %x)
   ret void
 }

llvm/trunk/test/CodeGen/WebAssembly/call.ll

 ; CHECK-NEXT: return{{$}}
 define void @call_void_nullary() {
   call void @void_nullary()
   ret void
 }
 
 ; CHECK-LABEL: call_i32_unary:
 ; CHECK-NEXT: .functype call_i32_unary (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_unary@FUNCTION, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_unary(i32 %a) {
   %r = call i32 @i32_unary(i32 %a)
   ret i32 %r
 }
 
 ; CHECK-LABEL: call_i32_binary:
 ; CHECK-NEXT: .functype call_i32_binary (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: {{^}} i32.call $push[[NUM:[0-9]+]]=, i32_binary@FUNCTION, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_i32_binary(i32 %a, i32 %b) {
   %r = call i32 @i32_binary(i32 %a, i32 %b)
   ret i32 %r
 }
 
 ; CHECK-LABEL: call_indirect_void:
 ; CHECK-NEXT: .functype call_indirect_void (i32) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} call_indirect $pop[[L0]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @call_indirect_void(void ()* %callee) {
   call void %callee()
   ret void
 }
 
 ; CHECK-LABEL: call_indirect_i32:
 ; CHECK-NEXT: .functype call_indirect_i32 (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} i32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @call_indirect_i32(i32 ()* %callee) {
   %t = call i32 %callee()
   ret i32 %t
 }
 
 ; CHECK-LABEL: call_indirect_i64:
 ; CHECK-NEXT: .functype call_indirect_i64 (i32) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} i64.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @call_indirect_i64(i64 ()* %callee) {
   %t = call i64 %callee()
   ret i64 %t
 }
 
 ; CHECK-LABEL: call_indirect_float:
 ; CHECK-NEXT: .functype call_indirect_float (i32) -> (f32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} f32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @call_indirect_float(float ()* %callee) {
   %t = call float %callee()
   ret float %t
 }
 
 ; CHECK-LABEL: call_indirect_double:
 ; CHECK-NEXT: .functype call_indirect_double (i32) -> (f64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} f64.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @call_indirect_double(double ()* %callee) {
   %t = call double %callee()
   ret double %t
 }
 
 ; CHECK-LABEL: call_indirect_v128:
 ; CHECK-NEXT: .functype call_indirect_v128 (i32) -> (v128){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} v128.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define <16 x i8> @call_indirect_v128(<16 x i8> ()* %callee) {
   %t = call <16 x i8> %callee()
   ret <16 x i8> %t
 }
 
 ; CHECK-LABEL: call_indirect_arg:
 ; CHECK-NEXT: .functype call_indirect_arg (i32, i32) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} call_indirect $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @call_indirect_arg(void (i32)* %callee, i32 %arg) {
   call void %callee(i32 %arg)
   ret void
 }
 
 ; CHECK-LABEL: call_indirect_arg_2:
 ; CHECK-NEXT: .functype call_indirect_arg_2 (i32, i32, i32) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 2{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 2{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: {{^}} i32.call_indirect $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]], $pop[[L2]]{{$}}
 ; CHECK-NEXT: drop $pop[[NUM]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @call_indirect_arg_2(i32 (i32, i32)* %callee, i32 %arg, i32 %arg2) {
   call i32 %callee(i32 %arg, i32 %arg2)
   ret void
 }
 

llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify-dbg-skip.ll

 ; RUN: llc %s -stop-after wasm-cfg-stackify -o - | FileCheck %s
 
 ; The test ensures "block" instruction is not inserted in the middle of a group
 ; of instructions that form a stackified expression when DBG_VALUE is present
 ; among them.
 
 ; CHECK: body:
 ; CHECK: BLOCK
 ;                       <-- Stackified expression starts
-; CHECK-NEXT: GET_LOCAL_I64
+; CHECK-NEXT: LOCAL_GET_I64
 ; CHECK-NEXT: I32_WRAP_I64
 ; CHECK-NEXT: DBG_VALUE
 ;                       <-- BLOCK should NOT be placed here!
 ; CHECK-NEXT: BR_UNLESS
 ;                       <-- Stackified expression ends
 
 target triple = "wasm32-unknown-unknown"
 

llvm/trunk/test/CodeGen/WebAssembly/cfg-stackify-eh.mir

; CHECK-LABEL: bb.0:
     ; CHECK: TRY
     ; CHECK-NEXT: CALL_VOID @may_throw
 
   bb.1 (landing-pad):
   ; predecessors: %bb.0
     successors: %bb.2, %bb.7
 
     %30:i32 = CATCH_I32 0, implicit-def dead $arguments
-    SET_LOCAL_I32 0, %30:i32, implicit-def $arguments
+    LOCAL_SET_I32 0, %30:i32, implicit-def $arguments
     %16:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %27:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     STORE_I32 2, @__wasm_lpad_context + 4, %16:i32, %27:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack :: (store 4 into `i8** getelementptr inbounds ({ i32, i8*, i32 }, { i32, i8*, i32 }* @__wasm_lpad_context, i32 0, i32 1)`)
     %26:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %25:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     STORE_I32 2, @__wasm_lpad_context, %26:i32, %25:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack :: (store 4 into `i32* getelementptr inbounds ({ i32, i8*, i32 }, { i32, i8*, i32 }* @__wasm_lpad_context, i32 0, i32 0)`)
-    %32:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %32:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %31:i32 = CALL_I32 @_Unwind_CallPersonality, %32:i32, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     DROP_I32 killed %31:i32, implicit-def $arguments
     %24:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %17:i32 = LOAD_I32 2, @__wasm_lpad_context + 8, %24:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack :: (dereferenceable load 4 from `i32* getelementptr inbounds ({ i32, i8*, i32 }, { i32, i8*, i32 }* @__wasm_lpad_context, i32 0, i32 2)`)
     %18:i32 = CONST_I32 1, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %19:i32 = NE_I32 %17:i32, %18:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     BR_IF %bb.7, %19:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
 
   bb.2:
   ; predecessors: %bb.1
     successors: %bb.8, %bb.3, %bb.6
 
-    %34:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %34:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %33:i32 = CALL_I32 @__cxa_begin_catch, %34:i32, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     DROP_I32 killed %33:i32, implicit-def $arguments
     CALL_VOID @may_throw, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     BR %bb.8, implicit-def $arguments
   ; CHECK-LABEL: bb.2:
     ; CHECK: DROP_I32
     ; CHECK-NEXT: TRY
     ; CHECK-NEXT: TRY
     ; CHECK-NEXT: CALL_VOID @may_throw
 
   bb.3 (landing-pad):
   ; predecessors: %bb.2
     successors: %bb.4, %bb.5
 
     %35:i32 = CATCH_I32 0, implicit-def dead $arguments
-    SET_LOCAL_I32 0, %35:i32, implicit-def $arguments
+    LOCAL_SET_I32 0, %35:i32, implicit-def $arguments
     %21:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %20:i32 = CONST_I32 1, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     STORE_I32 2, @__wasm_lpad_context, %21:i32, %20:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack :: (store 4 into `i32* getelementptr inbounds ({ i32, i8*, i32 }, { i32, i8*, i32 }* @__wasm_lpad_context, i32 0, i32 0)`)
-    %37:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %37:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %36:i32 = CALL_I32 @_Unwind_CallPersonality, %37:i32, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     DROP_I32 killed %36:i32, implicit-def $arguments
     %29:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %22:i32 = LOAD_I32 2, @__wasm_lpad_context + 8, %29:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack :: (dereferenceable load 4 from `i32* getelementptr inbounds ({ i32, i8*, i32 }, { i32, i8*, i32 }* @__wasm_lpad_context, i32 0, i32 2)`)
     %28:i32 = CONST_I32 1, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %23:i32 = NE_I32 %22:i32, %28:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     BR_IF %bb.5, %23:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
 
   bb.4:
   ; predecessors: %bb.3
     successors: %bb.8
 
-    %39:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %39:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %38:i32 = CALL_I32 @__cxa_begin_catch, %39:i32, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     DROP_I32 killed %38:i32, implicit-def $arguments
     CALL_VOID @__cxa_end_catch, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     BR %bb.8, implicit-def $arguments
 
   bb.5:
   ; predecessors: %bb.3
     successors: %bb.6

 # CHECK-LABEL: name: test2
 liveins:
   - { reg: '$arguments', reg: '$value_stack' }
 body: |
   bb.0:
     successors: %bb.1, %bb.4
 
     %18:i32 = CONST_I32 0, implicit-def dead $arguments
-    SET_LOCAL_I32 1, %18:i32, implicit-def $arguments
+    LOCAL_SET_I32 1, %18:i32, implicit-def $arguments
     %14:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
-    %19:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %19:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %9:i32 = GE_S_I32 %14:i32, %19:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     BR_IF %bb.4, %9:i32, implicit-def $arguments
 
   bb.1:
   ; predecessors: %bb.0, %bb.3
     successors: %bb.3, %bb.2
 
     CALL_VOID @may_throw, implicit-def dead $arguments, implicit $sp32, implicit $sp64
; predecessors: %bb.1
     DROP_I32 killed %22:i32, implicit-def $arguments
     CALL_VOID @__cxa_end_catch, implicit-def dead $arguments, implicit $sp32, implicit $sp64
     BR %bb.4, implicit-def $arguments
 
   bb.3:
   ; predecessors: %bb.1
     successors: %bb.1, %bb.4
 
-    %20:i32 = GET_LOCAL_I32 1, implicit-def $arguments
+    %20:i32 = LOCAL_GET_I32 1, implicit-def $arguments
     %17:i32 = CONST_I32 1, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %16:i32 = ADD_I32 %20:i32, %17:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
-    %15:i32 = TEE_LOCAL_I32 1, %16:i32, implicit-def $arguments
-    %21:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %15:i32 = LOCAL_TEE_I32 1, %16:i32, implicit-def $arguments
+    %21:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %10:i32 = GE_S_I32 %15:i32, %21:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     BR_UNLESS %bb.1, %10:i32, implicit-def $arguments
   ; CHECK-LABEL: bb.3:
     ; CHECK: END_TRY
 
   bb.4:
   ; predecessors: %bb.2, %bb.0, %bb.3
 
body: |
   bb.1 (landing-pad):
   ; predecessors: %bb.0
     successors: %bb.2, %bb.3
 
     %9:i32 = CATCH_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %18:i32 = CALL_I32 @__cxa_begin_catch, %9:i32, implicit-def dead $arguments, implicit $sp32, implicit $sp64, implicit-def $value_stack, implicit $value_stack
     DROP_I32 killed %18:i32, implicit-def $arguments
     %19:i32 = CONST_I32 0, implicit-def dead $arguments
-    SET_LOCAL_I32 1, %19:i32, implicit-def $arguments
+    LOCAL_SET_I32 1, %19:i32, implicit-def $arguments
     %14:i32 = CONST_I32 0, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
-    %20:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %20:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %10:i32 = GE_S_I32 %14:i32, %20:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     BR_IF %bb.3, %10:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
 
   bb.2:
   ; predecessors: %bb.1, %bb.2
     successors: %bb.2, %bb.3
 
     CALL_VOID @dont_throw, implicit-def dead $arguments, implicit $sp32, implicit $sp64
-    %21:i32 = GET_LOCAL_I32 1, implicit-def $arguments
+    %21:i32 = LOCAL_GET_I32 1, implicit-def $arguments
     %17:i32 = CONST_I32 1, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     %16:i32 = ADD_I32 %21:i32, %17:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
-    %15:i32 = TEE_LOCAL_I32 1, %16:i32, implicit-def $arguments
-    %22:i32 = GET_LOCAL_I32 0, implicit-def $arguments
+    %15:i32 = LOCAL_TEE_I32 1, %16:i32, implicit-def $arguments
+    %22:i32 = LOCAL_GET_I32 0, implicit-def $arguments
     %11:i32 = GE_S_I32 %15:i32, %22:i32, implicit-def dead $arguments, implicit-def $value_stack, implicit $value_stack
     BR_UNLESS %bb.2, %11:i32, implicit-def $arguments, implicit-def $value_stack, implicit $value_stack
 
   bb.3:
   ; predecessors: %bb.1, %bb.2
     successors: %bb.4
 
     CALL_VOID @__cxa_end_catch, implicit-def dead $arguments, implicit $sp32, implicit $sp64
 
   bb.4:
   ; predecessors: %bb.0, %bb.3
 
     RETURN_VOID implicit-def dead $arguments
   ; CHECK-LABEL: bb.4:
     ; CHECK: END_TRY

llvm/trunk/test/CodeGen/WebAssembly/comparisons-f32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 32-bit floating-point comparison operations assemble as
 ; expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f32:
 ; CHECK-NEXT: .functype ord_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
 ; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ord_f32(float %x, float %y) {
   %a = fcmp ord float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uno_f32:
 ; CHECK-NEXT: .functype uno_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
 ; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @uno_f32(float %x, float %y) {
   %a = fcmp uno float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: oeq_f32:
 ; CHECK-NEXT: .functype oeq_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @oeq_f32(float %x, float %y) {
   %a = fcmp oeq float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
define i32 @oge_f32(float %x, float %y) {
   ret i32 %b
 }
 
 ; Expanded comparisons, which also check for NaN.
 ; These simply rely on SDAG's Expand cond code action.
 
 ; CHECK-LABEL: ueq_f32:
 ; CHECK-NEXT: .functype ueq_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
-; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L5:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
 ; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
 ; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM4]]{{$}}
 define i32 @ueq_f32(float %x, float %y) {
   %a = fcmp ueq float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: one_f32:
 ; CHECK-NEXT: .functype one_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
-; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L5:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
 ; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
 ; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM4]]
 define i32 @one_f32(float %x, float %y) {
   %a = fcmp one float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ult_f32:
 ; CHECK-NEXT: .functype ult_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ult_f32(float %x, float %y) {
   %a = fcmp ult float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ule_f32:
 ; CHECK-NEXT: .functype ule_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ule_f32(float %x, float %y) {
   %a = fcmp ule float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ugt_f32:
 ; CHECK-NEXT: .functype ugt_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ugt_f32(float %x, float %y) {
   %a = fcmp ugt float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uge_f32:
 ; CHECK-NEXT: .functype uge_f32 (f32, f32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @uge_f32(float %x, float %y) {
   %a = fcmp uge float %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }

llvm/trunk/test/CodeGen/WebAssembly/comparisons-f64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 64-bit floating-point comparison operations assemble as
 ; expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ord_f64:
 ; CHECK-NEXT: .functype ord_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
 ; CHECK-NEXT: i32.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ord_f64(double %x, double %y) {
   %a = fcmp ord double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uno_f64:
 ; CHECK-NEXT: .functype uno_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
 ; CHECK-NEXT: i32.or $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @uno_f64(double %x, double %y) {
   %a = fcmp uno double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: oeq_f64:
 ; CHECK-NEXT: .functype oeq_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @oeq_f64(double %x, double %y) {
   %a = fcmp oeq double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
define i32 @oge_f64(double %x, double %y) {
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; Expanded comparisons, which also check for NaN.
 
 ; CHECK-LABEL: ueq_f64:
 ; CHECK-NEXT: .functype ueq_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
-; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L5:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
 ; CHECK-NEXT: i32.or $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
 ; CHECK-NEXT: i32.or $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM4]]{{$}}
 define i32 @ueq_f64(double %x, double %y) {
   %a = fcmp ueq double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: one_f64:
 ; CHECK-NEXT: .functype one_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.ne $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK-NEXT: get_local $push[[L2:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L3:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L2:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L3:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM1:[0-9]+]]=, $pop[[L2]], $pop[[L3]]{{$}}
-; CHECK-NEXT: get_local $push[[L4:[0-9]+]]=, 1{{$}}
-; CHECK-NEXT: get_local $push[[L5:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L4:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L5:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.eq $push[[NUM2:[0-9]+]]=, $pop[[L4]], $pop[[L5]]{{$}}
 ; CHECK-NEXT: i32.and $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
 ; CHECK-NEXT: i32.and $push[[NUM4:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM3]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM4]]
 define i32 @one_f64(double %x, double %y) {
   %a = fcmp one double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ult_f64:
 ; CHECK-NEXT: .functype ult_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.ge $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ult_f64(double %x, double %y) {
   %a = fcmp ult double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ule_f64:
 ; CHECK-NEXT: .functype ule_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.gt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ule_f64(double %x, double %y) {
   %a = fcmp ule double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: ugt_f64:
 ; CHECK-NEXT: .functype ugt_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.le $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @ugt_f64(double %x, double %y) {
   %a = fcmp ugt double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: uge_f64:
 ; CHECK-NEXT: .functype uge_f64 (f64, f64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.lt $push[[NUM0:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: i32.const $push[[C0:[0-9]+]]=, 1
 ; CHECK-NEXT: i32.xor $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[C0]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 define i32 @uge_f64(double %x, double %y) {
   %a = fcmp uge double %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }

llvm/trunk/test/CodeGen/WebAssembly/comparisons-i32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; Test that basic 32-bit integer comparison operations assemble as expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i32:
 ; CHECK-NEXT: .functype eq_i32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @eq_i32(i32 %x, i32 %y) {
   %a = icmp eq i32 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 

llvm/trunk/test/CodeGen/WebAssembly/comparisons-i64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; Test that basic 64-bit integer comparison operations assemble as expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: eq_i64:
 ; CHECK-NEXT: .functype eq_i64 (i64, i64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.eq $push[[NUM:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @eq_i64(i64 %x, i64 %y) {
   %a = icmp eq i64 %x, %y
   %b = zext i1 %a to i32
   ret i32 %b
 }
 

llvm/trunk/test/CodeGen/WebAssembly/conv-trap.ll

 ; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
 ; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i32.trunc_s/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_s_f32(float %x) {
   %a = fptosi float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f32:
 ; CHECK-NEXT: .functype i32_trunc_u_f32 (f32) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f32.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f32.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
 ; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i32.trunc_u/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_u_f32(float %x) {
   %a = fptoui float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_s_f64:
 ; CHECK-NEXT: .functype i32_trunc_s_f64 (f64) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p31{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
 ; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, -2147483648{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i32.trunc_s/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_s_f64(double %x) {
   %a = fptosi double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f64:
 ; CHECK-NEXT: .functype i32_trunc_u_f64 (f64) -> (i32){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p32{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f64.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f64.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
 ; CHECK-NEXT: i32.const $push[[ALT:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i32.trunc_u/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_u_f64(double %x) {
   %a = fptoui double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f32:
 ; CHECK-NEXT: .functype i64_trunc_s_f32 (f32) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
 ; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i64.trunc_s/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_s_f32(float %x) {
   %a = fptosi float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f32:
 ; CHECK-NEXT: .functype i64_trunc_u_f32 (f32) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f32.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}}
 ; CHECK-NEXT: f32.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f32.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f32.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
 ; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i64.trunc_u/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_u_f32(float %x) {
   %a = fptoui float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f64:
 ; CHECK-NEXT: .functype i64_trunc_s_f64 (f64) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.abs $push[[ABS:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p63{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $pop[[ABS]], $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[LT]]{{$}}
 ; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, -9223372036854775808{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i64.trunc_s/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_s_f64(double %x) {
   %a = fptosi double %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f64:
 ; CHECK-NEXT: .functype i64_trunc_u_f64 (f64) -> (i64){{$}}
 ; CHECK-NEXT: block
 ; CHECK-NEXT: f64.const $push[[LIMIT:[0-9]+]]=, 0x1p64{{$}}
 ; CHECK-NEXT: f64.lt $push[[LT:[0-9]+]]=, $0, $pop[[LIMIT]]{{$}}
 ; CHECK-NEXT: f64.const $push[[ZERO:[0-9]+]]=, 0x0p0{{$}}
 ; CHECK-NEXT: f64.ge $push[[GE:[0-9]+]]=, $0, $pop[[ZERO]]{{$}}
 ; CHECK-NEXT: i32.and $push[[AND:[0-9]+]]=, $pop[[LT]], $pop[[GE]]{{$}}
 ; CHECK-NEXT: br_if 0, $pop[[AND]]{{$}}
 ; CHECK-NEXT: i64.const $push[[ALT:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: return $pop[[ALT]]{{$}}
 ; CHECK-NEXT: BB
 ; CHECK-NEXT: end_block
-; CHECK-NEXT: i64.trunc_u/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_u_f64(double %x) {
   %a = fptoui double %x to i64
   ret i64 %a
 }

llvm/trunk/test/CodeGen/WebAssembly/conv.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+nontrapping-fptoint | FileCheck %s
 
 ; Test that basic conversion operations assemble as expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: i32_wrap_i64:
 ; CHECK-NEXT: .functype i32_wrap_i64 (i64) -> (i32){{$}}
-; CHECK-NEXT: i32.wrap/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.wrap_i64 $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_wrap_i64(i64 %x) {
   %a = trunc i64 %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_extend_s_i32:
 ; CHECK-NEXT: .functype i64_extend_s_i32 (i32) -> (i64){{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_extend_s_i32(i32 %x) {
   %a = sext i32 %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_extend_u_i32:
 ; CHECK-NEXT: .functype i64_extend_u_i32 (i32) -> (i64){{$}}
-; CHECK-NEXT: i64.extend_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.extend_i32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_extend_u_i32(i32 %x) {
   %a = zext i32 %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i32_trunc_s_f32:
 ; CHECK-NEXT: .functype i32_trunc_s_f32 (f32) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_s_f32(float %x) {
   %a = fptosi float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_sat_s_f32:
 ; CHECK-NEXT: .functype i32_trunc_sat_s_f32 (f32) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i32 @llvm.wasm.trunc.saturate.signed.i32.f32(float)
 define i32 @i32_trunc_sat_s_f32(float %x) {
   %a = call i32 @llvm.wasm.trunc.saturate.signed.i32.f32(float %x)
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f32:
 ; CHECK-NEXT: .functype i32_trunc_u_f32 (f32) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_u_f32(float %x) {
   %a = fptoui float %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_sat_u_f32:
 ; CHECK-NEXT: .functype i32_trunc_sat_u_f32 (f32) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i32 @llvm.wasm.trunc.saturate.unsigned.i32.f32(float)
 define i32 @i32_trunc_sat_u_f32(float %x) {
   %a = call i32 @llvm.wasm.trunc.saturate.unsigned.i32.f32(float %x)
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_s_f64:
 ; CHECK-NEXT: .functype i32_trunc_s_f64 (f64) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_s_f64(double %x) {
   %a = fptosi double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_sat_s_f64:
 ; CHECK-NEXT: .functype i32_trunc_sat_s_f64 (f64) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i32 @llvm.wasm.trunc.saturate.signed.i32.f64(double)
 define i32 @i32_trunc_sat_s_f64(double %x) {
   %a = call i32 @llvm.wasm.trunc.saturate.signed.i32.f64(double %x)
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_u_f64:
 ; CHECK-NEXT: .functype i32_trunc_u_f64 (f64) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @i32_trunc_u_f64(double %x) {
   %a = fptoui double %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i32_trunc_sat_u_f64:
 ; CHECK-NEXT: .functype i32_trunc_sat_u_f64 (f64) -> (i32){{$}}
-; CHECK-NEXT: i32.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i32.trunc_sat_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i32 @llvm.wasm.trunc.saturate.unsigned.i32.f64(double)
 define i32 @i32_trunc_sat_u_f64(double %x) {
   %a = call i32 @llvm.wasm.trunc.saturate.unsigned.i32.f64(double %x)
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f32:
 ; CHECK-NEXT: .functype i64_trunc_s_f32 (f32) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_s_f32(float %x) {
   %a = fptosi float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_sat_s_f32:
 ; CHECK-NEXT: .functype i64_trunc_sat_s_f32 (f32) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_s:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i64 @llvm.wasm.trunc.saturate.signed.i64.f32(float)
 define i64 @i64_trunc_sat_s_f32(float %x) {
   %a = call i64 @llvm.wasm.trunc.saturate.signed.i64.f32(float %x)
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f32:
 ; CHECK-NEXT: .functype i64_trunc_u_f32 (f32) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_u_f32(float %x) {
   %a = fptoui float %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_sat_u_f32:
 ; CHECK-NEXT: .functype i64_trunc_sat_u_f32 (f32) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_u:sat/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i64 @llvm.wasm.trunc.saturate.unsigned.i64.f32(float)
 define i64 @i64_trunc_sat_u_f32(float %x) {
   %a = call i64 @llvm.wasm.trunc.saturate.unsigned.i64.f32(float %x)
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_s_f64:
 ; CHECK-NEXT: .functype i64_trunc_s_f64 (f64) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_s_f64(double %x) {
   %a = fptosi double %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_sat_s_f64:
 ; CHECK-NEXT: .functype i64_trunc_sat_s_f64 (f64) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_s:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i64 @llvm.wasm.trunc.saturate.signed.i64.f64(double)
 define i64 @i64_trunc_sat_s_f64(double %x) {
   %a = call i64 @llvm.wasm.trunc.saturate.signed.i64.f64(double %x)
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_u_f64:
 ; CHECK-NEXT: .functype i64_trunc_u_f64 (f64) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_trunc_u_f64(double %x) {
   %a = fptoui double %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_trunc_sat_u_f64:
 ; CHECK-NEXT: .functype i64_trunc_sat_u_f64 (f64) -> (i64){{$}}
-; CHECK-NEXT: i64.trunc_u:sat/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.trunc_sat_f64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 declare i64 @llvm.wasm.trunc.saturate.unsigned.i64.f64(double)
 define i64 @i64_trunc_sat_u_f64(double %x) {
   %a = call i64 @llvm.wasm.trunc.saturate.unsigned.i64.f64(double %x)
   ret i64 %a
 }
 
 ; CHECK-LABEL: f32_convert_s_i32:
 ; CHECK-NEXT: .functype f32_convert_s_i32 (i32) -> (f32){{$}}
-; CHECK-NEXT: f32.convert_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f32.convert_i32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @f32_convert_s_i32(i32 %x) {
   %a = sitofp i32 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f32_convert_u_i32:
 ; CHECK-NEXT: .functype f32_convert_u_i32 (i32) -> (f32){{$}}
-; CHECK-NEXT: f32.convert_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f32.convert_i32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @f32_convert_u_i32(i32 %x) {
   %a = uitofp i32 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f64_convert_s_i32:
 ; CHECK-NEXT: .functype f64_convert_s_i32 (i32) -> (f64){{$}}
-; CHECK-NEXT: f64.convert_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f64.convert_i32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @f64_convert_s_i32(i32 %x) {
   %a = sitofp i32 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f64_convert_u_i32:
 ; CHECK-NEXT: .functype f64_convert_u_i32 (i32) -> (f64){{$}}
-; CHECK-NEXT: f64.convert_u/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f64.convert_i32_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @f64_convert_u_i32(i32 %x) {
   %a = uitofp i32 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f32_convert_s_i64:
 ; CHECK-NEXT: .functype f32_convert_s_i64 (i64) -> (f32){{$}}
-; CHECK-NEXT: f32.convert_s/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f32.convert_i64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @f32_convert_s_i64(i64 %x) {
   %a = sitofp i64 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f32_convert_u_i64:
 ; CHECK-NEXT: .functype f32_convert_u_i64 (i64) -> (f32){{$}}
-; CHECK-NEXT: f32.convert_u/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f32.convert_i64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @f32_convert_u_i64(i64 %x) {
   %a = uitofp i64 %x to float
   ret float %a
 }
 
 ; CHECK-LABEL: f64_convert_s_i64:
 ; CHECK-NEXT: .functype f64_convert_s_i64 (i64) -> (f64){{$}}
-; CHECK-NEXT: f64.convert_s/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f64.convert_i64_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @f64_convert_s_i64(i64 %x) {
   %a = sitofp i64 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f64_convert_u_i64:
 ; CHECK-NEXT: .functype f64_convert_u_i64 (i64) -> (f64){{$}}
-; CHECK-NEXT: f64.convert_u/i64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f64.convert_i64_u $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @f64_convert_u_i64(i64 %x) {
   %a = uitofp i64 %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f64_promote_f32:
 ; CHECK-NEXT: .functype f64_promote_f32 (f32) -> (f64){{$}}
-; CHECK-NEXT: f64.promote/f32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f64.promote_f32 $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @f64_promote_f32(float %x) {
   %a = fpext float %x to double
   ret double %a
 }
 
 ; CHECK-LABEL: f32_demote_f64:
 ; CHECK-NEXT: .functype f32_demote_f64 (f64) -> (f32){{$}}
-; CHECK-NEXT: f32.demote/f64 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: f32.demote_f64 $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @f32_demote_f64(double %x) {
   %a = fptrunc double %x to float
   ret float %a
 }
 
 ; If the high its are unused, LLVM will optimize sext/zext into anyext, which
 ; we need to patterm-match back to a specific instruction.
 
 ; CHECK-LABEL: anyext:
-; CHECK: i64.extend_u/i32 $push0=, $0{{$}}
+; CHECK: i64.extend_i32_u $push0=, $0{{$}}
 define i64 @anyext(i32 %x) {
     %y = sext i32 %x to i64
     %w = shl i64 %y, 32
     ret i64 %w
 }
 
 ; CHECK-LABEL: bitcast_i32_to_float:
-; CHECK: f32.reinterpret/i32   $push0=, $0{{$}}
+; CHECK: f32.reinterpret_i32   $push0=, $0{{$}}
 define float @bitcast_i32_to_float(i32 %a) {
   %t = bitcast i32 %a to float
   ret float %t
 }
 
 ; CHECK-LABEL: bitcast_float_to_i32:
-; CHECK: i32.reinterpret/f32   $push0=, $0{{$}}
+; CHECK: i32.reinterpret_f32   $push0=, $0{{$}}
 define i32 @bitcast_float_to_i32(float %a) {
   %t = bitcast float %a to i32
   ret i32 %t
 }
 
 ; CHECK-LABEL: bitcast_i64_to_double:
-; CHECK: f64.reinterpret/i64   $push0=, $0{{$}}
+; CHECK: f64.reinterpret_i64   $push0=, $0{{$}}
 define double @bitcast_i64_to_double(i64 %a) {
   %t = bitcast i64 %a to double
   ret double %t
 }
 
 ; CHECK-LABEL: bitcast_double_to_i64:
-; CHECK: i64.reinterpret/f64   $push0=, $0{{$}}
+; CHECK: i64.reinterpret_f64   $push0=, $0{{$}}
 define i64 @bitcast_double_to_i64(double %a) {
   %t = bitcast double %a to i64
   ret i64 %t
 }

llvm/trunk/test/CodeGen/WebAssembly/copysign-casts.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 
 ; DAGCombiner oddly folds casts into the rhs of copysign. Test that they get
 ; unfolded.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare double @copysign(double, double) nounwind readnone
 declare float @copysignf(float, float) nounwind readnone
 
 ; CHECK-LABEL: fold_promote:
-; CHECK: f64.promote/f32 $push0=, $pop{{[0-9]+}}{{$}}
+; CHECK: f64.promote_f32 $push0=, $pop{{[0-9]+}}{{$}}
 ; CHECK: f64.copysign    $push1=, $pop{{[0-9]+}}, $pop0{{$}}
 define double @fold_promote(double %a, float %b) {
   %c = fpext float %b to double
   %t = call double @copysign(double %a, double %c)
   ret double %t
 }
 
 ; CHECK-LABEL: fold_demote:{{$}}
-; CHECK: f32.demote/f64  $push0=, $pop{{[0-9]+}}{{$}}
+; CHECK: f32.demote_f64  $push0=, $pop{{[0-9]+}}{{$}}
 ; CHECK: f32.copysign    $push1=, $pop{{[0-9]+}}, $pop0{{$}}
 define float @fold_demote(float %a, double %b) {
   %c = fptrunc double %b to float
   %t = call float @copysignf(float %a, float %c)
   ret float %t
 }

llvm/trunk/test/CodeGen/WebAssembly/exception.ll

 ; RUN: not llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck -allow-deprecated-dag-overlap %s
 ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 %struct.Cleanup = type { i8 }
 
 @_ZTIi = external constant i8*
 
 declare void @llvm.wasm.throw(i32, i8*)
 
 ; CHECK-LABEL: test_throw:
-; CHECK:      get_local $push0=, 0
+; CHECK:      local.get $push0=, 0
 ; CHECK-NEXT: throw __cpp_exception@EVENT, $pop0
 ; CHECK-NOT:  unreachable
 define void @test_throw(i8* %p) {
   call void @llvm.wasm.throw(i32 0, i8* %p)
   ret void
 }
 
 ; CHECK-LABEL: test_catch_rethrow:
-; CHECK:   get_global  $push{{.+}}=, __stack_pointer@GLOBAL
+; CHECK:   global.get  $push{{.+}}=, __stack_pointer@GLOBAL
 ; CHECK:   try
 ; CHECK:   call      foo@FUNCTION
 ; CHECK:   i32.catch     $push{{.+}}=, 0
-; CHECK:   set_global  __stack_pointer@GLOBAL
+; CHECK:   global.set  __stack_pointer@GLOBAL
 ; CHECK-DAG:   i32.store  __wasm_lpad_context
 ; CHECK-DAG:   i32.store  __wasm_lpad_context+4
 ; CHECK:   i32.call  $push{{.+}}=, _Unwind_CallPersonality@FUNCTION
 ; CHECK:   i32.call  $push{{.+}}=, __cxa_begin_catch@FUNCTION
 ; CHECK:   call      __cxa_end_catch@FUNCTION
 ; CHECK:   call      __cxa_rethrow@FUNCTION
 ; CHECK-NEXT:   rethrow
 ; CHECK:   end_try

 try.cont:                                         ; preds = %entry, %catch
   ret void
 }
 
 ; CHECK-LABEL: test_cleanup:
 ; CHECK:   try
 ; CHECK:   call      foo@FUNCTION
 ; CHECK:   catch_all
-; CHECK:   set_global  __stack_pointer@GLOBAL
+; CHECK:   global.set  __stack_pointer@GLOBAL
 ; CHECK:   i32.call  $push{{.+}}=, _ZN7CleanupD1Ev@FUNCTION
 ; CHECK:   rethrow
 ; CHECK:   end_try
 define void @test_cleanup() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
 entry:
   %c = alloca %struct.Cleanup, align 1
   invoke void @foo()
           to label %invoke.cont unwind label %ehcleanup

 ; should not have a prologue, and BBs ending with a catchret/cleanupret should
 ; not have an epilogue. This is separate from __stack_pointer restoring
 ; instructions after a catch instruction.
 
 ; CHECK-LABEL: test_no_prolog_epilog_in_ehpad
 ; CHECK:  try
 ; CHECK:  call      foo@FUNCTION
 ; CHECK:  i32.catch
-; CHECK-NOT:  get_global  $push{{.+}}=, __stack_pointer@GLOBAL
-; CHECK:  set_global  __stack_pointer@GLOBAL
+; CHECK-NOT:  global.get  $push{{.+}}=, __stack_pointer@GLOBAL
+; CHECK:  global.set  __stack_pointer@GLOBAL
 ; CHECK:  try
 ; CHECK:  call      foo@FUNCTION
 ; CHECK:  catch_all
-; CHECK-NOT:  get_global  $push{{.+}}=, __stack_pointer@GLOBAL
-; CHECK:  set_global  __stack_pointer@GLOBAL
+; CHECK-NOT:  global.get  $push{{.+}}=, __stack_pointer@GLOBAL
+; CHECK:  global.set  __stack_pointer@GLOBAL
 ; CHECK:  call      __cxa_end_catch@FUNCTION
-; CHECK-NOT:  set_global  __stack_pointer@GLOBAL, $pop{{.+}}
+; CHECK-NOT:  global.set  __stack_pointer@GLOBAL, $pop{{.+}}
 ; CHECK:  end_try
-; CHECK-NOT:  set_global  __stack_pointer@GLOBAL, $pop{{.+}}
+; CHECK-NOT:  global.set  __stack_pointer@GLOBAL, $pop{{.+}}
 ; CHECK:  end_try
 define void @test_no_prolog_epilog_in_ehpad() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
 entry:
   %stack_var = alloca i32, align 4
   call void @bar(i32* %stack_var)
   invoke void @foo()
           to label %try.cont unwind label %catch.dispatch
 

 
 ; When a function does not have stack-allocated objects, it does not need to
 ; store SP back to __stack_pointer global at the epilog.
 
 ; CHECK-LABEL: no_sp_writeback
 ; CHECK:  try
 ; CHECK:  call foo@FUNCTION
 ; CHECK:  end_try
-; CHECK-NOT:  set_global  __stack_pointer@GLOBAL
+; CHECK-NOT:  global.set  __stack_pointer@GLOBAL
 ; CHECK:  return
 define void @no_sp_writeback() personality i8* bitcast (i32 (...)* @__gxx_wasm_personality_v0 to i8*) {
 entry:
   invoke void @foo()
           to label %try.cont unwind label %catch.dispatch
 
 catch.dispatch:                                   ; preds = %entry
   %0 = catchswitch within none [label %catch.start] unwind to caller

llvm/trunk/test/CodeGen/WebAssembly/f16.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel | FileCheck %s
 
 ; Test that f16 is expanded.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: demote:
 ; CHECK-NEXT: .functype demote (f32) -> (f32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.call  $push[[L1:[0-9]+]]=, __gnu_f2h_ieee@FUNCTION, $pop[[L0]]{{$}}
 ; CHECK-NEXT: f32.call  $push[[L2:[0-9]+]]=, __gnu_h2f_ieee@FUNCTION, $pop[[L1]]{{$}}
 ; CHECK-NEXT: return    $pop[[L2]]{{$}}
 define half @demote(float %f) {
     %t = fptrunc float %f to half
     ret half %t
 }
 
 ; CHECK-LABEL: promote:
 ; CHECK-NEXT: .functype promote (f32) -> (f32){{$}}
-; CHECK-NEXT: get_local $push0=, 0{{$}}
+; CHECK-NEXT: local.get $push0=, 0{{$}}
 ; CHECK-NEXT: return    $pop0{{$}}
 define float @promote(half %f) {
     %t = fpext half %f to float
     ret float %t
 }

llvm/trunk/test/CodeGen/WebAssembly/f32.ll

 declare float @llvm.floor.f32(float)
 declare float @llvm.trunc.f32(float)
 declare float @llvm.nearbyint.f32(float)
 declare float @llvm.rint.f32(float)
 declare float @llvm.fma.f32(float, float, float)
 
 ; CHECK-LABEL: fadd32:
 ; CHECK-NEXT: .functype fadd32 (f32, f32) -> (f32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.add $push[[LR:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[LR]]{{$}}
 define float @fadd32(float %x, float %y) {
   %a = fadd float %x, %y
   ret float %a
 }
 
 ; CHECK-LABEL: fsub32:

llvm/trunk/test/CodeGen/WebAssembly/f64.ll

 declare double @llvm.floor.f64(double)
 declare double @llvm.trunc.f64(double)
 declare double @llvm.nearbyint.f64(double)
 declare double @llvm.rint.f64(double)
 declare double @llvm.fma.f64(double, double, double)
 
 ; CHECK-LABEL: fadd64:
 ; CHECK-NEXT: .functype fadd64 (f64, f64) -> (f64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.add $push[[LR:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop[[LR]]{{$}}
 define double @fadd64(double %x, double %y) {
   %a = fadd double %x, %y
   ret double %a
 }
 
 ; CHECK-LABEL: fsub64:

llvm/trunk/test/CodeGen/WebAssembly/fast-isel-i24.ll

 ; RUN: llc < %s -O0 -wasm-keep-registers
 ; PR36564
 ; PR37546
 
 ; Test that fast-isel properly copes with i24 arguments and return types.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: add:
 ; CHECK-NEXT: .functype add (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push2=, 0{{$}}
-; CHECK-NEXT: get_local $push1=, 1{{$}}
+; CHECK-NEXT: local.get $push2=, 0{{$}}
+; CHECK-NEXT: local.get $push1=, 1{{$}}
 ; CHECK-NEXT: i32.add   $push0=, $pop2, $pop1{{$}}
 ; CHECK-NEXT: end_function
 define i24 @add(i24 %x, i24 %y) {
     %z = add i24 %x, %y
     ret i24 %z
 }
 
 ; CHECK-LABEL: return_zero:
 ; CHECK-NEXT: .functype return_zero () -> (i32){{$}}
 ; CHECK-NEXT: i32.const $push0=, 0{{$}}
 ; CHECK-NEXT: end_function
 define i24 @return_zero() {
     ret i24 0
 }

llvm/trunk/test/CodeGen/WebAssembly/fast-isel.ll

 
 ; CHECK-LABEL: immediate_f64:
 ; CHECK: f64.const $push{{[0-9]+}}=, 0x1.4p1{{$}}
 define double @immediate_f64() {
   ret double 2.5
 }
 
 ; CHECK-LABEL: bitcast_i32_f32:
-; CHECK: i32.reinterpret/f32 $push{{[0-9]+}}=, $0{{$}}
+; CHECK: i32.reinterpret_f32 $push{{[0-9]+}}=, $0{{$}}
 define i32 @bitcast_i32_f32(float %x) {
   %y = bitcast float %x to i32
   ret i32 %y
 }
 
 ; CHECK-LABEL: bitcast_f32_i32:
-; CHECK: f32.reinterpret/i32 $push{{[0-9]+}}=, $0{{$}}
+; CHECK: f32.reinterpret_i32 $push{{[0-9]+}}=, $0{{$}}
 define float @bitcast_f32_i32(i32 %x) {
   %y = bitcast i32 %x to float
   ret float %y
 }
 
 ; CHECK-LABEL: bitcast_i64_f64:
-; CHECK: i64.reinterpret/f64 $push{{[0-9]+}}=, $0{{$}}
+; CHECK: i64.reinterpret_f64 $push{{[0-9]+}}=, $0{{$}}
 define i64 @bitcast_i64_f64(double %x) {
   %y = bitcast double %x to i64
   ret i64 %y
 }
 
 ; CHECK-LABEL: bitcast_f64_i64:
-; CHECK: f64.reinterpret/i64 $push{{[0-9]+}}=, $0{{$}}
+; CHECK: f64.reinterpret_i64 $push{{[0-9]+}}=, $0{{$}}
 define double @bitcast_f64_i64(i64 %x) {
   %y = bitcast i64 %x to double
   ret double %y
 }
 
 ; Do fold offsets into geps.
 ; CHECK-LABEL: do_fold_offset_into_gep:
 ; CHECK: i64.load $push{{[0-9]+}}=, 8($0)

llvm/trunk/test/CodeGen/WebAssembly/function-bitcasts.ll

 entry:
   call void @has_struct_arg({i32} {i32 3})
   call void bitcast (void ({i32})* @has_struct_arg to void ({i64})*)({i64} {i64 4})
   call {i32, i32} bitcast (i32 ()* @has_i32_ret to {i32, i32} ()*)()
   ret void
 }
 
 ; CHECK-LABEL: test_varargs:
-; CHECK:      set_global
+; CHECK:      global.set
 ; CHECK:      i32.const   $push[[L3:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: call        .Lvararg_bitcast@FUNCTION, $pop[[L3]]{{$}}
 ; CHECK-NEXT: i32.const   $push[[L4:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.store   0($[[L5:[0-9]+]]), $pop[[L4]]{{$}}
 ; CHECK-NEXT: call        .Lplain_bitcast@FUNCTION, $[[L5]]{{$}}
 define void @test_varargs() {
   call void bitcast (void (...)* @vararg to void (i32)*)(i32 0)
   call void (...) bitcast (void (i32)* @plain to void (...)*)(i32 0)

 ; CHECK-LABEL: .Lfoo0_bitcast:
 ; CHECK-NEXT: .functype .Lfoo0_bitcast (i32) -> ()
 ; CHECK-NEXT: call        foo0@FUNCTION{{$}}
 ; CHECK-NEXT: end_function
 
 ; CHECK-LABEL: .Lfoo1_bitcast:
 ; CHECK-NEXT: .functype .Lfoo1_bitcast () -> (i32)
 ; CHECK-NEXT: call        foo1@FUNCTION{{$}}
-; CHECK-NEXT: copy_local  $push0=, $0
+; CHECK-NEXT: local.copy  $push0=, $0
 ; CHECK-NEXT: end_function

llvm/trunk/test/CodeGen/WebAssembly/i32.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 32-bit integer operations assemble as expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i32 @llvm.ctlz.i32(i32, i1)
 declare i32 @llvm.cttz.i32(i32, i1)
 declare i32 @llvm.ctpop.i32(i32)
 
 ; CHECK-LABEL: add32:
 ; CHECK-NEXT: .functype add32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.add $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @add32(i32 %x, i32 %y) {
   %a = add i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: sub32:
 ; CHECK-NEXT: .functype sub32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @sub32(i32 %x, i32 %y) {
   %a = sub i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: mul32:
 ; CHECK-NEXT: .functype mul32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @mul32(i32 %x, i32 %y) {
   %a = mul i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: sdiv32:
 ; CHECK-NEXT: .functype sdiv32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @sdiv32(i32 %x, i32 %y) {
   %a = sdiv i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: udiv32:
 ; CHECK-NEXT: .functype udiv32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @udiv32(i32 %x, i32 %y) {
   %a = udiv i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: srem32:
 ; CHECK-NEXT: .functype srem32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.rem_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @srem32(i32 %x, i32 %y) {
   %a = srem i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: urem32:
 ; CHECK-NEXT: .functype urem32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.rem_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @urem32(i32 %x, i32 %y) {
   %a = urem i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: and32:
 ; CHECK-NEXT: .functype and32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.and $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @and32(i32 %x, i32 %y) {
   %a = and i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: or32:
 ; CHECK-NEXT: .functype or32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.or $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @or32(i32 %x, i32 %y) {
   %a = or i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: xor32:
 ; CHECK-NEXT: .functype xor32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.xor $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @xor32(i32 %x, i32 %y) {
   %a = xor i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: shl32:
 ; CHECK-NEXT: .functype shl32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.shl $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @shl32(i32 %x, i32 %y) {
   %a = shl i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: shr32:
 ; CHECK-NEXT: .functype shr32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.shr_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @shr32(i32 %x, i32 %y) {
   %a = lshr i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: sar32:
 ; CHECK-NEXT: .functype sar32 (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.shr_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @sar32(i32 %x, i32 %y) {
   %a = ashr i32 %x, %y
   ret i32 %a
 }
 
 ; CHECK-LABEL: clz32:
 ; CHECK-NEXT: .functype clz32 (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.clz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @clz32(i32 %x) {
   %a = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
   ret i32 %a
 }
 
 ; CHECK-LABEL: clz32_zero_undef:
 ; CHECK-NEXT: .functype clz32_zero_undef (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.clz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @clz32_zero_undef(i32 %x) {
   %a = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
   ret i32 %a
 }
 
 ; CHECK-LABEL: ctz32:
 ; CHECK-NEXT: .functype ctz32 (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.ctz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @ctz32(i32 %x) {
   %a = call i32 @llvm.cttz.i32(i32 %x, i1 false)
   ret i32 %a
 }
 
 ; CHECK-LABEL: ctz32_zero_undef:
 ; CHECK-NEXT: .functype ctz32_zero_undef (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.ctz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @ctz32_zero_undef(i32 %x) {
   %a = call i32 @llvm.cttz.i32(i32 %x, i1 true)
   ret i32 %a
 }
 
 ; CHECK-LABEL: popcnt32:
 ; CHECK-NEXT: .functype popcnt32 (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.popcnt $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @popcnt32(i32 %x) {
   %a = call i32 @llvm.ctpop.i32(i32 %x)
   ret i32 %a
 }
 
 ; CHECK-LABEL: eqz32:
 ; CHECK-NEXT: .functype eqz32 (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.eqz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @eqz32(i32 %x) {
   %a = icmp eq i32 %x, 0
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: rotl:
 ; CHECK-NEXT: .functype rotl (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.rotl $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @rotl(i32 %x, i32 %y) {
   %z = sub i32 32, %y
   %b = shl i32 %x, %y
   %c = lshr i32 %x, %z
   %d = or i32 %b, %c
   ret i32 %d
 }
 
 ; CHECK-LABEL: masked_rotl:
 ; CHECK-NEXT: .functype masked_rotl (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.rotl $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @masked_rotl(i32 %x, i32 %y) {
   %a = and i32 %y, 31
   %z = sub i32 32, %a
   %b = shl i32 %x, %a
   %c = lshr i32 %x, %z
   %d = or i32 %b, %c
   ret i32 %d
 }
 
 ; CHECK-LABEL: rotr:
 ; CHECK-NEXT: .functype rotr (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.rotr $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @rotr(i32 %x, i32 %y) {
   %z = sub i32 32, %y
   %b = lshr i32 %x, %y
   %c = shl i32 %x, %z
   %d = or i32 %b, %c
   ret i32 %d
 }
 
 ; CHECK-LABEL: masked_rotr:
 ; CHECK-NEXT: .functype masked_rotr (i32, i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.rotr $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @masked_rotr(i32 %x, i32 %y) {
   %a = and i32 %y, 31
   %z = sub i32 32, %a
   %b = lshr i32 %x, %a
   %c = shl i32 %x, %z
   %d = or i32 %b, %c
   ret i32 %d
 }

llvm/trunk/test/CodeGen/WebAssembly/i64.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 ; Test that basic 64-bit integer operations assemble as expected.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare i64 @llvm.ctlz.i64(i64, i1)
 declare i64 @llvm.cttz.i64(i64, i1)
 declare i64 @llvm.ctpop.i64(i64)
 
 ; CHECK-LABEL: add64:
 ; CHECK-NEXT: .functype add64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.add $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @add64(i64 %x, i64 %y) {
   %a = add i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: sub64:
 ; CHECK-NEXT: .functype sub64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.sub $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @sub64(i64 %x, i64 %y) {
   %a = sub i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: mul64:
 ; CHECK-NEXT: .functype mul64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.mul $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @mul64(i64 %x, i64 %y) {
   %a = mul i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: sdiv64:
 ; CHECK-NEXT: .functype sdiv64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.div_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @sdiv64(i64 %x, i64 %y) {
   %a = sdiv i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: udiv64:
 ; CHECK-NEXT: .functype udiv64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.div_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @udiv64(i64 %x, i64 %y) {
   %a = udiv i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: srem64:
 ; CHECK-NEXT: .functype srem64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.rem_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @srem64(i64 %x, i64 %y) {
   %a = srem i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: urem64:
 ; CHECK-NEXT: .functype urem64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.rem_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @urem64(i64 %x, i64 %y) {
   %a = urem i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: and64:
 ; CHECK-NEXT: .functype and64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.and $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @and64(i64 %x, i64 %y) {
   %a = and i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: or64:
 ; CHECK-NEXT: .functype or64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.or $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @or64(i64 %x, i64 %y) {
   %a = or i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: xor64:
 ; CHECK-NEXT: .functype xor64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.xor $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @xor64(i64 %x, i64 %y) {
   %a = xor i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: shl64:
 ; CHECK-NEXT: .functype shl64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.shl $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @shl64(i64 %x, i64 %y) {
   %a = shl i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: shr64:
 ; CHECK-NEXT: .functype shr64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.shr_u $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @shr64(i64 %x, i64 %y) {
   %a = lshr i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: sar64:
 ; CHECK-NEXT: .functype sar64 (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.shr_s $push0=, $pop[[L0]], $pop[[L1]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @sar64(i64 %x, i64 %y) {
   %a = ashr i64 %x, %y
   ret i64 %a
 }
 
 ; CHECK-LABEL: clz64:
 ; CHECK-NEXT: .functype clz64 (i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.clz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @clz64(i64 %x) {
   %a = call i64 @llvm.ctlz.i64(i64 %x, i1 false)
   ret i64 %a
 }
 
 ; CHECK-LABEL: clz64_zero_undef:
 ; CHECK-NEXT: .functype clz64_zero_undef (i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.clz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @clz64_zero_undef(i64 %x) {
   %a = call i64 @llvm.ctlz.i64(i64 %x, i1 true)
   ret i64 %a
 }
 
 ; CHECK-LABEL: ctz64:
 ; CHECK-NEXT: .functype ctz64 (i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.ctz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @ctz64(i64 %x) {
   %a = call i64 @llvm.cttz.i64(i64 %x, i1 false)
   ret i64 %a
 }
 
 ; CHECK-LABEL: ctz64_zero_undef:
 ; CHECK-NEXT: .functype ctz64_zero_undef (i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.ctz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @ctz64_zero_undef(i64 %x) {
   %a = call i64 @llvm.cttz.i64(i64 %x, i1 true)
   ret i64 %a
 }
 
 ; CHECK-LABEL: popcnt64:
 ; CHECK-NEXT: .functype popcnt64 (i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.popcnt $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @popcnt64(i64 %x) {
   %a = call i64 @llvm.ctpop.i64(i64 %x)
   ret i64 %a
 }
 
 ; CHECK-LABEL: eqz64:
 ; CHECK-NEXT: .functype eqz64 (i64) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.eqz $push0=, $pop[[L0]]{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @eqz64(i64 %x) {
   %a = icmp eq i64 %x, 0
   %b = zext i1 %a to i32
   ret i32 %b
 }
 
 ; CHECK-LABEL: rotl:
 ; CHECK-NEXT: .functype rotl (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.rotl $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @rotl(i64 %x, i64 %y) {
   %z = sub i64 64, %y
   %b = shl i64 %x, %y
   %c = lshr i64 %x, %z
   %d = or i64 %b, %c
   ret i64 %d
 }
 
 ; CHECK-LABEL: masked_rotl:
 ; CHECK-NEXT: .functype masked_rotl (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.rotl $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @masked_rotl(i64 %x, i64 %y) {
   %a = and i64 %y, 63
   %z = sub i64 64, %a
   %b = shl i64 %x, %a
   %c = lshr i64 %x, %z
   %d = or i64 %b, %c
   ret i64 %d
 }
 
 ; CHECK-LABEL: rotr:
 ; CHECK-NEXT: .functype rotr (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.rotr $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @rotr(i64 %x, i64 %y) {
   %z = sub i64 64, %y
   %b = lshr i64 %x, %y
   %c = shl i64 %x, %z
   %d = or i64 %b, %c
   ret i64 %d
 }
 
 ; CHECK-LABEL: masked_rotr:
 ; CHECK-NEXT: .functype masked_rotr (i64, i64) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.rotr $push0=, $pop[[L0]], $pop[[L1]]
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @masked_rotr(i64 %x, i64 %y) {
   %a = and i64 %y, 63
   %z = sub i64 64, %a
   %b = lshr i64 %x, %a
   %c = shl i64 %x, %z
   %d = or i64 %b, %c
   ret i64 %d
 }

llvm/trunk/test/CodeGen/WebAssembly/inline-asm-roundtrip.ll

 ; RUN: llc < %s | llvm-mc -triple=wasm32-unknown-unknown | FileCheck --match-full-lines %s
 
 ; Test basic inline assembly can actually be assembled by the assembler.
 
 ; .ll code below is the result of this code run thru
 ; clang -target wasm32-unknown-unknown-wasm -O2 -S -emit-llvm test.c
 
 ; int main(int argc, const char *argv[]) {
 ;   int src = 1;
 ;   int dst;
 ;   asm ("i32.const\t2\n"
-;        "\tget_local\t%1\n"
+;        "\tlocal.get\t%1\n"
 ;        "\ti32.add\n"
-;        "\tset_local\t%0"
+;        "\tlocal.set\t%0"
 ;        : "=r" (dst)
 ;        : "r" (src));
 ;   return dst != 3;
 ; }
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: main:
 ; CHECK-NEXT: .functype main (i32, i32) -> (i32)
 ; CHECK-NEXT: .local    i32
 ; CHECK-NEXT: i32.const 1
-; CHECK-NEXT: set_local [[SRC:[0-9]+]]
+; CHECK-NEXT: local.set [[SRC:[0-9]+]]
 ; CHECK-NEXT: i32.const 2
-; CHECK-NEXT: get_local [[SRC]]
+; CHECK-NEXT: local.get [[SRC]]
 ; CHECK-NEXT: i32.add
-; CHECK-NEXT: set_local [[DST:[0-9]+]]
-; CHECK-NEXT: get_local [[DST]]
+; CHECK-NEXT: local.set [[DST:[0-9]+]]
+; CHECK-NEXT: local.get [[DST]]
 ; CHECK-NEXT: i32.const 3
 ; CHECK-NEXT: i32.ne
 
 define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 {
 entry:
-  %0 = tail call i32 asm "i32.const\092\0A\09get_local\09$1\0A\09i32.add\0A\09set_local\09$0", "=r,r"(i32 1) #1
+  %0 = tail call i32 asm "i32.const\092\0A\09local.get\09$1\0A\09i32.add\0A\09local.set\09$0", "=r,r"(i32 1) #1
   %cmp = icmp ne i32 %0, 3
   %conv = zext i1 %cmp to i32
   ret i32 %conv
 }
 

llvm/trunk/test/CodeGen/WebAssembly/inline-asm.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -no-integrated-as -verify-machineinstrs | FileCheck %s
 
 ; Test basic inline assembly. Pass -no-integrated-as since these aren't
 ; actually valid assembly syntax.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: foo:
 ; CHECK-NEXT: .functype foo (i32) -> (i32){{$}}
 ; CHECK-NEXT: #APP{{$}}
 ; CHECK-NEXT: # 0 = aaa(0){{$}}
 ; CHECK-NEXT: #NO_APP{{$}}
-; CHECK-NEXT: get_local $push0=, 0{{$}}
+; CHECK-NEXT: local.get $push0=, 0{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @foo(i32 %r) {
 entry:
   %0 = tail call i32 asm sideeffect "# $0 = aaa($1)", "=r,r"(i32 %r) #0, !srcloc !0
   ret i32 %0
 }
 
 ; CHECK-LABEL: imm:
 ; CHECK-NEXT: .functype imm () -> (i32){{$}}
 ; CHECK-NEXT: .local i32{{$}}
 ; CHECK-NEXT: #APP{{$}}
 ; CHECK-NEXT: # 0 = ccc(42){{$}}
 ; CHECK-NEXT: #NO_APP{{$}}
-; CHECK-NEXT: get_local $push0=, 0{{$}}
+; CHECK-NEXT: local.get $push0=, 0{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i32 @imm() {
 entry:
   %0 = tail call i32 asm sideeffect "# $0 = ccc($1)", "=r,i"(i32 42) #0, !srcloc !2
   ret i32 %0
 }
 
 ; CHECK-LABEL: foo_i64:
 ; CHECK-NEXT: .functype foo_i64 (i64) -> (i64){{$}}
 ; CHECK-NEXT: #APP{{$}}
 ; CHECK-NEXT: # 0 = aaa(0){{$}}
 ; CHECK-NEXT: #NO_APP{{$}}
-; CHECK-NEXT: get_local $push0=, 0{{$}}
+; CHECK-NEXT: local.get $push0=, 0{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i64 @foo_i64(i64 %r) {
 entry:
   %0 = tail call i64 asm sideeffect "# $0 = aaa($1)", "=r,r"(i64 %r) #0, !srcloc !0
   ret i64 %0
 }
 
 ; CHECK-LABEL: X_i16:
 ; CHECK: foo 1{{$}}
-; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}}
+; CHECK: local.get $push[[S0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[S1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.store16 0($pop[[S0]]), $pop[[S1]]{{$}}
 define void @X_i16(i16 * %t) {
   call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %t)
   ret void
 }
 
 ; CHECK-LABEL: X_ptr:
 ; CHECK: foo 1{{$}}
-; CHECK: get_local $push[[S0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[S1:[0-9]+]]=, 1{{$}}
+; CHECK: local.get $push[[S0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[S1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.store 0($pop[[S0]]), $pop[[S1]]{{$}}
 define void @X_ptr(i16 ** %t) {
   call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16** %t)
   ret void
 }
 
 ; CHECK-LABEL: funcname:
 ; CHECK: foo funcname{{$}}
 define void @funcname() {
   tail call void asm sideeffect "foo $0", "i"(void ()* nonnull @funcname) #0, !srcloc !0
   ret void
 }
 
 ; CHECK-LABEL: varname:
 ; CHECK: foo gv+37{{$}}
 @gv = global [0 x i8] zeroinitializer
 define void @varname() {
   tail call void asm sideeffect "foo $0", "i"(i8* getelementptr inbounds ([0 x i8], [0 x i8]* @gv, i64 0, i64 37)) #0, !srcloc !0
   ret void
 }
 
 ; CHECK-LABEL: r_constraint
 ; CHECK:      i32.const $push[[S0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: set_local [[L0:[0-9]+]], $pop[[S0]]{{$}}
+; CHECK-NEXT: local.set [[L0:[0-9]+]], $pop[[S0]]{{$}}
 ; CHECK-NEXT: i32.const $push[[S1:[0-9]+]]=, 37{{$}}
-; CHECK-NEXT: set_local [[L1:[0-9]+]], $pop[[S1]]{{$}}
+; CHECK-NEXT: local.set [[L1:[0-9]+]], $pop[[S1]]{{$}}
 ; CHECK:      foo [[L2:[0-9]+]], 1, [[L0]], [[L1]]{{$}}
-; CHECK:      get_local $push{{[0-9]+}}=, [[L2]]{{$}}
+; CHECK:      local.get $push{{[0-9]+}}=, [[L2]]{{$}}
 define hidden i32 @r_constraint(i32 %a, i32 %y) {
 entry:
   %z = bitcast i32 0 to i32
   %t0 = tail call i32 asm "foo $0, $1, $2, $3", "=r,r,r,r"(i32 %y, i32 %z, i32 37) #0, !srcloc !0
   ret i32 %t0
 }
 
 ; CHECK-LABEL: tied_operands
-; CHECK: get_local  $push0=, 0
+; CHECK: local.get  $push0=, 0
 ; CHECK: return    $pop0
 define i32 @tied_operands(i32 %var) {
 entry:
   %ret = call i32 asm "", "=r,0"(i32 %var)
   ret i32 %ret
 }
 
 attributes #0 = { nounwind }
 
 !0 = !{i32 47}
 !1 = !{i32 145}
 !2 = !{i32 231}

llvm/trunk/test/CodeGen/WebAssembly/legalize.ll

 define i64 @sext_in_reg_i32_i64(i64 %a) {
   %b = shl i64 %a, 32
   %c = ashr i64 %b, 32
   ret i64 %c
 }
 
 ; CHECK-LABEL: fpext_f32_f64:
 ; CHECK: f32.load $push0=, 0($0){{$}}
-; CHECK: f64.promote/f32 $push1=, $pop0{{$}}
+; CHECK: f64.promote_f32 $push1=, $pop0{{$}}
 ; CHECK: return $pop1{{$}}
 define double @fpext_f32_f64(float *%p) {
   %v = load float, float* %p
   %e = fpext float %v to double
   ret double %e
 }
 
 ; CHECK-LABEL: fpconv_f64_f32:
 ; CHECK: f64.load $push0=, 0($0){{$}}
-; CHECK: f32.demote/f64 $push1=, $pop0{{$}}
+; CHECK: f32.demote_f64 $push1=, $pop0{{$}}
 ; CHECK: return $pop1{{$}}
 define float @fpconv_f64_f32(double *%p) {
   %v = load double, double* %p
   %e = fptrunc double %v to float
   ret float %e
 }
 
 ; Check that big shifts work. This generates a big pile of code from the
 ; legalizer; the main thing here is that we don't abort.
 
 ; CHECK-LABEL: bigshift:
 define i1024 @bigshift(i1024 %a, i1024 %b) {
     %c = shl i1024 %a, %b
     ret i1024 %c
 }

llvm/trunk/test/CodeGen/WebAssembly/load-ext-atomic.ll

 define i64 @zext_i16_i64(i16 *%p) {
   %v = load atomic i16, i16* %p seq_cst, align 2
   %e = zext i16 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: sext_i32_i64:
 ; CHECK: i32.atomic.load $push0=, 0($0){{$}}
-; CHECK: i64.extend_s/i32 $push1=, $pop0{{$}}
+; CHECK: i64.extend_i32_s $push1=, $pop0{{$}}
 ; CHECK-NEXT: return $pop1{{$}}
 define i64 @sext_i32_i64(i32 *%p) {
   %v = load atomic i32, i32* %p seq_cst, align 4
   %e = sext i32 %v to i64
   ret i64 %e
 }
 
 ; CHECK-LABEL: zext_i32_i64:
 ; CHECK: i64.atomic.load32_u $push0=, 0($0){{$}}
 ; CHECK: return $pop0{{$}}
 define i64 @zext_i32_i64(i32 *%p) {
   %v = load atomic i32, i32* %p seq_cst, align 4
   %e = zext i32 %v to i64
   ret i64 %e
 }

llvm/trunk/test/CodeGen/WebAssembly/load.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; Test that basic loads are assembled properly.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: ldi32:
 ; CHECK-NEXT: .functype ldi32 (i32) -> (i32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i32 @ldi32(i32 *%p) {
   %v = load i32, i32* %p
   ret i32 %v
 }
 
 ; CHECK-LABEL: ldi64:
 ; CHECK-NEXT: .functype ldi64 (i32) -> (i64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: i64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @ldi64(i64 *%p) {
   %v = load i64, i64* %p
   ret i64 %v
 }
 
 ; CHECK-LABEL: ldf32:
 ; CHECK-NEXT: .functype ldf32 (i32) -> (f32){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f32.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define float @ldf32(float *%p) {
   %v = load float, float* %p
   ret float %v
 }
 
 ; CHECK-LABEL: ldf64:
 ; CHECK-NEXT: .functype ldf64 (i32) -> (f64){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
 ; CHECK-NEXT: f64.load $push[[NUM:[0-9]+]]=, 0($pop[[L0]]){{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define double @ldf64(double *%p) {
   %v = load double, double* %p
   ret double %v
 }

llvm/trunk/test/CodeGen/WebAssembly/negative-base-reg.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 @args = hidden local_unnamed_addr global [32 x i32] zeroinitializer, align 16
 
 ; Function Attrs: norecurse nounwind
 define hidden i32 @main() local_unnamed_addr #0 {
 
 ; If LSR stops selecting a negative base reg value, then this test will no
 ; longer be useful as written.
 ; CHECK:      i32.const $push[[L0:[0-9]+]]=, -128
-; CHECK-NEXT: set_local 0, $pop[[L0]]
+; CHECK-NEXT: local.set 0, $pop[[L0]]
 entry:
   br label %for.body
 
 for.body:                                         ; preds = %for.body, %entry
   %i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
 ; The offset should not be folded into the store.
 ; CHECK: i32.const $push{{[0-9]+}}=, args+128
 ; CHECK: i32.add   $push[[L1:[0-9]+]]=,

llvm/trunk/test/CodeGen/WebAssembly/offset-atomics.ll

define i32 @load_i8_i32_s_with_folded_offset(i8* %p) {
   %q = ptrtoint i8* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i8*
   %t = load atomic i8, i8* %s seq_cst, align 1
   %u = sext i8 %t to i32
   ret i32 %u
 }
 
-; 32->64 sext load gets selected as i32.atomic.load, i64_extend_s/i32
+; 32->64 sext load gets selected as i32.atomic.load, i64.extend_i32_s
 ; CHECK-LABEL: load_i32_i64_s_with_folded_offset:
 ; CHECK: i32.atomic.load $push0=, 24($0){{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push1=, $pop0{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push1=, $pop0{{$}}
 define i64 @load_i32_i64_s_with_folded_offset(i32* %p) {
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
   %t = load atomic i32, i32* %s seq_cst, align 4
   %u = sext i32 %t to i64
   ret i64 %u
 }

 
 ;===----------------------------------------------------------------------------
 ; Atomic truncating & sign-extending binary RMWs
 ;===----------------------------------------------------------------------------
 
 ; Fold an offset into a sign-extending rmw.
 
 ; CHECK-LABEL: rmw_add_i8_i32_s_with_folded_offset:
-; CHECK: i32.atomic.rmw8_u.add $push0=, 24($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 24($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0
 define i32 @rmw_add_i8_i32_s_with_folded_offset(i8* %p, i32 %v) {
   %q = ptrtoint i8* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i8*
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %s, i8 %t seq_cst
   %u = sext i8 %old to i32
   ret i32 %u
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.add, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.add, i64.extend_i32_s
 ; CHECK-LABEL: rmw_add_i32_i64_s_with_folded_offset:
-; CHECK: i32.wrap/i64 $push0=, $1
+; CHECK: i32.wrap_i64 $push0=, $1
 ; CHECK-NEXT: i32.atomic.rmw.add $push1=, 24($0), $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push2=, $pop1{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push2=, $pop1{{$}}
 define i64 @rmw_add_i32_i64_s_with_folded_offset(i32* %p, i64 %v) {
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
   %t = trunc i64 %v to i32
   %old = atomicrmw add i32* %s, i32 %t seq_cst
   %u = sext i32 %old to i64
   ret i64 %u
 }
 
 ; Fold a gep offset into a sign-extending rmw.
 
 ; CHECK-LABEL: rmw_add_i8_i32_s_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw8_u.add $push0=, 24($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 24($0), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0
 define i32 @rmw_add_i8_i32_s_with_folded_gep_offset(i8* %p, i32 %v) {
   %s = getelementptr inbounds i8, i8* %p, i32 24
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %s, i8 %t seq_cst
   %u = sext i8 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i16_i32_s_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw16_u.add $push0=, 48($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.add_u $push0=, 48($0), $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0
 define i32 @rmw_add_i16_i32_s_with_folded_gep_offset(i16* %p, i32 %v) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %t = trunc i32 %v to i16
   %old = atomicrmw add i16* %s, i16 %t seq_cst
   %u = sext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i16_i64_s_with_folded_gep_offset:
-; CHECK: i64.atomic.rmw16_u.add $push0=, 48($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.add_u $push0=, 48($0), $1{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0
 define i64 @rmw_add_i16_i64_s_with_folded_gep_offset(i16* %p, i64 %v) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %t = trunc i64 %v to i16
   %old = atomicrmw add i16* %s, i16 %t seq_cst
   %u = sext i16 %old to i64
   ret i64 %u
 }
 
 ; 'add' in this code becomes 'or' after DAG optimization. Treat an 'or' node as
 ; an 'add' if the or'ed bits are known to be zero.
 
 ; CHECK-LABEL: rmw_add_i8_i32_s_with_folded_or_offset:
-; CHECK: i32.atomic.rmw8_u.add $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push{{[0-9]+}}=, $pop[[R1]]{{$}}
 define i32 @rmw_add_i8_i32_s_with_folded_or_offset(i32 %x, i32 %v) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %arrayidx, i8 %t seq_cst
   %conv = sext i8 %old to i32
   ret i32 %conv
 }
 
 ; CHECK-LABEL: rmw_add_i8_i64_s_with_folded_or_offset:
-; CHECK: i64.atomic.rmw8_u.add $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
+; CHECK: i64.atomic.rmw8.add_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
 ; CHECK-NEXT: i64.extend8_s $push{{[0-9]+}}=, $pop[[R1]]{{$}}
 define i64 @rmw_add_i8_i64_s_with_folded_or_offset(i32 %x, i64 %v) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %t = trunc i64 %v to i8
   %old = atomicrmw add i8* %arrayidx, i8 %t seq_cst
   %conv = sext i8 %old to i64
   ret i64 %conv
 }
 
 ; When loading from a fixed address, materialize a zero.
 
 ; CHECK-LABEL: rmw_add_i16_i32_s_from_numeric_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw16_u.add $push1=, 42($pop0), $0{{$}}
+; CHECK: i32.atomic.rmw16.add_u $push1=, 42($pop0), $0{{$}}
 ; CHECK-NEXT: i32.extend16_s $push2=, $pop1
 define i32 @rmw_add_i16_i32_s_from_numeric_address(i32 %v) {
   %s = inttoptr i32 42 to i16*
   %t = trunc i32 %v to i16
   %old = atomicrmw add i16* %s, i16 %t seq_cst
   %u = sext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i8_i32_s_from_global_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw8_u.add $push1=, gv8($pop0), $0{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push1=, gv8($pop0), $0{{$}}
 ; CHECK-NEXT: i32.extend8_s $push2=, $pop1{{$}}
 define i32 @rmw_add_i8_i32_s_from_global_address(i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* @gv8, i8 %t seq_cst
   %u = sext i8 %old to i32
   ret i32 %u
 }
 
 ;===----------------------------------------------------------------------------
 ; Atomic truncating & zero-extending binary RMWs
 ;===----------------------------------------------------------------------------
 
 ; Fold an offset into a zero-extending rmw.
 
 ; CHECK-LABEL: rmw_add_i8_i32_z_with_folded_offset:
-; CHECK: i32.atomic.rmw8_u.add $push0=, 24($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 24($0), $1{{$}}
 define i32 @rmw_add_i8_i32_z_with_folded_offset(i8* %p, i32 %v) {
   %q = ptrtoint i8* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i8*
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %s, i8 %t seq_cst
   %u = zext i8 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i32_i64_z_with_folded_offset:
-; CHECK: i64.atomic.rmw32_u.add $push0=, 24($0), $1{{$}}
+; CHECK: i64.atomic.rmw32.add_u $push0=, 24($0), $1{{$}}
 define i64 @rmw_add_i32_i64_z_with_folded_offset(i32* %p, i64 %v) {
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
   %t = trunc i64 %v to i32
   %old = atomicrmw add i32* %s, i32 %t seq_cst
   %u = zext i32 %old to i64
   ret i64 %u
 }
 
 ; Fold a gep offset into a zero-extending rmw.
 
 ; CHECK-LABEL: rmw_add_i8_i32_z_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw8_u.add $push0=, 24($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 24($0), $1{{$}}
 define i32 @rmw_add_i8_i32_z_with_folded_gep_offset(i8* %p, i32 %v) {
   %s = getelementptr inbounds i8, i8* %p, i32 24
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %s, i8 %t seq_cst
   %u = zext i8 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i16_i32_z_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw16_u.add $push0=, 48($0), $1{{$}}
+; CHECK: i32.atomic.rmw16.add_u $push0=, 48($0), $1{{$}}
 define i32 @rmw_add_i16_i32_z_with_folded_gep_offset(i16* %p, i32 %v) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %t = trunc i32 %v to i16
   %old = atomicrmw add i16* %s, i16 %t seq_cst
   %u = zext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i16_i64_z_with_folded_gep_offset:
-; CHECK: i64.atomic.rmw16_u.add $push0=, 48($0), $1{{$}}
+; CHECK: i64.atomic.rmw16.add_u $push0=, 48($0), $1{{$}}
 define i64 @rmw_add_i16_i64_z_with_folded_gep_offset(i16* %p, i64 %v) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %t = trunc i64 %v to i16
   %old = atomicrmw add i16* %s, i16 %t seq_cst
   %u = zext i16 %old to i64
   ret i64 %u
 }
 
 ; 'add' in this code becomes 'or' after DAG optimization. Treat an 'or' node as
 ; an 'add' if the or'ed bits are known to be zero.
 
 ; CHECK-LABEL: rmw_add_i8_i32_z_with_folded_or_offset:
-; CHECK: i32.atomic.rmw8_u.add $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
 define i32 @rmw_add_i8_i32_z_with_folded_or_offset(i32 %x, i32 %v) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %arrayidx, i8 %t seq_cst
   %conv = zext i8 %old to i32
   ret i32 %conv
 }
 
 ; CHECK-LABEL: rmw_add_i8_i64_z_with_folded_or_offset:
-; CHECK: i64.atomic.rmw8_u.add $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
+; CHECK: i64.atomic.rmw8.add_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1{{$}}
 define i64 @rmw_add_i8_i64_z_with_folded_or_offset(i32 %x, i64 %v) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %t = trunc i64 %v to i8
   %old = atomicrmw add i8* %arrayidx, i8 %t seq_cst
   %conv = zext i8 %old to i64
   ret i64 %conv
 }
 
 ; When loading from a fixed address, materialize a zero.
 
 ; CHECK-LABEL: rmw_add_i16_i32_z_from_numeric_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw16_u.add $push1=, 42($pop0), $0{{$}}
+; CHECK: i32.atomic.rmw16.add_u $push1=, 42($pop0), $0{{$}}
 define i32 @rmw_add_i16_i32_z_from_numeric_address(i32 %v) {
   %s = inttoptr i32 42 to i16*
   %t = trunc i32 %v to i16
   %old = atomicrmw add i16* %s, i16 %t seq_cst
   %u = zext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: rmw_add_i8_i32_z_from_global_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw8_u.add $push1=, gv8($pop0), $0{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push1=, gv8($pop0), $0{{$}}
 define i32 @rmw_add_i8_i32_z_from_global_address(i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* @gv8, i8 %t seq_cst
   %u = zext i8 %old to i32
   ret i32 %u
 }
 
 ; i8 return value should test anyext RMWs
 
 ; CHECK-LABEL: rmw_add_i8_i32_retvalue:
-; CHECK: i32.atomic.rmw8_u.add $push0=, 0($0), $1{{$}}
+; CHECK: i32.atomic.rmw8.add_u $push0=, 0($0), $1{{$}}
 ; CHECK-NEXT: return $pop0{{$}}
 define i8 @rmw_add_i8_i32_retvalue(i8 *%p, i32 %v) {
   %t = trunc i32 %v to i8
   %old = atomicrmw add i8* %p, i8 %t seq_cst
   ret i8 %old
 }
 
 ;===----------------------------------------------------------------------------

 
 ;===----------------------------------------------------------------------------
 ; Atomic truncating & sign-extending ternary RMWs
 ;===----------------------------------------------------------------------------
 
 ; Fold an offset into a sign-extending rmw.
 
 ; CHECK-LABEL: cmpxchg_i8_i32_s_with_folded_offset:
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 24($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push0=, 24($0), $1, $2{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0
 define i32 @cmpxchg_i8_i32_s_with_folded_offset(i8* %p, i32 %exp, i32 %new) {
   %q = ptrtoint i8* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i8*
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %s, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %u = sext i8 %old to i32
   ret i32 %u
 }
 
-; 32->64 sext rmw gets selected as i32.atomic.rmw.cmpxchg, i64_extend_s/i32
+; 32->64 sext rmw gets selected as i32.atomic.rmw.cmpxchg, i64.extend_i32_s
 ; CHECK-LABEL: cmpxchg_i32_i64_s_with_folded_offset:
-; CHECK: i32.wrap/i64 $push1=, $1
-; CHECK-NEXT: i32.wrap/i64 $push0=, $2
+; CHECK: i32.wrap_i64 $push1=, $1
+; CHECK-NEXT: i32.wrap_i64 $push0=, $2
 ; CHECK-NEXT: i32.atomic.rmw.cmpxchg $push2=, 24($0), $pop1, $pop0{{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push3=, $pop2{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push3=, $pop2{{$}}
 define i64 @cmpxchg_i32_i64_s_with_folded_offset(i32* %p, i64 %exp, i64 %new) {
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
   %exp_t = trunc i64 %exp to i32
   %new_t = trunc i64 %new to i32
   %pair = cmpxchg i32* %s, i32 %exp_t, i32 %new_t seq_cst seq_cst
   %old = extractvalue { i32, i1 } %pair, 0
   %u = sext i32 %old to i64
   ret i64 %u
 }
 
 ; Fold a gep offset into a sign-extending rmw.
 
 ; CHECK-LABEL: cmpxchg_i8_i32_s_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 24($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push0=, 24($0), $1, $2{{$}}
 ; CHECK-NEXT: i32.extend8_s $push1=, $pop0
 define i32 @cmpxchg_i8_i32_s_with_folded_gep_offset(i8* %p, i32 %exp, i32 %new) {
   %s = getelementptr inbounds i8, i8* %p, i32 24
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %s, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %u = sext i8 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i16_i32_s_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw16_u.cmpxchg $push0=, 48($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw16.cmpxchg_u $push0=, 48($0), $1, $2{{$}}
 ; CHECK-NEXT: i32.extend16_s $push1=, $pop0
 define i32 @cmpxchg_i16_i32_s_with_folded_gep_offset(i16* %p, i32 %exp, i32 %new) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %exp_t = trunc i32 %exp to i16
   %new_t = trunc i32 %new to i16
   %pair = cmpxchg i16* %s, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %u = sext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i16_i64_s_with_folded_gep_offset:
-; CHECK: i64.atomic.rmw16_u.cmpxchg $push0=, 48($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw16.cmpxchg_u $push0=, 48($0), $1, $2{{$}}
 ; CHECK-NEXT: i64.extend16_s $push1=, $pop0
 define i64 @cmpxchg_i16_i64_s_with_folded_gep_offset(i16* %p, i64 %exp, i64 %new) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %exp_t = trunc i64 %exp to i16
   %new_t = trunc i64 %new to i16
   %pair = cmpxchg i16* %s, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %u = sext i16 %old to i64
   ret i64 %u
 }
 
 ; 'add' in this code becomes 'or' after DAG optimization. Treat an 'or' node as
 ; an 'add' if the or'ed bits are known to be zero.
 
 ; CHECK-LABEL: cmpxchg_i8_i32_s_with_folded_or_offset:
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
 ; CHECK-NEXT: i32.extend8_s $push{{[0-9]+}}=, $pop[[R1]]{{$}}
 define i32 @cmpxchg_i8_i32_s_with_folded_or_offset(i32 %x, i32 %exp, i32 %new) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %arrayidx, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %conv = sext i8 %old to i32
   ret i32 %conv
 }
 
 ; CHECK-LABEL: cmpxchg_i8_i64_s_with_folded_or_offset:
-; CHECK: i64.atomic.rmw8_u.cmpxchg $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
+; CHECK: i64.atomic.rmw8.cmpxchg_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
 ; CHECK-NEXT: i64.extend8_s $push{{[0-9]+}}=, $pop[[R1]]{{$}}
 define i64 @cmpxchg_i8_i64_s_with_folded_or_offset(i32 %x, i64 %exp, i64 %new) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %exp_t = trunc i64 %exp to i8
   %new_t = trunc i64 %new to i8
   %pair = cmpxchg i8* %arrayidx, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %conv = sext i8 %old to i64
   ret i64 %conv
 }
 
 ; When loading from a fixed address, materialize a zero.
 
 ; CHECK-LABEL: cmpxchg_i16_i32_s_from_numeric_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw16_u.cmpxchg $push1=, 42($pop0), $0, $1{{$}}
+; CHECK: i32.atomic.rmw16.cmpxchg_u $push1=, 42($pop0), $0, $1{{$}}
 ; CHECK-NEXT: i32.extend16_s $push2=, $pop1
 define i32 @cmpxchg_i16_i32_s_from_numeric_address(i32 %exp, i32 %new) {
   %s = inttoptr i32 42 to i16*
   %exp_t = trunc i32 %exp to i16
   %new_t = trunc i32 %new to i16
   %pair = cmpxchg i16* %s, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %u = sext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i8_i32_s_from_global_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push1=, gv8($pop0), $0, $1{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push1=, gv8($pop0), $0, $1{{$}}
 ; CHECK-NEXT: i32.extend8_s $push2=, $pop1{{$}}
 define i32 @cmpxchg_i8_i32_s_from_global_address(i32 %exp, i32 %new) {
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* @gv8, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %u = sext i8 %old to i32
   ret i32 %u
 }
 
 ;===----------------------------------------------------------------------------
 ; Atomic truncating & zero-extending ternary RMWs
 ;===----------------------------------------------------------------------------
 
 ; Fold an offset into a sign-extending rmw.
 
 ; CHECK-LABEL: cmpxchg_i8_i32_z_with_folded_offset:
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 24($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push0=, 24($0), $1, $2{{$}}
 define i32 @cmpxchg_i8_i32_z_with_folded_offset(i8* %p, i32 %exp, i32 %new) {
   %q = ptrtoint i8* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i8*
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %s, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %u = zext i8 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i32_i64_z_with_folded_offset:
-; CHECK: i64.atomic.rmw32_u.cmpxchg $push0=, 24($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw32.cmpxchg_u $push0=, 24($0), $1, $2{{$}}
 define i64 @cmpxchg_i32_i64_z_with_folded_offset(i32* %p, i64 %exp, i64 %new) {
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 24
   %s = inttoptr i32 %r to i32*
   %exp_t = trunc i64 %exp to i32
   %new_t = trunc i64 %new to i32
   %pair = cmpxchg i32* %s, i32 %exp_t, i32 %new_t seq_cst seq_cst
   %old = extractvalue { i32, i1 } %pair, 0
   %u = zext i32 %old to i64
   ret i64 %u
 }
 
 ; Fold a gep offset into a sign-extending rmw.
 
 ; CHECK-LABEL: cmpxchg_i8_i32_z_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push0=, 24($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push0=, 24($0), $1, $2{{$}}
 define i32 @cmpxchg_i8_i32_z_with_folded_gep_offset(i8* %p, i32 %exp, i32 %new) {
   %s = getelementptr inbounds i8, i8* %p, i32 24
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %s, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %u = zext i8 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i16_i32_z_with_folded_gep_offset:
-; CHECK: i32.atomic.rmw16_u.cmpxchg $push0=, 48($0), $1, $2{{$}}
+; CHECK: i32.atomic.rmw16.cmpxchg_u $push0=, 48($0), $1, $2{{$}}
 define i32 @cmpxchg_i16_i32_z_with_folded_gep_offset(i16* %p, i32 %exp, i32 %new) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %exp_t = trunc i32 %exp to i16
   %new_t = trunc i32 %new to i16
   %pair = cmpxchg i16* %s, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %u = zext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i16_i64_z_with_folded_gep_offset:
-; CHECK: i64.atomic.rmw16_u.cmpxchg $push0=, 48($0), $1, $2{{$}}
+; CHECK: i64.atomic.rmw16.cmpxchg_u $push0=, 48($0), $1, $2{{$}}
 define i64 @cmpxchg_i16_i64_z_with_folded_gep_offset(i16* %p, i64 %exp, i64 %new) {
   %s = getelementptr inbounds i16, i16* %p, i32 24
   %exp_t = trunc i64 %exp to i16
   %new_t = trunc i64 %new to i16
   %pair = cmpxchg i16* %s, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %u = zext i16 %old to i64
   ret i64 %u
 }
 
 ; 'add' in this code becomes 'or' after DAG optimization. Treat an 'or' node as
 ; an 'add' if the or'ed bits are known to be zero.
 
 ; CHECK-LABEL: cmpxchg_i8_i32_z_with_folded_or_offset:
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
 define i32 @cmpxchg_i8_i32_z_with_folded_or_offset(i32 %x, i32 %exp, i32 %new) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* %arrayidx, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %conv = zext i8 %old to i32
   ret i32 %conv
 }
 
 ; CHECK-LABEL: cmpxchg_i8_i64_z_with_folded_or_offset:
-; CHECK: i64.atomic.rmw8_u.cmpxchg $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
+; CHECK: i64.atomic.rmw8.cmpxchg_u $push[[R1:[0-9]+]]=, 2($pop{{[0-9]+}}), $1, $2{{$}}
 define i64 @cmpxchg_i8_i64_z_with_folded_or_offset(i32 %x, i64 %exp, i64 %new) {
   %and = and i32 %x, -4
   %t0 = inttoptr i32 %and to i8*
   %arrayidx = getelementptr inbounds i8, i8* %t0, i32 2
   %exp_t = trunc i64 %exp to i8
   %new_t = trunc i64 %new to i8
   %pair = cmpxchg i8* %arrayidx, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %conv = zext i8 %old to i64
   ret i64 %conv
 }
 
 ; When loading from a fixed address, materialize a zero.
 
 ; CHECK-LABEL: cmpxchg_i16_i32_z_from_numeric_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw16_u.cmpxchg $push1=, 42($pop0), $0, $1{{$}}
+; CHECK: i32.atomic.rmw16.cmpxchg_u $push1=, 42($pop0), $0, $1{{$}}
 define i32 @cmpxchg_i16_i32_z_from_numeric_address(i32 %exp, i32 %new) {
   %s = inttoptr i32 42 to i16*
   %exp_t = trunc i32 %exp to i16
   %new_t = trunc i32 %new to i16
   %pair = cmpxchg i16* %s, i16 %exp_t, i16 %new_t seq_cst seq_cst
   %old = extractvalue { i16, i1 } %pair, 0
   %u = zext i16 %old to i32
   ret i32 %u
 }
 
 ; CHECK-LABEL: cmpxchg_i8_i32_z_from_global_address
 ; CHECK: i32.const $push0=, 0{{$}}
-; CHECK: i32.atomic.rmw8_u.cmpxchg $push1=, gv8($pop0), $0, $1{{$}}
+; CHECK: i32.atomic.rmw8.cmpxchg_u $push1=, gv8($pop0), $0, $1{{$}}
 define i32 @cmpxchg_i8_i32_z_from_global_address(i32 %exp, i32 %new) {
   %exp_t = trunc i32 %exp to i8
   %new_t = trunc i32 %new to i8
   %pair = cmpxchg i8* @gv8, i8 %exp_t, i8 %new_t seq_cst seq_cst
   %old = extractvalue { i8, i1 } %pair, 0
   %u = zext i8 %old to i32
   ret i32 %u
 }

llvm/trunk/test/CodeGen/WebAssembly/offset-fastisel.ll

 ; CHECK: i32.store8 0($pop[[L0]]), $pop[[L1]]{{$}}
 define void @store_i8_with_variable_gep_offset(i8* %p, i32 %idx) {
   %s = getelementptr inbounds i8, i8* %p, i32 %idx
   store i8 0, i8* %s
   ret void
 }
 
 ; CHECK-LABEL: store_i8_with_array_alloca_gep:
-; CHECK: get_global  $push[[L0:[0-9]+]]=, __stack_pointer
+; CHECK: global.get  $push[[L0:[0-9]+]]=, __stack_pointer
 ; CHECK: i32.const   $push[[L1:[0-9]+]]=, 32{{$}}
 ; CHECK: i32.sub     $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; CHECK: copy_local  $push[[L3:[0-9]+]]=, $pop[[L2]]
+; CHECK: local.copy  $push[[L3:[0-9]+]]=, $pop[[L2]]
 ; CHECK: i32.add     $push[[L4:[0-9]+]]=, $pop[[L3]], $0{{$}}
 ; CHECK: i32.const   $push[[L5:[0-9]+]]=, 0{{$}}
 ; CHECK: i32.store8  0($pop[[L4]]), $pop[[L5]]{{$}}
 define hidden void @store_i8_with_array_alloca_gep(i32 %idx) {
   %A = alloca [30 x i8], align 16
   %s = getelementptr inbounds [30 x i8], [30 x i8]* %A, i32 0, i32 %idx
   store i8 0, i8* %s, align 1
   ret void

llvm/trunk/test/CodeGen/WebAssembly/phi.ll

done:
   %s = phi i32 [ %a, %true ], [ %p, %entry ]
   ret i32 %s
 }
 
 ; Swap phis.
 
 ; CHECK-LABEL: test1:
 ; CHECK: .LBB1_1:
-; CHECK: copy_local $[[NUM0:[0-9]+]]=, $[[NUM1:[0-9]+]]{{$}}
-; CHECK: copy_local $[[NUM1]]=, $[[NUM2:[0-9]+]]{{$}}
-; CHECK: copy_local $[[NUM2]]=, $[[NUM0]]{{$}}
+; CHECK: local.copy $[[NUM0:[0-9]+]]=, $[[NUM1:[0-9]+]]{{$}}
+; CHECK: local.copy $[[NUM1]]=, $[[NUM2:[0-9]+]]{{$}}
+; CHECK: local.copy $[[NUM2]]=, $[[NUM0]]{{$}}
 define i32 @test1(i32 %n) {
 entry:
   br label %loop
 
 loop:
   %a = phi i32 [ 0, %entry ], [ %b, %loop ]
   %b = phi i32 [ 1, %entry ], [ %a, %loop ]
   %i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
 
   %i.next = add i32 %i, 1
   %t = icmp slt i32 %i.next, %n
   br i1 %t, label %loop, label %exit
 
 exit:
   ret i32 %a
 }

llvm/trunk/test/CodeGen/WebAssembly/reg-stackify.ll

 ; CHECK-NEXT: return      $pop9{{$}}
 ; CHECK-NEXT: .LBB7_2:
 ; CHECK-NEXT: end_block{{$}}
 ; CHECK-NEXT: i32.const   $push14=, 1{{$}}
 ; CHECK-NEXT: return      $pop14{{$}}
 ; NOREGS-LABEL: stack_uses:
 ; NOREGS: .functype stack_uses (i32, i32, i32, i32) -> (i32){{$}}
 ; NOREGS-NEXT: block {{$}}
-; NOREGS-NEXT: get_local 0{{$}}
+; NOREGS-NEXT: local.get 0{{$}}
 ; NOREGS-NEXT: i32.const   1{{$}}
 ; NOREGS-NEXT: i32.lt_s
-; NOREGS-NEXT: get_local 1{{$}}
+; NOREGS-NEXT: local.get 1{{$}}
 ; NOREGS-NEXT: i32.const   2{{$}}
 ; NOREGS-NEXT: i32.lt_s
 ; NOREGS-NEXT: i32.xor {{$}}
-; NOREGS-NEXT: get_local 2{{$}}
+; NOREGS-NEXT: local.get 2{{$}}
 ; NOREGS-NEXT: i32.const   1{{$}}
 ; NOREGS-NEXT: i32.lt_s
-; NOREGS-NEXT: get_local 3{{$}}
+; NOREGS-NEXT: local.get 3{{$}}
 ; NOREGS-NEXT: i32.const   2{{$}}
 ; NOREGS-NEXT: i32.lt_s
 ; NOREGS-NEXT: i32.xor {{$}}
 ; NOREGS-NEXT: i32.xor {{$}}
 ; NOREGS-NEXT: i32.const   1{{$}}
 ; NOREGS-NEXT: i32.ne {{$}}
 ; NOREGS-NEXT: br_if       0{{$}}
 ; NOREGS-NEXT: i32.const   0{{$}}
entry:
   br i1 %i, label %true, label %false
 true:
   ret i32 0
 false:
   ret i32 1
 }
 
 ; Test an interesting case where the load has multiple uses and cannot
-; be trivially stackified. However, it can be stackified with a tee_local.
+; be trivially stackified. However, it can be stackified with a local.tee.
 
 ; CHECK-LABEL: multiple_uses:
 ; CHECK: .functype multiple_uses (i32, i32, i32) -> (){{$}}
 ; CHECK-NEXT: block   {{$}}
 ; CHECK-NEXT: i32.load    $push[[NUM0:[0-9]+]]=, 0($2){{$}}
-; CHECK-NEXT: tee_local   $push[[NUM1:[0-9]+]]=, $3=, $pop[[NUM0]]{{$}}
+; CHECK-NEXT: local.tee   $push[[NUM1:[0-9]+]]=, $3=, $pop[[NUM0]]{{$}}
 ; CHECK-NEXT: i32.ge_u    $push[[NUM2:[0-9]+]]=, $pop[[NUM1]], $1{{$}}
 ; CHECK-NEXT: br_if       0, $pop[[NUM2]]{{$}}
 ; CHECK-NEXT: i32.lt_u    $push[[NUM3:[0-9]+]]=, $3, $0{{$}}
 ; CHECK-NEXT: br_if       0, $pop[[NUM3]]{{$}}
 ; CHECK-NEXT: i32.store   0($2), $3{{$}}
 ; CHECK-NEXT: .LBB8_3:
 ; CHECK-NEXT: end_block{{$}}
 ; CHECK-NEXT: return{{$}}
 ; NOREGS-LABEL: multiple_uses:
 ; NOREGS: .functype multiple_uses (i32, i32, i32) -> (){{$}}
 ; NOREGS: .local i32{{$}}
 ; NOREGS-NEXT: block {{$}}
-; NOREGS-NEXT: get_local   2{{$}}
+; NOREGS-NEXT: local.get   2{{$}}
 ; NOREGS-NEXT: i32.load    0{{$}}
-; NOREGS-NEXT: tee_local   3{{$}}
-; NOREGS-NEXT: get_local   1{{$}}
+; NOREGS-NEXT: local.tee   3{{$}}
+; NOREGS-NEXT: local.get   1{{$}}
 ; NOREGS-NEXT: i32.ge_u
 ; NOREGS-NEXT: br_if       0{{$}}
-; NOREGS-NEXT: get_local   3{{$}}
-; NOREGS-NEXT: get_local   0{{$}}
+; NOREGS-NEXT: local.get   3{{$}}
+; NOREGS-NEXT: local.get   0{{$}}
 ; NOREGS-NEXT: i32.lt_u
 ; NOREGS-NEXT: br_if       0{{$}}
-; NOREGS-NEXT: get_local   2{{$}}
-; NOREGS-NEXT: get_local   3{{$}}
+; NOREGS-NEXT: local.get   2{{$}}
+; NOREGS-NEXT: local.get   3{{$}}
 ; NOREGS-NEXT: i32.store   0{{$}}
 ; NOREGS-NEXT: .LBB8_3:
 ; NOREGS-NEXT: end_block{{$}}
 ; NOREGS-NEXT: return{{$}}
 define void @multiple_uses(i32* %arg0, i32* %arg1, i32* %arg2) nounwind {
 bb:
   br label %loop
 

 ; CHECK-NEXT: i32.div_s   $push[[L10:[0-9]+]]=, $12, $13{{$}}
 ; CHECK-NEXT: i32.div_s   $push[[L11:[0-9]+]]=, $14, $15{{$}}
 ; CHECK-NEXT: i32.div_s   $push[[L12:[0-9]+]]=, $pop[[L10]], $pop[[L11]]{{$}}
 ; CHECK-NEXT: i32.div_s   $push[[L13:[0-9]+]]=, $pop[[L9]], $pop[[L12]]{{$}}
 ; CHECK-NEXT: i32.div_s   $push[[L14:[0-9]+]]=, $pop[[L6]], $pop[[L13]]{{$}}
 ; CHECK-NEXT: return      $pop[[L14]]{{$}}
 ; NOREGS-LABEL: div_tree:
 ; NOREGS: .functype div_tree (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) -> (i32){{$}}
-; NOREGS-NEXT: get_local 0{{$}}
-; NOREGS-NEXT: get_local 1{{$}}
+; NOREGS-NEXT: local.get 0{{$}}
+; NOREGS-NEXT: local.get 1{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 2{{$}}
-; NOREGS-NEXT: get_local 3{{$}}
+; NOREGS-NEXT: local.get 2{{$}}
+; NOREGS-NEXT: local.get 3{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 4{{$}}
-; NOREGS-NEXT: get_local 5{{$}}
+; NOREGS-NEXT: local.get 4{{$}}
+; NOREGS-NEXT: local.get 5{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 6{{$}}
-; NOREGS-NEXT: get_local 7{{$}}
+; NOREGS-NEXT: local.get 6{{$}}
+; NOREGS-NEXT: local.get 7{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 8{{$}}
-; NOREGS-NEXT: get_local 9{{$}}
+; NOREGS-NEXT: local.get 8{{$}}
+; NOREGS-NEXT: local.get 9{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 10{{$}}
-; NOREGS-NEXT: get_local 11{{$}}
+; NOREGS-NEXT: local.get 10{{$}}
+; NOREGS-NEXT: local.get 11{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 12{{$}}
-; NOREGS-NEXT: get_local 13{{$}}
+; NOREGS-NEXT: local.get 12{{$}}
+; NOREGS-NEXT: local.get 13{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
-; NOREGS-NEXT: get_local 14{{$}}
-; NOREGS-NEXT: get_local 15{{$}}
+; NOREGS-NEXT: local.get 14{{$}}
+; NOREGS-NEXT: local.get 15{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: i32.div_s{{$}}
 ; NOREGS-NEXT: return{{$}}
 define i32 @div_tree(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j, i32 %k, i32 %l, i32 %m, i32 %n, i32 %o, i32 %p) {
 entry:
   %div = sdiv i32 %a, %b
entry:
   ret i32 %div14
 }
 
 ; A simple multiple-use case.
 
 ; CHECK-LABEL: simple_multiple_use:
 ; CHECK:       .functype simple_multiple_use (i32, i32) -> (){{$}}
 ; CHECK-NEXT:  i32.mul     $push[[NUM0:[0-9]+]]=, $1, $0{{$}}
-; CHECK-NEXT:  tee_local   $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
+; CHECK-NEXT:  local.tee   $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
 ; CHECK-NEXT:  call        use_a@FUNCTION, $pop[[NUM1]]{{$}}
 ; CHECK-NEXT:  call        use_b@FUNCTION, $[[NUM2]]{{$}}
 ; CHECK-NEXT:  return{{$}}
 ; NOREGS-LABEL: simple_multiple_use:
 ; NOREGS:       .functype simple_multiple_use (i32, i32) -> (){{$}}
-; NOREGS-NEXT:  get_local 1{{$}}
-; NOREGS-NEXT:  get_local 0{{$}}
+; NOREGS-NEXT:  local.get 1{{$}}
+; NOREGS-NEXT:  local.get 0{{$}}
 ; NOREGS-NEXT:  i32.mul
-; NOREGS-NEXT:  tee_local   1{{$}}
+; NOREGS-NEXT:  local.tee   1{{$}}
 ; NOREGS-NEXT:  call        use_a@FUNCTION{{$}}
-; NOREGS-NEXT:  get_local   1{{$}}
+; NOREGS-NEXT:  local.get   1{{$}}
 ; NOREGS-NEXT:  call        use_b@FUNCTION{{$}}
 ; NOREGS-NEXT:  return{{$}}
 declare void @use_a(i32)
 declare void @use_b(i32)
 define void @simple_multiple_use(i32 %x, i32 %y) {
   %mul = mul i32 %y, %x
   call void @use_a(i32 %mul)
   call void @use_b(i32 %mul)
   ret void
 }
 
 ; Multiple uses of the same value in one instruction.
 
 ; CHECK-LABEL: multiple_uses_in_same_insn:
 ; CHECK:       .functype multiple_uses_in_same_insn (i32, i32) -> (){{$}}
 ; CHECK-NEXT:  i32.mul     $push[[NUM0:[0-9]+]]=, $1, $0{{$}}
-; CHECK-NEXT:  tee_local   $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
+; CHECK-NEXT:  local.tee   $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
 ; CHECK-NEXT:  call        use_2@FUNCTION, $pop[[NUM1]], $[[NUM2]]{{$}}
 ; CHECK-NEXT:  return{{$}}
 ; NOREGS-LABEL: multiple_uses_in_same_insn:
 ; NOREGS:       .functype multiple_uses_in_same_insn (i32, i32) -> (){{$}}
-; NOREGS-NEXT:  get_local 1{{$}}
-; NOREGS-NEXT:  get_local 0{{$}}
+; NOREGS-NEXT:  local.get 1{{$}}
+; NOREGS-NEXT:  local.get 0{{$}}
 ; NOREGS-NEXT:  i32.mul
-; NOREGS-NEXT:  tee_local   1{{$}}
-; NOREGS-NEXT:  get_local   1{{$}}
+; NOREGS-NEXT:  local.tee   1{{$}}
+; NOREGS-NEXT:  local.get   1{{$}}
 ; NOREGS-NEXT:  call        use_2@FUNCTION{{$}}
 ; NOREGS-NEXT:  return{{$}}
 declare void @use_2(i32, i32)
 define void @multiple_uses_in_same_insn(i32 %x, i32 %y) {
   %mul = mul i32 %y, %x
   call void @use_2(i32 %mul, i32 %mul)
   ret void
 }
define i32 @commute() {
   %call1 = call i32 @green()
   %add = add i32 %call1, %call
   %call2 = call i32 @blue()
   %add3 = add i32 %add, %call2
   ret i32 %add3
 }
 
 ; Don't stackify a register when it would move a the def of the register past
-; an implicit get_local for the register.
+; an implicit local.get for the register.
 
 ; CHECK-LABEL: no_stackify_past_use:
 ; CHECK:      i32.call        $1=, callee@FUNCTION, $0
 ; CHECK-NEXT: i32.const       $push0=, 1
 ; CHECK-NEXT: i32.add         $push1=, $0, $pop0
 ; CHECK-NEXT: i32.call        $push2=, callee@FUNCTION, $pop1
 ; CHECK-NEXT: i32.sub         $push3=, $pop2, $1
 ; CHECK-NEXT: i32.div_s       $push4=, $pop3, $1
 ; CHECK-NEXT: return          $pop4
 ; NOREGS-LABEL: no_stackify_past_use:
-; NOREGS:      get_local       0{{$}}
+; NOREGS:      local.get       0{{$}}
 ; NOREGS-NEXT: i32.call        callee@FUNCTION
-; NOREGS-NEXT: set_local       1{{$}}
-; NOREGS-NEXT: get_local       0{{$}}
+; NOREGS-NEXT: local.set       1{{$}}
+; NOREGS-NEXT: local.get       0{{$}}
 ; NOREGS-NEXT: i32.const       1
 ; NOREGS-NEXT: i32.add
 ; NOREGS-NEXT: i32.call        callee@FUNCTION
-; NOREGS-NEXT: get_local       1{{$}}
+; NOREGS-NEXT: local.get       1{{$}}
 ; NOREGS-NEXT: i32.sub
-; NOREGS-NEXT: get_local       1{{$}}
+; NOREGS-NEXT: local.get       1{{$}}
 ; NOREGS-NEXT: i32.div_s
 ; NOREGS-NEXT: return
 declare i32 @callee(i32)
 define i32 @no_stackify_past_use(i32 %arg) {
   %tmp1 = call i32 @callee(i32 %arg)
   %tmp2 = add i32 %arg, 1
   %tmp3 = call i32 @callee(i32 %tmp2)
   %tmp5 = sub i32 %tmp3, %tmp1
   %tmp6 = sdiv i32 %tmp5, %tmp1
   ret i32 %tmp6
 }
 
 ; This is the same as no_stackify_past_use, except using a commutative operator,
 ; so we can reorder the operands and stackify.
 
 ; CHECK-LABEL: commute_to_fix_ordering:
 ; CHECK: i32.call        $push[[L0:.+]]=, callee@FUNCTION, $0
-; CHECK: tee_local       $push[[L1:.+]]=, $1=, $pop[[L0]]
+; CHECK: local.tee       $push[[L1:.+]]=, $1=, $pop[[L0]]
 ; CHECK: i32.const       $push0=, 1
 ; CHECK: i32.add         $push1=, $0, $pop0
 ; CHECK: i32.call        $push2=, callee@FUNCTION, $pop1
 ; CHECK: i32.add         $push3=, $1, $pop2
 ; CHECK: i32.mul         $push4=, $pop[[L1]], $pop3
 ; CHECK: return          $pop4
 ; NOREGS-LABEL: commute_to_fix_ordering:
-; NOREGS: get_local       0{{$}}
+; NOREGS: local.get       0{{$}}
 ; NOREGS: i32.call        callee@FUNCTION
-; NOREGS: tee_local       1
-; NOREGS: get_local       1{{$}}
-; NOREGS: get_local       0{{$}}
+; NOREGS: local.tee       1
+; NOREGS: local.get       1{{$}}
+; NOREGS: local.get       0{{$}}
 ; NOREGS: i32.const       1
 ; NOREGS: i32.add
 ; NOREGS: i32.call        callee@FUNCTION
 ; NOREGS: i32.add
 ; NOREGS: i32.mul
 ; NOREGS: return
 define i32 @commute_to_fix_ordering(i32 %arg) {
   %tmp1 = call i32 @callee(i32 %arg)
   %tmp2 = add i32 %arg, 1
   %tmp3 = call i32 @callee(i32 %tmp2)
   %tmp5 = add i32 %tmp3, %tmp1
   %tmp6 = mul i32 %tmp5, %tmp1
   ret i32 %tmp6
 }
 
 ; Stackify individual defs of virtual registers with multiple defs.
 
 ; CHECK-LABEL: multiple_defs:
 ; CHECK:        f64.add         $push[[NUM0:[0-9]+]]=, ${{[0-9]+}}, $pop{{[0-9]+}}{{$}}
-; CHECK-NEXT:   tee_local       $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
+; CHECK-NEXT:   local.tee       $push[[NUM1:[0-9]+]]=, $[[NUM2:[0-9]+]]=, $pop[[NUM0]]{{$}}
 ; CHECK-NEXT:   f64.select      $push{{[0-9]+}}=, $pop{{[0-9]+}}, $pop[[NUM1]], ${{[0-9]+}}{{$}}
 ; CHECK:        $[[NUM2]]=,
 ; NOREGS-LABEL: multiple_defs:
 ; NOREGS:        f64.add
-; NOREGS:        tee_local
+; NOREGS:        local.tee
 ; NOREGS:        f64.select
 define void @multiple_defs(i32 %arg, i32 %arg1, i1 %arg2, i1 %arg3, i1 %arg4) {
 bb:
   br label %bb5
 
 bb5:                                              ; preds = %bb21, %bb
   %tmp = phi double [ 0.000000e+00, %bb ], [ %tmp22, %bb21 ]
   %tmp6 = phi double [ 0.000000e+00, %bb ], [ %tmp23, %bb21 ]
define i32 @no_stackify_past_epilogue() {
   ret i32 %call
 }
 
 ; Stackify a loop induction variable into a loop comparison.
 
 ; CHECK-LABEL: stackify_indvar:
 ; CHECK:             i32.const   $push[[L5:.+]]=, 1{{$}}
 ; CHECK-NEXT:        i32.add     $push[[L4:.+]]=, $[[R0:.+]], $pop[[L5]]{{$}}
-; CHECK-NEXT:        tee_local   $push[[L3:.+]]=, $[[R0]]=, $pop[[L4]]{{$}}
+; CHECK-NEXT:        local.tee   $push[[L3:.+]]=, $[[R0]]=, $pop[[L4]]{{$}}
 ; CHECK-NEXT:        i32.ne      $push[[L2:.+]]=, $0, $pop[[L3]]{{$}}
 ; NOREGS-LABEL: stackify_indvar:
 ; NOREGS:             i32.const   1{{$}}
 ; NOREGS-NEXT:        i32.add
-; NOREGS-NEXT:        tee_local   2{{$}}
+; NOREGS-NEXT:        local.tee   2{{$}}
 ; NOREGS-NEXT:        i32.ne
 define void @stackify_indvar(i32 %tmp, i32* %v) #0 {
 bb:
   br label %bb3
 
 bb3:                                              ; preds = %bb3, %bb2
   %tmp4 = phi i32 [ %tmp7, %bb3 ], [ 0, %bb ]
   %tmp5 = load volatile i32, i32* %v, align 4
   %tmp6 = add nsw i32 %tmp5, %tmp4
   store volatile i32 %tmp6, i32* %v, align 4
   %tmp7 = add nuw nsw i32 %tmp4, 1
   %tmp8 = icmp eq i32 %tmp7, %tmp
   br i1 %tmp8, label %bb10, label %bb3
 
 bb10:                                             ; preds = %bb9, %bb
   ret void
 }
 
 ; Don't stackify a call past a __stack_pointer store.
 
 ; CHECK-LABEL: stackpointer_dependency:
 ; CHECK:      call {{.+}}, stackpointer_callee@FUNCTION,
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL,
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL,
 ; NOREGS-LABEL: stackpointer_dependency:
 ; NOREGS:      call stackpointer_callee@FUNCTION
-; NOREGS:      set_global __stack_pointer
+; NOREGS:      global.set __stack_pointer
 declare i32 @stackpointer_callee(i8* readnone, i8* readnone)
 declare i8* @llvm.frameaddress(i32)
 define i32 @stackpointer_dependency(i8* readnone) {
   %2 = tail call i8* @llvm.frameaddress(i32 0)
   %3 = tail call i32 @stackpointer_callee(i8* %0, i8* %2)
   ret i32 %3
 }
 
 ; Stackify a call_indirect with respect to its ordering
 
 ; CHECK-LABEL: call_indirect_stackify:
 ; CHECK: i32.load  $push[[L4:.+]]=, 0($0)
-; CHECK-NEXT: tee_local $push[[L3:.+]]=, $0=, $pop[[L4]]
+; CHECK-NEXT: local.tee $push[[L3:.+]]=, $0=, $pop[[L4]]
 ; CHECK-NEXT: i32.load  $push[[L0:.+]]=, 0($0)
 ; CHECK-NEXT: i32.load  $push[[L1:.+]]=, 0($pop[[L0]])
 ; CHECK-NEXT: i32.call_indirect $push{{.+}}=, $pop[[L3]], $1, $pop[[L1]]
 ; NOREGS-LABEL: call_indirect_stackify:
 ; NOREGS: i32.load  0
-; NOREGS-NEXT: tee_local 0
+; NOREGS-NEXT: local.tee 0
 ; NOREGS:      i32.load  0
 ; NOREGS-NEXT: i32.load  0
 ; NOREGS-NEXT: i32.call_indirect
 %class.call_indirect = type { i32 (...)** }
 define i32 @call_indirect_stackify(%class.call_indirect** %objptr, i32 %arg) {
   %obj = load %class.call_indirect*, %class.call_indirect** %objptr
   %addr = bitcast %class.call_indirect* %obj to i32(%class.call_indirect*, i32)***
   %vtable = load i32(%class.call_indirect*, i32)**, i32(%class.call_indirect*, i32)*** %addr

llvm/trunk/test/CodeGen/WebAssembly/return-int32.ll

 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: return_i32:
 ; CHECK-NEXT:  .functype return_i32 (i32) -> (i32){{$}}
-; CHECK-NEXT:  get_local  $push0=, 0
+; CHECK-NEXT:  local.get  $push0=, 0
 ; CHECK-NEXT:  end_function{{$}}
 define i32 @return_i32(i32 %p) {
   ret i32 %p
 }
 
 ; CHECK-LABEL: return_i32_twice:
 ; CHECK:      store
 ; CHECK-NEXT: i32.const $push[[L0:[^,]+]]=, 1{{$}}

llvm/trunk/test/CodeGen/WebAssembly/signext-inreg.ll

 ; NOSIGNEXT-NOT: i32.extend16_s
 define i32 @i32_extend16_s(i16 %x) {
   %a = sext i16 %x to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: i64_extend8_s:
 ; CHECK-NEXT: .functype i64_extend8_s (i32) -> (i64){{$}}
-; CHECK-NEXT: i64.extend_u/i32 $push[[NUM1:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.extend_i32_u $push[[NUM1:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: i64.extend8_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 
 ; NOSIGNEXT-LABEL: i64_extend8_s
 ; NOSIGNEXT-NOT: i64.extend8_s
 define i64 @i64_extend8_s(i8 %x) {
   %a = sext i8 %x to i64
   ret i64 %a
 }
 
 ; CHECK-LABEL: i64_extend16_s:
 ; CHECK-NEXT: .functype i64_extend16_s (i32) -> (i64){{$}}
-; CHECK-NEXT: i64.extend_u/i32 $push[[NUM1:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.extend_i32_u $push[[NUM1:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: i64.extend16_s $push[[NUM2:[0-9]+]]=, $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: return $pop[[NUM2]]{{$}}
 
 ; NOSIGNEXT-LABEL: i64_extend16_s
 ; NOSIGNEXT-NOT: i16.extend16_s
 define i64 @i64_extend16_s(i16 %x) {
   %a = sext i16 %x to i64
   ret i64 %a
 }
 
 ; No SIGN_EXTEND_INREG is needed for 32->64 extension.
 ; CHECK-LABEL: i64_extend32_s:
 ; CHECK-NEXT: .functype i64_extend32_s (i32) -> (i64){{$}}
-; CHECK-NEXT: i64.extend_s/i32 $push[[NUM:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: i64.extend_i32_s $push[[NUM:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[NUM]]{{$}}
 define i64 @i64_extend32_s(i32 %x) {
   %a = sext i32 %x to i64
   ret i64 %a
 }
 

llvm/trunk/test/CodeGen/WebAssembly/simd-arith.ll

define <2 x i64> @shl_v2i64(<2 x i64> %v, i32 %x) {
   %s = shufflevector <2 x i64> %t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
   %a = shl <2 x i64> %v, %s
   ret <2 x i64> %a
 }
 
 ; CHECK-LABEL: shl_nozext_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-NEXT: .functype shl_nozext_v2i64 (v128, i64) -> (v128){{$}}
-; SIMD128-NEXT: i32.wrap/i64 $push[[L0:[0-9]+]]=, $1{{$}}
+; SIMD128-NEXT: i32.wrap_i64 $push[[L0:[0-9]+]]=, $1{{$}}
 ; SIMD128-NEXT: i64x2.shl $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @shl_nozext_v2i64(<2 x i64> %v, i64 %x) {
   %t = insertelement <2 x i64> undef, i64 %x, i32 0
   %s = shufflevector <2 x i64> %t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
   %a = shl <2 x i64> %v, %s
   ret <2 x i64> %a
 }
define <2 x i64> @shr_s_v2i64(<2 x i64> %v, i32 %x) {
   %s = shufflevector <2 x i64> %t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
   %a = ashr <2 x i64> %v, %s
   ret <2 x i64> %a
 }
 
 ; CHECK-LABEL: shr_s_nozext_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-NEXT: .functype shr_s_nozext_v2i64 (v128, i64) -> (v128){{$}}
-; SIMD128-NEXT: i32.wrap/i64 $push[[L0:[0-9]+]]=, $1{{$}}
+; SIMD128-NEXT: i32.wrap_i64 $push[[L0:[0-9]+]]=, $1{{$}}
 ; SIMD128-NEXT: i64x2.shr_s $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @shr_s_nozext_v2i64(<2 x i64> %v, i64 %x) {
   %t = insertelement <2 x i64> undef, i64 %x, i32 0
   %s = shufflevector <2 x i64> %t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
   %a = ashr <2 x i64> %v, %s
   ret <2 x i64> %a
 }
define <2 x i64> @shr_u_v2i64(<2 x i64> %v, i32 %x) {
   %s = shufflevector <2 x i64> %t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
   %a = lshr <2 x i64> %v, %s
   ret <2 x i64> %a
 }
 
 ; CHECK-LABEL: shr_u_nozext_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-NEXT: .functype shr_u_nozext_v2i64 (v128, i64) -> (v128){{$}}
-; SIMD128-NEXT: i32.wrap/i64 $push[[L0:[0-9]+]]=, $1{{$}}
+; SIMD128-NEXT: i32.wrap_i64 $push[[L0:[0-9]+]]=, $1{{$}}
 ; SIMD128-NEXT: i64x2.shr_u $push[[R:[0-9]+]]=, $0, $pop[[L0]]{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @shr_u_nozext_v2i64(<2 x i64> %v, i64 %x) {
   %t = insertelement <2 x i64> undef, i64 %x, i32 0
   %s = shufflevector <2 x i64> %t, <2 x i64> undef, <2 x i32> <i32 0, i32 0>
   %a = lshr <2 x i64> %v, %s
   ret <2 x i64> %a
 }

llvm/trunk/test/CodeGen/WebAssembly/simd-conversions.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
 
 ; Test that vector float-to-int and int-to-float instructions lower correctly
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: convert_s_v4f32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}}
-; SIMD128-NEXT: f32x4.convert_s/i32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f32x4.convert_i32x4_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
   %a = sitofp <4 x i32> %x to <4 x float>
   ret <4 x float> %a
 }
 
 ; CHECK-LABEL: convert_u_v4f32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .functype convert_u_v4f32 (v128) -> (v128){{$}}
-; SIMD128-NEXT: f32x4.convert_u/i32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f32x4.convert_i32x4_u $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
   %a = uitofp <4 x i32> %x to <4 x float>
   ret <4 x float> %a
 }
 
 ; CHECK-LABEL: convert_s_v2f64:
 ; NO-SIMD128-NOT: i64x2
-; SIMD128-VM-NOT: f64x2.convert_s/i64x2
+; SIMD128-VM-NOT: f64x2.convert_i64x2_s
 ; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: f64x2.convert_s/i64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f64x2.convert_i64x2_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
   %a = sitofp <2 x i64> %x to <2 x double>
   ret <2 x double> %a
 }
 
 ; CHECK-LABEL: convert_u_v2f64:
 ; NO-SIMD128-NOT: i64x2
-; SIMD128-VM-NOT: f64x2.convert_u/i64x2
+; SIMD128-VM-NOT: f64x2.convert_i64x2_u
 ; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: f64x2.convert_u/i64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: f64x2.convert_i64x2_u $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
   %a = uitofp <2 x i64> %x to <2 x double>
   ret <2 x double> %a
 }
 
 ; CHECK-LABEL: trunc_sat_s_v4i32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i32x4.trunc_sat_f32x4_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
   %a = fptosi <4 x float> %x to <4 x i32>
   ret <4 x i32> %a
 }
 
 ; CHECK-LABEL: trunc_sat_u_v4i32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i32x4.trunc_sat_f32x4_u $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
   %a = fptoui <4 x float> %x to <4 x i32>
   ret <4 x i32> %a
 }
 
 ; CHECK-LABEL: trunc_sat_s_v2i64:
 ; NO-SIMD128-NOT: f64x2
-; SIMD128-VM-NOT: i64x2.trunc_sat_s/f64x2
+; SIMD128-VM-NOT: i64x2.trunc_sat_f64x2_s
 ; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i64x2.trunc_sat_f64x2_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
   %a = fptosi <2 x double> %x to <2 x i64>
   ret <2 x i64> %a
 }
 
 ; CHECK-LABEL: trunc_sat_u_v2i64:
 ; NO-SIMD128-NOT: f64x2
-; SIMD128-VM-NOT: i64x2.trunc_sat_u/f64x2
+; SIMD128-VM-NOT: i64x2.trunc_sat_f64x2_u
 ; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i64x2.trunc_sat_f64x2_u $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
   %a = fptoui <2 x double> %x to <2 x i64>
   ret <2 x i64> %a
 }

llvm/trunk/test/CodeGen/WebAssembly/simd-intrinsics.ll

%a = call <4 x i32> @llvm.wasm.bitselect.v4i32(
     <4 x i32> %c, <4 x i32> %v1, <4 x i32> %v2
   )
   ret <4 x i32> %a
 }
 
 ; CHECK-LABEL: trunc_sat_s_v4i32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i32x4.trunc_sat_f32x4_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 declare <4 x i32> @llvm.wasm.trunc.saturate.signed.v4i32.v4f32(<4 x float>)
 define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
   %a = call <4 x i32> @llvm.wasm.trunc.saturate.signed.v4i32.v4f32(<4 x float> %x)
   ret <4 x i32> %a
 }
 
 ; CHECK-LABEL: trunc_sat_u_v4i32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i32x4.trunc_sat_f32x4_u $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 declare <4 x i32> @llvm.wasm.trunc.saturate.unsigned.v4i32.v4f32(<4 x float>)
 define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
   %a = call <4 x i32> @llvm.wasm.trunc.saturate.unsigned.v4i32.v4f32(<4 x float> %x)
   ret <4 x i32> %a
 }
 
 ; ==============================================================================
%a = call <2 x i64> @llvm.wasm.bitselect.v2i64(
     <2 x i64> %c, <2 x i64> %v1, <2 x i64> %v2
   )
   ret <2 x i64> %a
 }
 
 ; CHECK-LABEL: trunc_sat_s_v2i64:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i64x2.trunc_sat_f64x2_s $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 declare <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double>)
 define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
   %a = call <2 x i64> @llvm.wasm.trunc.saturate.signed.v2i64.v2f64(<2 x double> %x)
   ret <2 x i64> %a
 }
 
 ; CHECK-LABEL: trunc_sat_u_v2i64:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
-; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
+; SIMD128-NEXT: i64x2.trunc_sat_f64x2_u $push[[R:[0-9]+]]=, $0
 ; SIMD128-NEXT: return $pop[[R]]
 declare <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double>)
 define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
   %a = call <2 x i64> @llvm.wasm.trunc.saturate.unsigned.v2i64.v2f64(<2 x double> %x)
   ret <2 x i64> %a
 }
 
 ; ==============================================================================

llvm/trunk/test/CodeGen/WebAssembly/simd.ll

define i32 @extract_v16i8_s(<16 x i8> %v) {
   %elem = extractelement <16 x i8> %v, i8 13
   %a = sext i8 %elem to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: extract_var_v16i8_s:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype extract_var_v16i8_s (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]
 ; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]
 ; SIMD128-NEXT: i32.load8_s $push[[R:[0-9]+]]=, 0($pop[[L6]])
 ; SIMD128-NEXT: return $pop[[R]]
 define i32 @extract_var_v16i8_s(<16 x i8> %v, i32 %i) {
   %elem = extractelement <16 x i8> %v, i32 %i
define i32 @extract_v16i8_u(<16 x i8> %v) {
   %elem = extractelement <16 x i8> %v, i8 13
   %a = zext i8 %elem to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: extract_var_v16i8_u:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype extract_var_v16i8_u (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
 ; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define i32 @extract_var_v16i8_u(<16 x i8> %v, i32 %i) {
   %elem = extractelement <16 x i8> %v, i32 %i

 define i8 @extract_v16i8(<16 x i8> %v) {
   %elem = extractelement <16 x i8> %v, i8 13
   ret i8 %elem
 }
 
 ; CHECK-LABEL: extract_var_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype extract_var_v16i8 (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $2, $pop[[L5]]{{$}}
 ; SIMD128-NEXT: i32.load8_u $push[[R:[0-9]+]]=, 0($pop[[L6]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define i8 @extract_var_v16i8(<16 x i8> %v, i32 %i) {
   %elem = extractelement <16 x i8> %v, i32 %i

 define <16 x i8> @replace_v16i8(<16 x i8> %v, i8 %x) {
   %res = insertelement <16 x i8> %v, i8 %x, i32 11
   ret <16 x i8> %res
 }
 
 ; CHECK-LABEL: replace_var_v16i8:
 ; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype replace_var_v16i8 (v128, i32, i32) -> (v128){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 15{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L6:[0-9]+]]=, $3, $pop[[L5]]{{$}}
 ; SIMD128-NEXT: i32.store8 0($pop[[L6]]), $2{{$}}
 ; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @replace_var_v16i8(<16 x i8> %v, i32 %i, i8 %x) {
define i32 @extract_v8i16_s(<8 x i16> %v) {
   %elem = extractelement <8 x i16> %v, i16 5
   %a = sext i16 %elem to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: extract_var_v8i16_s:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .functype extract_var_v8i16_s (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i32.load16_s $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
define i32 @extract_v8i16_u(<8 x i16> %v) {
   %elem = extractelement <8 x i16> %v, i16 5
   %a = zext i16 %elem to i32
   ret i32 %a
 }
 
 ; CHECK-LABEL: extract_var_v8i16_u:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .functype extract_var_v8i16_u (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}

 define i16 @extract_v8i16(<8 x i16> %v) {
   %elem = extractelement <8 x i16> %v, i16 5
   ret i16 %elem
 }
 
 ; CHECK-LABEL: extract_var_v8i16:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .functype extract_var_v8i16 (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i32.load16_u $push[[R:[0-9]+]]=, 0($pop[[L8]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}

 define <8 x i16> @replace_v8i16(<8 x i16> %v, i16 %x) {
   %res = insertelement <8 x i16> %v, i16 %x, i32 7
   ret <8 x i16> %res
 }
 
 ; CHECK-LABEL: replace_var_v8i16:
 ; NO-SIMD128-NOT: i16x8
 ; SIMD128-NEXT: .functype replace_var_v8i16 (v128, i32, i32) -> (v128){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 7{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L8:[0-9]+]]=, $3, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i32.store16 0($pop[[L8]]), $2{{$}}
 ; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}

 define i32 @extract_v4i32(<4 x i32> %v) {
   %elem = extractelement <4 x i32> %v, i32 3
   ret i32 %elem
 }
 
 ; CHECK-LABEL: extract_var_v4i32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .functype extract_var_v4i32 (v128, i32) -> (i32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i32.load $push[[R:[0-9]+]]=, 0($pop[[L4]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}

 define <4 x i32> @replace_v4i32(<4 x i32> %v, i32 %x) {
   %res = insertelement <4 x i32> %v, i32 %x, i32 2
   ret <4 x i32> %res
 }
 
 ; CHECK-LABEL: replace_var_v4i32:
 ; NO-SIMD128-NOT: i32x4
 ; SIMD128-NEXT: .functype replace_var_v4i32 (v128, i32, i32) -> (v128){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L4:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L4]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L4:[0-9]+]]=, $3, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i32.store 0($pop[[L4]]), $2{{$}}
 ; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}

 define i64 @extract_v2i64(<2 x i64> %v) {
   %elem = extractelement <2 x i64> %v, i64 1
   ret i64 %elem
 }
 
 ; CHECK-LABEL: extract_var_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-NEXT: .functype extract_var_v2i64 (v128, i32) -> (i64){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x i64> @replace_v2i64(<2 x i64> %v, i64 %x) {
   %res = insertelement <2 x i64> %v, i64 %x, i32 0
   ret <2 x i64> %res
 }
 
 ; CHECK-LABEL: replace_var_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
 ; SIMD128-NEXT: .functype replace_var_v2i64 (v128, i32, i64) -> (v128){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: i64.store 0($pop[[L2]]), $2{{$}}
 ; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}

 define float @extract_v4f32(<4 x float> %v) {
   %elem = extractelement <4 x float> %v, i32 3
   ret float %elem
 }
 
 ; CHECK-LABEL: extract_var_v4f32:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-NEXT: .functype extract_var_v4f32 (v128, i32) -> (f32){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: f32.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}

 define <4 x float> @replace_v4f32(<4 x float> %v, float %x) {
   %res = insertelement <4 x float> %v, float %x, i32 2
   ret <4 x float> %res
 }
 
 ; CHECK-LABEL: replace_var_v4f32:
 ; NO-SIMD128-NOT: f32x4
 ; SIMD128-NEXT: .functype replace_var_v4f32 (v128, i32, f32) -> (v128){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 2{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: f32.store 0($pop[[L2]]), $2{{$}}
 ; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}

 define double @extract_v2f64(<2 x double> %v) {
   %elem = extractelement <2 x double> %v, i32 1
   ret double %elem
 }
 
 ; CHECK-LABEL: extract_var_v2f64:
 ; NO-SIMD128-NOT: i62x2
 ; SIMD128-NEXT: .functype extract_var_v2f64 (v128, i32) -> (f64){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $2=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $2, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: f64.load $push[[R:[0-9]+]]=, 0($pop[[L2]]){{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
define <2 x double> @replace_v2f64(<2 x double> %v, double %x) {
   %res = insertelement <2 x double> %v, double %x, i32 0
   ret <2 x double> %res
 }
 
 ; CHECK-LABEL: replace_var_v2f64:
 ; NO-SIMD128-NOT: f64x2
 ; SIMD128-VM-NOT: f64x2
 ; SIMD128-NEXT: .functype replace_var_v2f64 (v128, i32, f64) -> (v128){{$}}
-; SIMD128-NEXT: get_global $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
+; SIMD128-NEXT: global.get $push[[L0:[0-9]+]]=, __stack_pointer@GLOBAL{{$}}
 ; SIMD128-NEXT: i32.const $push[[L1:[0-9]+]]=, 16{{$}}
 ; SIMD128-NEXT: i32.sub $push[[L2:[0-9]+]]=, $pop[[L0]], $pop[[L1]]{{$}}
-; SIMD128-NEXT: tee_local $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
+; SIMD128-NEXT: local.tee $push[[L3:[0-9]+]]=, $3=, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: v128.store 0($pop[[L3]]), $0{{$}}
 ; SIMD128-NEXT: i32.const $push[[L2:[0-9]+]]=, 1{{$}}
 ; SIMD128-NEXT: i32.and $push[[L5:[0-9]+]]=, $1, $pop[[L2]]{{$}}
 ; SIMD128-NEXT: i32.const $push[[L6:[0-9]+]]=, 3{{$}}
 ; SIMD128-NEXT: i32.shl $push[[L7:[0-9]+]]=, $pop[[L5]], $pop[[L6]]{{$}}
 ; SIMD128-NEXT: i32.or $push[[L2:[0-9]+]]=, $3, $pop[[L7]]{{$}}
 ; SIMD128-NEXT: f64.store 0($pop[[L2]]), $2{{$}}
 ; SIMD128-NEXT: v128.load $push[[R:[0-9]+]]=, 0($3){{$}}

llvm/trunk/test/CodeGen/WebAssembly/stack-alignment.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @somefunc(i32*)
 
 ; CHECK-LABEL: underalign:
-; CHECK:      get_global $push[[L1:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK:      global.get $push[[L1:.+]]=, __stack_pointer@GLOBAL{{$}}
 ; CHECK-NEXT: i32.const $push[[L2:.+]]=, 16
 ; CHECK-NEXT: i32.sub   $push[[L10:.+]]=, $pop[[L1]], $pop[[L2]]
-; CHECK-NEXT: tee_local $push{{.+}}=, [[SP:.+]], $pop[[L10]]
+; CHECK-NEXT: local.tee $push{{.+}}=, [[SP:.+]], $pop[[L10]]
 
-; CHECK:      get_local $push[[L3:.+]]=, [[SP]]{{$}}
+; CHECK:      local.get $push[[L3:.+]]=, [[SP]]{{$}}
 ; CHECK:      i32.add   $push[[underaligned:.+]]=, $pop[[L3]], $pop{{.+}}
 ; CHECK-NEXT: call      somefunc@FUNCTION, $pop[[underaligned]]
 
-; CHECK:      get_local $push[[M4:.+]]=, [[SP]]{{$}}
+; CHECK:      local.get $push[[M4:.+]]=, [[SP]]{{$}}
 ; CHECK:      i32.add   $push[[L5:.+]]=, $pop[[M4]], $pop{{.+}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L5]]
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L5]]
 define void @underalign() {
 entry:
   %underaligned = alloca i32, align 8
   call void @somefunc(i32* %underaligned)
   ret void
 }
 
 ; CHECK-LABEL: overalign:
-; CHECK:      get_global $push[[L10:.+]]=, __stack_pointer@GLOBAL{{$}}
-; CHECK-NEXT: tee_local  $push[[L9:.+]]=, [[BP:.+]], $pop[[L10]]
+; CHECK:      global.get $push[[L10:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK-NEXT: local.tee  $push[[L9:.+]]=, [[BP:.+]], $pop[[L10]]
 ; CHECK-NEXT: i32.const  $push[[L2:.+]]=, 32
 ; CHECK-NEXT: i32.sub    $push[[L8:.+]]=, $pop[[L9]], $pop[[L2]]
 ; CHECK-NEXT: i32.const  $push[[L3:.+]]=, -32
 ; CHECK-NEXT: i32.and    $push[[L7:.+]]=, $pop[[L8]], $pop[[L3]]
-; CHECK-NEXT: tee_local  $push{{.+}}=, [[SP:.+]], $pop[[L7]]
+; CHECK-NEXT: local.tee  $push{{.+}}=, [[SP:.+]], $pop[[L7]]
 
-; CHECK:      get_local  $push[[M5:.+]]=, [[SP]]{{$}}
+; CHECK:      local.get  $push[[M5:.+]]=, [[SP]]{{$}}
 ; CHECK:      call       somefunc@FUNCTION, $pop[[M5]]{{$}}
 
-; CHECK:      get_local  $push[[M6:.+]]=, [[BP]]{{$}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[M6]]
+; CHECK:      local.get  $push[[M6:.+]]=, [[BP]]{{$}}
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[M6]]
 define void @overalign() {
 entry:
   %overaligned = alloca i32, align 32
   call void @somefunc(i32* %overaligned)
   ret void
 }
 
 ; CHECK-LABEL: over_and_normal_align:
-; CHECK:      get_global $push[[L14:.+]]=, __stack_pointer@GLOBAL{{$}}
-; CHECK-NEXT: tee_local  $push[[L13:.+]]=, [[BP:.+]], $pop[[L14]]
+; CHECK:      global.get $push[[L14:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK-NEXT: local.tee  $push[[L13:.+]]=, [[BP:.+]], $pop[[L14]]
 ; CHECK:      i32.sub    $push[[L12:.+]]=, $pop[[L13]], $pop{{.+}}
 ; CHECK:      i32.and    $push[[L11:.+]]=, $pop[[L12]], $pop{{.+}}
-; CHECK-NEXT: tee_local  $push{{.+}}=, [[SP:.+]], $pop[[L11]]
+; CHECK-NEXT: local.tee  $push{{.+}}=, [[SP:.+]], $pop[[L11]]
 
-; CHECK:      get_local  $push[[M6:.+]]=, [[SP]]{{$}}
+; CHECK:      local.get  $push[[M6:.+]]=, [[SP]]{{$}}
 ; CHECK:      i32.add    $push[[L6:.+]]=, $pop[[M6]], $pop{{.+}}
 ; CHECK-NEXT: call       somefunc@FUNCTION, $pop[[L6]]
-; CHECK:      get_local  $push[[M7:.+]]=, [[SP]]{{$}}
+; CHECK:      local.get  $push[[M7:.+]]=, [[SP]]{{$}}
 ; CHECK:      i32.add    $push[[L8:.+]]=, $pop[[M7]], $pop{{.+}}
 ; CHECK-NEXT: call       somefunc@FUNCTION, $pop[[L8]]
 
-; CHECK:      get_local  $push[[L6:.+]]=, [[BP]]{{$}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L6]]
+; CHECK:      local.get  $push[[L6:.+]]=, [[BP]]{{$}}
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L6]]
 define void @over_and_normal_align() {
 entry:
   %over = alloca i32, align 32
   %normal = alloca i32
   call void @somefunc(i32* %over)
   call void @somefunc(i32* %normal)
   ret void
 }
 
 ; CHECK-LABEL: dynamic_overalign:
-; CHECK:      get_global $push[[L18:.+]]=, __stack_pointer@GLOBAL{{$}}
-; CHECK-NEXT: tee_local  $push[[L17:.+]]=, [[SP:.+]], $pop[[L18]]
-; CHECK-NEXT: set_local  [[BP:.+]], $pop[[L17]]
-; CHECK:      tee_local  $push{{.+}}=, [[SP_2:.+]], $pop{{.+}}
+; CHECK:      global.get $push[[L18:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK-NEXT: local.tee  $push[[L17:.+]]=, [[SP:.+]], $pop[[L18]]
+; CHECK-NEXT: local.set  [[BP:.+]], $pop[[L17]]
+; CHECK:      local.tee  $push{{.+}}=, [[SP_2:.+]], $pop{{.+}}
 
-; CHECK:      get_local  $push[[M8:.+]]=, [[SP_2]]{{$}}
+; CHECK:      local.get  $push[[M8:.+]]=, [[SP_2]]{{$}}
 ; CHECK:      call       somefunc@FUNCTION, $pop[[M8]]
 
-; CHECK:      get_local  $push[[M9:.+]]=, [[BP]]{{$}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[M9]]
+; CHECK:      local.get  $push[[M9:.+]]=, [[BP]]{{$}}
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[M9]]
 define void @dynamic_overalign(i32 %num) {
 entry:
   %dynamic = alloca i32, i32 %num, align 32
   call void @somefunc(i32* %dynamic)
   ret void
 }
 
 ; CHECK-LABEL: overalign_and_dynamic:
-; CHECK:      get_global $push[[L21:.+]]=, __stack_pointer@GLOBAL{{$}}
-; CHECK-NEXT: tee_local  $push[[L20:.+]]=, [[BP:.+]], $pop[[L21]]
+; CHECK:      global.get $push[[L21:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK-NEXT: local.tee  $push[[L20:.+]]=, [[BP:.+]], $pop[[L21]]
 ; CHECK:      i32.sub    $push[[L19:.+]]=, $pop[[L20]], $pop{{.+}}
 ; CHECK:      i32.and    $push[[L18:.+]]=, $pop[[L19]], $pop{{.+}}
-; CHECK:      tee_local  $push{{.+}}=, [[FP:.+]], $pop[[L18]]
-; CHECK:      get_local  $push[[M10:.+]]=, [[FP]]{{$}}
+; CHECK:      local.tee  $push{{.+}}=, [[FP:.+]], $pop[[L18]]
+; CHECK:      local.get  $push[[M10:.+]]=, [[FP]]{{$}}
 ; CHECK:      i32.sub    $push[[L16:.+]]=, $pop[[M10]], $pop{{.+}}
-; CHECK-NEXT: tee_local  $push{{.+}}=, [[SP:.+]], $pop[[L16]]
+; CHECK-NEXT: local.tee  $push{{.+}}=, [[SP:.+]], $pop[[L16]]
 
-; CHECK:      get_local  $push[[over:.+]]=, [[FP]]
+; CHECK:      local.get  $push[[over:.+]]=, [[FP]]
 ; CHECK-NEXT: call       somefunc@FUNCTION, $pop[[over]]
-; CHECK:      get_local  $push[[another:.+]]=, [[SP]]
+; CHECK:      local.get  $push[[another:.+]]=, [[SP]]
 ; CHECK-NEXT: call       somefunc@FUNCTION, $pop[[another]]
 
-; CHECK:      get_local  $push[[M11:.+]]=, [[BP]]{{$}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[M11]]
+; CHECK:      local.get  $push[[M11:.+]]=, [[BP]]{{$}}
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[M11]]
 define void @overalign_and_dynamic(i32 %num) {
 entry:
   %over = alloca i32, align 32
   %dynamic = alloca i32, i32 %num
   call void @somefunc(i32* %over)
   call void @somefunc(i32* %dynamic)
   ret void
 }
 
 ; CHECK-LABEL: overalign_static_and_dynamic:
-; CHECK:      get_global $push[[L26:.+]]=, __stack_pointer@GLOBAL{{$}}
-; CHECK-NEXT: tee_local  $push[[L25:.+]]=, [[BP:.+]], $pop[[L26]]
+; CHECK:      global.get $push[[L26:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK-NEXT: local.tee  $push[[L25:.+]]=, [[BP:.+]], $pop[[L26]]
 ; CHECK:      i32.sub    $push[[L24:.+]]=, $pop[[L25]], $pop{{.+}}
 ; CHECK:      i32.and    $push[[L23:.+]]=, $pop[[L24]], $pop{{.+}}
-; CHECK:      tee_local  $push{{.+}}=, [[FP:.+]], $pop[[L23]]
-; CHECK:      get_local  $push[[M12:.+]]=, [[FP]]{{$}}
+; CHECK:      local.tee  $push{{.+}}=, [[FP:.+]], $pop[[L23]]
+; CHECK:      local.get  $push[[M12:.+]]=, [[FP]]{{$}}
 ; CHECK:      i32.sub    $push[[L21:.+]]=, $pop[[M12]], $pop{{.+}}
-; CHECK-NEXT: tee_local  $push{{.+}}=, [[SP:.+]], $pop[[L21]]
+; CHECK-NEXT: local.tee  $push{{.+}}=, [[SP:.+]], $pop[[L21]]
 
-; CHECK:      get_local  $push[[L19:.+]]=, [[FP]]
-; CHECK:      tee_local  $push[[L18:.+]]=, [[FP_2:.+]], $pop[[L19]]
+; CHECK:      local.get  $push[[L19:.+]]=, [[FP]]
+; CHECK:      local.tee  $push[[L18:.+]]=, [[FP_2:.+]], $pop[[L19]]
 ; CHECK:      i32.add    $push[[over:.+]]=, $pop[[L18]], $pop{{.+}}
 ; CHECK-NEXT: call       somefunc@FUNCTION, $pop[[over]]
-; CHECK:      get_local  $push[[M12:.+]]=, [[SP]]
+; CHECK:      local.get  $push[[M12:.+]]=, [[SP]]
 ; CHECK:      call       somefunc@FUNCTION, $pop[[M12]]
-; CHECK:      get_local  $push[[M13:.+]]=, [[FP_2]]
+; CHECK:      local.get  $push[[M13:.+]]=, [[FP_2]]
 ; CHECK:      i32.add    $push[[static:.+]]=, $pop[[M13]], $pop{{.+}}
 ; CHECK-NEXT: call       somefunc@FUNCTION, $pop[[static]]
 
-; CHECK:      get_local  $push[[M14:.+]]=, [[BP]]{{$}}
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[M14]]
+; CHECK:      local.get  $push[[M14:.+]]=, [[BP]]{{$}}
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[M14]]
 define void @overalign_static_and_dynamic(i32 %num) {
 entry:
   %over = alloca i32, align 32
   %dynamic = alloca i32, i32 %num
   %static = alloca i32
   call void @somefunc(i32* %over)
   call void @somefunc(i32* %dynamic)
   call void @somefunc(i32* %static)
   ret void
 }

llvm/trunk/test/CodeGen/WebAssembly/store.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -fast-isel -fast-isel-abort=1 | FileCheck %s
 
 ; Test that basic stores are assembled properly.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: sti32:
 ; CHECK-NEXT: .functype sti32 (i32, i32) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i32.store 0($pop[[L0]]), $pop[[L1]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti32(i32 *%p, i32 %v) {
   store i32 %v, i32* %p
   ret void
 }
 
 ; CHECK-LABEL: sti64:
 ; CHECK-NEXT: .functype sti64 (i32, i64) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: i64.store 0($pop[[L0]]), $pop[[L1]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @sti64(i64 *%p, i64 %v) {
   store i64 %v, i64* %p
   ret void
 }
 
 ; CHECK-LABEL: stf32:
 ; CHECK-NEXT: .functype stf32 (i32, f32) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f32.store 0($pop[[L0]]), $pop[[L1]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf32(float *%p, float %v) {
   store float %v, float* %p
   ret void
 }
 
 ; CHECK-LABEL: stf64:
 ; CHECK-NEXT: .functype stf64 (i32, f64) -> (){{$}}
-; CHECK-NEXT: get_local $push[[L0:[0-9]+]]=, 0{{$}}
-; CHECK-NEXT: get_local $push[[L1:[0-9]+]]=, 1{{$}}
+; CHECK-NEXT: local.get $push[[L0:[0-9]+]]=, 0{{$}}
+; CHECK-NEXT: local.get $push[[L1:[0-9]+]]=, 1{{$}}
 ; CHECK-NEXT: f64.store 0($pop[[L0]]), $pop[[L1]]{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @stf64(double *%p, double %v) {
   store double %v, double* %p
   ret void
 }

llvm/trunk/test/CodeGen/WebAssembly/umulo-128-legalisation-lowering.ll

 ; RUN: llc < %s -mtriple=wasm32 -wasm-keep-registers | FileCheck %s --check-prefixes=WASM32
 ; NOTE: did not compile on wasm64 at the time the test was created!
 
 define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
 ; WASM32-LABEL: muloti_test
-; WASM32: get_global      $push18=, __stack_pointer@GLOBAL
+; WASM32: global.get      $push18=, __stack_pointer@GLOBAL
 ; WASM32: i32.const       $push19=, 48
 ; WASM32: i32.sub         $push40=, $pop18, $pop19
-; WASM32: tee_local       $push39=, 5, $pop40
-; WASM32: set_global      __stack_pointer@GLOBAL, $pop39
-; WASM32: get_local       $push41=, 5
+; WASM32: local.tee       $push39=, 5, $pop40
+; WASM32: global.set      __stack_pointer@GLOBAL, $pop39
+; WASM32: local.get       $push41=, 5
 ; WASM32: i32.const       $push22=, 32
 ; WASM32: i32.add         $push23=, $pop41, $pop22
-; WASM32: get_local       $push43=, 1
+; WASM32: local.get       $push43=, 1
 ; WASM32: i64.const       $push0=, 0
-; WASM32: get_local       $push42=, 3
+; WASM32: local.get       $push42=, 3
 ; WASM32: i64.const       $push38=, 0
 ; WASM32: call            __multi3@FUNCTION, $pop23, $pop43, $pop0, $pop42, $pop38
-; WASM32: get_local       $push44=, 5
+; WASM32: local.get       $push44=, 5
 ; WASM32: i32.const       $push24=, 16
 ; WASM32: i32.add         $push25=, $pop44, $pop24
-; WASM32: get_local       $push46=, 4
+; WASM32: local.get       $push46=, 4
 ; WASM32: i64.const       $push37=, 0
-; WASM32: get_local       $push45=, 1
+; WASM32: local.get       $push45=, 1
 ; WASM32: i64.const       $push36=, 0
 ; WASM32: call            __multi3@FUNCTION, $pop25, $pop46, $pop37, $pop45, $pop36
-; WASM32: get_local       $push49=, 5
-; WASM32: get_local       $push48=, 2
+; WASM32: local.get       $push49=, 5
+; WASM32: local.get       $push48=, 2
 ; WASM32: i64.const       $push35=, 0
-; WASM32: get_local       $push47=, 3
+; WASM32: local.get       $push47=, 3
 ; WASM32: i64.const       $push34=, 0
 ; WASM32: call            __multi3@FUNCTION, $pop49, $pop48, $pop35, $pop47, $pop34
-; WASM32: get_local       $push51=, 0
-; WASM32: get_local       $push50=, 5
+; WASM32: local.get       $push51=, 0
+; WASM32: local.get       $push50=, 5
 ; WASM32: i64.load        $push1=, 32($pop50)
 ; WASM32: i64.store       0($pop51), $pop1
-; WASM32: get_local       $push55=, 0
-; WASM32: get_local       $push52=, 5
+; WASM32: local.get       $push55=, 0
+; WASM32: local.get       $push52=, 5
 ; WASM32: i32.const       $push5=, 40
 ; WASM32: i32.add         $push6=, $pop52, $pop5
 ; WASM32: i64.load        $push33=, 0($pop6)
-; WASM32: tee_local       $push32=, 1, $pop33
-; WASM32: get_local       $push53=, 5
+; WASM32: local.tee       $push32=, 1, $pop33
+; WASM32: local.get       $push53=, 5
 ; WASM32: i64.load        $push3=, 0($pop53)
-; WASM32: get_local       $push54=, 5
+; WASM32: local.get       $push54=, 5
 ; WASM32: i64.load        $push2=, 16($pop54)
 ; WASM32: i64.add         $push4=, $pop3, $pop2
 ; WASM32: i64.add         $push31=, $pop32, $pop4
-; WASM32: tee_local       $push30=, 3, $pop31
+; WASM32: local.tee       $push30=, 3, $pop31
 ; WASM32: i64.store       8($pop55), $pop30
-; WASM32: get_local       $push62=, 0
-; WASM32: get_local       $push56=, 2
+; WASM32: local.get       $push62=, 0
+; WASM32: local.get       $push56=, 2
 ; WASM32: i64.const       $push29=, 0
 ; WASM32: i64.ne          $push8=, $pop56, $pop29
-; WASM32: get_local       $push57=, 4
+; WASM32: local.get       $push57=, 4
 ; WASM32: i64.const       $push28=, 0
 ; WASM32: i64.ne          $push7=, $pop57, $pop28
 ; WASM32: i32.and         $push9=, $pop8, $pop7
-; WASM32: get_local       $push58=, 5
+; WASM32: local.get       $push58=, 5
 ; WASM32: i64.load        $push10=, 8($pop58)
 ; WASM32: i64.const       $push27=, 0
 ; WASM32: i64.ne          $push11=, $pop10, $pop27
 ; WASM32: i32.or          $push12=, $pop9, $pop11
-; WASM32: get_local       $push59=, 5
+; WASM32: local.get       $push59=, 5
 ; WASM32: i64.load        $push13=, 24($pop59)
 ; WASM32: i64.const       $push26=, 0
 ; WASM32: i64.ne          $push14=, $pop13, $pop26
 ; WASM32: i32.or          $push15=, $pop12, $pop14
-; WASM32: get_local       $push61=, 3
-; WASM32: get_local       $push60=, 1
+; WASM32: local.get       $push61=, 3
+; WASM32: local.get       $push60=, 1
 ; WASM32: i64.lt_u        $push16=, $pop61, $pop60
 ; WASM32: i32.or          $push17=, $pop15, $pop16
 ; WASM32: i32.store8      16($pop62), $pop17
-; WASM32: get_local       $push63=, 5
+; WASM32: local.get       $push63=, 5
 ; WASM32: i32.const       $push20=, 48
 ; WASM32: i32.add         $push21=, $pop63, $pop20
-; WASM32: set_global      __stack_pointer@GLOBAL, $pop21
+; WASM32: global.set      __stack_pointer@GLOBAL, $pop21
 
 start:
   %0 = tail call { i128, i1 } @llvm.umul.with.overflow.i128(i128 %l, i128 %r) #2
   %1 = extractvalue { i128, i1 } %0, 0
   %2 = extractvalue { i128, i1 } %0, 1
   %3 = zext i1 %2 to i8
   %4 = insertvalue { i128, i8 } undef, i128 %1, 0
   %5 = insertvalue { i128, i8 } %4, i8 %3, 1

llvm/trunk/test/CodeGen/WebAssembly/userstack.ll

 ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 declare void @ext_func(i64* %ptr)
 declare void @ext_func_i32(i32* %ptr)
 
 ; CHECK-LABEL: alloca32:
 ; Check that there is an extra local for the stack pointer.
 ; CHECK: .local i32{{$}}
 define void @alloca32() noredzone {
- ; CHECK-NEXT: get_global $push[[L2:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK-NEXT: global.get $push[[L2:.+]]=, __stack_pointer@GLOBAL{{$}}
  ; CHECK-NEXT: i32.const $push[[L3:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L9:.+]]=, $pop[[L2]], $pop[[L3]]
- ; CHECK-NEXT: tee_local $push[[L8:.+]]=, [[SP:.+]], $pop[[L9]]{{$}}
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L8]]{{$}}
+ ; CHECK-NEXT: local.tee $push[[L8:.+]]=, [[SP:.+]], $pop[[L9]]{{$}}
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L8]]{{$}}
  %retval = alloca i32
- ; CHECK: get_local $push[[L4:.+]]=, [[SP]]{{$}}
+ ; CHECK: local.get $push[[L4:.+]]=, [[SP]]{{$}}
  ; CHECK: i32.const $push[[L0:.+]]=, 0
  ; CHECK: i32.store 12($pop[[L4]]), $pop[[L0]]
  store i32 0, i32* %retval
- ; CHECK: get_local $push[[L6:.+]]=, [[SP]]{{$}}
+ ; CHECK: local.get $push[[L6:.+]]=, [[SP]]{{$}}
  ; CHECK-NEXT: i32.const $push[[L5:.+]]=, 16
  ; CHECK-NEXT: i32.add $push[[L7:.+]]=, $pop[[L6]], $pop[[L5]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L7]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L7]]
  ret void
 }
 
 ; CHECK-LABEL: alloca3264:
 ; CHECK: .local i32{{$}}
 define void @alloca3264() {
- ; CHECK: get_global $push[[L3:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK: global.get $push[[L3:.+]]=, __stack_pointer@GLOBAL{{$}}
  ; CHECK-NEXT: i32.const $push[[L4:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L6:.+]]=, $pop[[L3]], $pop[[L4]]
- ; CHECK-NEXT: tee_local $push[[L5:.+]]=, [[SP:.+]], $pop[[L6]]
+ ; CHECK-NEXT: local.tee $push[[L5:.+]]=, [[SP:.+]], $pop[[L6]]
  %r1 = alloca i32
  %r2 = alloca double
  store i32 0, i32* %r1
  store double 0.0, double* %r2
  ; CHECK-NEXT: i64.const $push[[L1:.+]]=, 0
  ; CHECK-NEXT: i64.store 0($pop[[L5]]), $pop[[L1]]
- ; CHECK-NEXT: get_local $push[[L2:.+]]=, [[SP]]{{$}}
+ ; CHECK-NEXT: local.get $push[[L2:.+]]=, [[SP]]{{$}}
  ; CHECK-NEXT: i32.const $push[[L0:.+]]=, 0
  ; CHECK-NEXT: i32.store 12($pop[[L2]]), $pop[[L0]]
  ; CHECK-NEXT: return
  ret void
 }
 
 ; CHECK-LABEL: allocarray:
 ; CHECK: .local i32{{$}}
 define void @allocarray() {
- ; CHECK-NEXT: get_global $push[[L4:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK-NEXT: global.get $push[[L4:.+]]=, __stack_pointer@GLOBAL{{$}}
  ; CHECK-NEXT: i32.const $push[[L5:.+]]=, 144{{$}}
  ; CHECK-NEXT: i32.sub $push[[L12:.+]]=, $pop[[L4]], $pop[[L5]]
- ; CHECK-NEXT: tee_local $push[[L11:.+]]=, 0, $pop[[L12]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L11]]
+ ; CHECK-NEXT: local.tee $push[[L11:.+]]=, 0, $pop[[L12]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L11]]
  %r = alloca [33 x i32]
 
  ; CHECK:      i32.const $push{{.+}}=, 24
  ; CHECK-NEXT: i32.add $push[[L3:.+]]=, $pop{{.+}}, $pop{{.+}}
  ; CHECK-NEXT: i32.const $push[[L1:.+]]=, 1{{$}}
  ; CHECK-NEXT: i32.store 0($pop[[L3]]), $pop[[L1]]{{$}}
- ; CHECK-NEXT: get_local $push[[L4:.+]]=, 0{{$}}
+ ; CHECK-NEXT: local.get $push[[L4:.+]]=, 0{{$}}
  ; CHECK-NEXT: i32.const $push[[L10:.+]]=, 1{{$}}
  ; CHECK-NEXT: i32.store 12($pop[[L4]]), $pop[[L10]]{{$}}
  %p = getelementptr [33 x i32], [33 x i32]* %r, i32 0, i32 0
  store i32 1, i32* %p
  %p2 = getelementptr [33 x i32], [33 x i32]* %r, i32 0, i32 3
  store i32 1, i32* %p2
 
- ; CHECK-NEXT: get_local $push[[L2:.+]]=, [[SP]]{{$}}
+ ; CHECK-NEXT: local.get $push[[L2:.+]]=, [[SP]]{{$}}
  ; CHECK-NEXT: i32.const $push[[L7:.+]]=, 144
  ; CHECK-NEXT: i32.add $push[[L8:.+]]=, $pop[[L2]], $pop[[L7]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L8]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L8]]
  ret void
 }
 
 ; CHECK-LABEL: non_mem_use
 define void @non_mem_use(i8** %addr) {
  ; CHECK: i32.const $push[[L2:.+]]=, 48
  ; CHECK-NEXT: i32.sub $push[[L12:.+]]=, {{.+}}, $pop[[L2]]
- ; CHECK-NEXT: tee_local $push[[L11:.+]]=, [[SP:.+]], $pop[[L12]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L11]]
+ ; CHECK-NEXT: local.tee $push[[L11:.+]]=, [[SP:.+]], $pop[[L12]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L11]]
  %buf = alloca [27 x i8], align 16
  %r = alloca i64
  %r2 = alloca i64
  ; %r is at SP+8
- ; CHECK: get_local $push[[L3:.+]]=, [[SP]]
+ ; CHECK: local.get $push[[L3:.+]]=, [[SP]]
  ; CHECK: i32.const $push[[OFF:.+]]=, 8
  ; CHECK-NEXT: i32.add $push[[ARG1:.+]]=, $pop[[L3]], $pop[[OFF]]
  ; CHECK-NEXT: call ext_func@FUNCTION, $pop[[ARG1]]
  call void @ext_func(i64* %r)
  ; %r2 is at SP+0, no add needed
- ; CHECK: get_local $push[[L4:.+]]=, [[SP]]
+ ; CHECK: local.get $push[[L4:.+]]=, [[SP]]
  ; CHECK-NEXT: call ext_func@FUNCTION, $pop[[L4]]
  call void @ext_func(i64* %r2)
  ; Use as a value, but in a store
  ; %buf is at SP+16
- ; CHECK: get_local $push[[L5:.+]]=, [[SP]]
+ ; CHECK: local.get $push[[L5:.+]]=, [[SP]]
  ; CHECK: i32.const $push[[OFF:.+]]=, 16
  ; CHECK-NEXT: i32.add $push[[VAL:.+]]=, $pop[[L5]], $pop[[OFF]]
  ; CHECK-NEXT: i32.store 0($pop{{.+}}), $pop[[VAL]]
  %gep = getelementptr inbounds [27 x i8], [27 x i8]* %buf, i32 0, i32 0
  store i8* %gep, i8** %addr
  ret void
 }
 
 ; CHECK-LABEL: allocarray_inbounds:
 ; CHECK: .local i32{{$}}
 define void @allocarray_inbounds() {
- ; CHECK: get_global $push[[L3:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK: global.get $push[[L3:.+]]=, __stack_pointer@GLOBAL{{$}}
  ; CHECK-NEXT: i32.const $push[[L4:.+]]=, 32{{$}}
  ; CHECK-NEXT: i32.sub $push[[L11:.+]]=, $pop[[L3]], $pop[[L4]]
- ; CHECK-NEXT: tee_local $push[[L10:.+]]=, [[SP:.+]], $pop[[L11]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
+ ; CHECK-NEXT: local.tee $push[[L10:.+]]=, [[SP:.+]], $pop[[L11]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L10]]{{$}}
  %r = alloca [5 x i32]
  ; CHECK: i32.const $push[[L3:.+]]=, 1
  ; CHECK-DAG: i32.store 24(${{.+}}), $pop[[L3]]
  %p = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 0
  store i32 1, i32* %p
  ; This store should have both the GEP and the FI folded into it.
  ; CHECK-DAG: i32.store 12(${{.+}}), $pop
  %p2 = getelementptr inbounds [5 x i32], [5 x i32]* %r, i32 0, i32 3
  store i32 1, i32* %p2
  call void @ext_func(i64* null);
  ; CHECK: call ext_func
  ; CHECK: i32.const $push[[L5:.+]]=, 32{{$}}
  ; CHECK-NEXT: i32.add $push[[L7:.+]]=, ${{.+}}, $pop[[L5]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L7]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L7]]
  ret void
 }
 
 ; CHECK-LABEL: dynamic_alloca:
 define void @dynamic_alloca(i32 %alloc) {
- ; CHECK: get_global $push[[L13:.+]]=, __stack_pointer@GLOBAL{{$}}
- ; CHECK-NEXT: tee_local $push[[L12:.+]]=, [[SP:.+]], $pop[[L13]]{{$}}
+ ; CHECK: global.get $push[[L13:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK-NEXT: local.tee $push[[L12:.+]]=, [[SP:.+]], $pop[[L13]]{{$}}
  ; Target independent codegen bumps the stack pointer.
  ; CHECK: i32.sub
  ; Check that SP is written back to memory after decrement
- ; CHECK: set_global __stack_pointer@GLOBAL,
+ ; CHECK: global.set __stack_pointer@GLOBAL,
  %r = alloca i32, i32 %alloc
  ; Target-independent codegen also calculates the store addr
  ; CHECK: call ext_func_i32@FUNCTION
  call void @ext_func_i32(i32* %r)
- ; CHECK: set_global __stack_pointer@GLOBAL, $pop{{.+}}
+ ; CHECK: global.set __stack_pointer@GLOBAL, $pop{{.+}}
  ret void
 }
 
 ; CHECK-LABEL: dynamic_alloca_redzone:
 define void @dynamic_alloca_redzone(i32 %alloc) {
- ; CHECK: get_global $push[[L13:.+]]=, __stack_pointer@GLOBAL{{$}}
- ; CHECK-NEXT: tee_local $push[[L12:.+]]=, [[SP:.+]], $pop[[L13]]{{$}}
+ ; CHECK: global.get $push[[L13:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK-NEXT: local.tee $push[[L12:.+]]=, [[SP:.+]], $pop[[L13]]{{$}}
  ; Target independent codegen bumps the stack pointer
  ; CHECK: i32.sub
  %r = alloca i32, i32 %alloc
- ; CHECK-NEXT: tee_local       $push[[L8:.+]]=, {{.+}}, $pop
- ; CHECK: get_local $push[[L7:.+]]=, 0{{$}}
+ ; CHECK-NEXT: local.tee       $push[[L8:.+]]=, {{.+}}, $pop
+ ; CHECK: local.get $push[[L7:.+]]=, 0{{$}}
  ; CHECK-NEXT: i32.const       $push[[L6:.+]]=, 0{{$}}
  ; CHECK-NEXT: i32.store       0($pop[[L7]]), $pop[[L6]]{{$}}
  store i32 0, i32* %r
  ; CHECK-NEXT: return
  ret void
 }
 
 ; CHECK-LABEL: dynamic_static_alloca:
 define void @dynamic_static_alloca(i32 %alloc) noredzone {
  ; Decrement SP in the prolog by the static amount and writeback to memory.
- ; CHECK: get_global $push[[L11:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK: global.get $push[[L11:.+]]=, __stack_pointer@GLOBAL{{$}}
  ; CHECK-NEXT: i32.const $push[[L12:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L23:.+]]=, $pop[[L11]], $pop[[L12]]
- ; CHECK-NEXT: tee_local $push[[L22:.+]]=, [[SP:.+]], $pop[[L23]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L22]]
+ ; CHECK-NEXT: local.tee $push[[L22:.+]]=, [[SP:.+]], $pop[[L23]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L22]]
 
  ; Alloc and write to a static alloca
- ; CHECK: get_local $push[[L21:.+]]=, [[SP:.+]]
- ; CHECK-NEXT: tee_local $push[[pushedFP:.+]]=, [[FP:.+]], $pop[[L21]]
+ ; CHECK: local.get $push[[L21:.+]]=, [[SP:.+]]
+ ; CHECK-NEXT: local.tee $push[[pushedFP:.+]]=, [[FP:.+]], $pop[[L21]]
  ; CHECK-NEXT: i32.const $push[[L0:.+]]=, 101
  ; CHECK-NEXT: i32.store [[static_offset:.+]]($pop[[pushedFP]]), $pop[[L0]]
  %static = alloca i32
  store volatile i32 101, i32* %static
 
  ; Decrement SP in the body by the dynamic amount.
  ; CHECK: i32.sub
- ; CHECK: tee_local $push[[L16:.+]]=, [[dynamic_local:.+]], $pop{{.+}}
- ; CHECK: tee_local $push[[L15:.+]]=, [[other:.+]], $pop[[L16]]{{$}}
- ; CHECK: set_global __stack_pointer@GLOBAL, $pop[[L15]]{{$}}
+ ; CHECK: local.tee $push[[L16:.+]]=, [[dynamic_local:.+]], $pop{{.+}}
+ ; CHECK: local.tee $push[[L15:.+]]=, [[other:.+]], $pop[[L16]]{{$}}
+ ; CHECK: global.set __stack_pointer@GLOBAL, $pop[[L15]]{{$}}
  %dynamic = alloca i32, i32 %alloc
 
  ; Ensure we don't modify the frame pointer after assigning it.
  ; CHECK-NOT: $[[FP]]=
 
  ; Ensure the static address doesn't change after modifying the stack pointer.
- ; CHECK: get_local $push[[L17:.+]]=, [[FP]]
+ ; CHECK: local.get $push[[L17:.+]]=, [[FP]]
  ; CHECK: i32.const $push[[L7:.+]]=, 102
  ; CHECK-NEXT: i32.store [[static_offset]]($pop[[L17]]), $pop[[L7]]
- ; CHECK-NEXT: get_local $push[[L9:.+]]=, [[dynamic_local]]{{$}}
+ ; CHECK-NEXT: local.get $push[[L9:.+]]=, [[dynamic_local]]{{$}}
  ; CHECK-NEXT: i32.const $push[[L8:.+]]=, 103
  ; CHECK-NEXT: i32.store 0($pop[[L9]]), $pop[[L8]]
  store volatile i32 102, i32* %static
  store volatile i32 103, i32* %dynamic
 
  ; Decrement SP in the body by the dynamic amount.
  ; CHECK: i32.sub
- ; CHECK: tee_local $push{{.+}}=, [[dynamic2_local:.+]], $pop{{.+}}
+ ; CHECK: local.tee $push{{.+}}=, [[dynamic2_local:.+]], $pop{{.+}}
  %dynamic.2 = alloca i32, i32 %alloc
 
  ; CHECK-NOT: $[[FP]]=
 
  ; Ensure neither the static nor dynamic address changes after the second
  ; modification of the stack pointer.
- ; CHECK: get_local $push[[L22:.+]]=, [[FP]]
+ ; CHECK: local.get $push[[L22:.+]]=, [[FP]]
  ; CHECK: i32.const $push[[L9:.+]]=, 104
  ; CHECK-NEXT: i32.store [[static_offset]]($pop[[L22]]), $pop[[L9]]
- ; CHECK-NEXT: get_local $push[[L23:.+]]=, [[dynamic_local]]
+ ; CHECK-NEXT: local.get $push[[L23:.+]]=, [[dynamic_local]]
  ; CHECK-NEXT: i32.const $push[[L10:.+]]=, 105
  ; CHECK-NEXT: i32.store 0($pop[[L23]]), $pop[[L10]]
- ; CHECK-NEXT: get_local $push[[L23:.+]]=, [[dynamic2_local]]
+ ; CHECK-NEXT: local.get $push[[L23:.+]]=, [[dynamic2_local]]
  ; CHECK-NEXT: i32.const $push[[L11:.+]]=, 106
  ; CHECK-NEXT: i32.store 0($pop[[L23]]), $pop[[L11]]
  store volatile i32 104, i32* %static
  store volatile i32 105, i32* %dynamic
  store volatile i32 106, i32* %dynamic.2
 
  ; Writeback to memory.
- ; CHECK: get_local $push[[L24:.+]]=, [[FP]]{{$}}
+ ; CHECK: local.get $push[[L24:.+]]=, [[FP]]{{$}}
  ; CHECK: i32.const $push[[L18:.+]]=, 16
  ; CHECK-NEXT: i32.add $push[[L19:.+]]=, $pop[[L24]], $pop[[L18]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L19]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L19]]
  ret void
 }
 
 declare i8* @llvm.stacksave()
 declare void @llvm.stackrestore(i8*)
 
 ; CHECK-LABEL: llvm_stack_builtins:
 define void @llvm_stack_builtins(i32 %alloc) noredzone {
- ; CHECK: get_global $push[[L11:.+]]=, __stack_pointer@GLOBAL{{$}}
- ; CHECK-NEXT: tee_local $push[[L10:.+]]=, {{.+}}, $pop[[L11]]
- ; CHECK-NEXT: set_local [[STACK:.+]], $pop[[L10]]
+ ; CHECK: global.get $push[[L11:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK-NEXT: local.tee $push[[L10:.+]]=, {{.+}}, $pop[[L11]]
+ ; CHECK-NEXT: local.set [[STACK:.+]], $pop[[L10]]
  %stack = call i8* @llvm.stacksave()
 
  ; Ensure we don't reassign the stacksave local
- ; CHECK-NOT: set_local [[STACK]],
+ ; CHECK-NOT: local.set [[STACK]],
  %dynamic = alloca i32, i32 %alloc
 
- ; CHECK: get_local $push[[L12:.+]]=, [[STACK]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L12]]
+ ; CHECK: local.get $push[[L12:.+]]=, [[STACK]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L12]]
  call void @llvm.stackrestore(i8* %stack)
 
  ret void
 }
 
 ; Not actually using the alloca'd variables exposed an issue with register
 ; stackification, where copying the stack pointer into the frame pointer was
 ; moved after the stack pointer was updated for the dynamic alloca.
 ; CHECK-LABEL: dynamic_alloca_nouse:
 define void @dynamic_alloca_nouse(i32 %alloc) noredzone {
- ; CHECK: get_global $push[[L11:.+]]=, __stack_pointer@GLOBAL{{$}}
- ; CHECK-NEXT: tee_local $push[[L10:.+]]=, {{.+}}, $pop[[L11]]
- ; CHECK-NEXT: set_local [[FP:.+]], $pop[[L10]]
+ ; CHECK: global.get $push[[L11:.+]]=, __stack_pointer@GLOBAL{{$}}
+ ; CHECK-NEXT: local.tee $push[[L10:.+]]=, {{.+}}, $pop[[L11]]
+ ; CHECK-NEXT: local.set [[FP:.+]], $pop[[L10]]
  %dynamic = alloca i32, i32 %alloc
 
- ; CHECK-NOT: set_local [[FP]],
+ ; CHECK-NOT: local.set [[FP]],
 
- ; CHECK: get_local $push[[L12:.+]]=, [[FP]]
- ; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L12]]
+ ; CHECK: local.get $push[[L12:.+]]=, [[FP]]
+ ; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L12]]
  ret void
 }
 
 ; The use of the alloca in a phi causes a CopyToReg DAG node to be generated,
 ; which has to have special handling because CopyToReg can't have a FI operand
 ; CHECK-LABEL: copytoreg_fi:
 define void @copytoreg_fi(i1 %cond, i32* %b) {
 entry:
  ; CHECK: i32.const $push[[L1:.+]]=, 16
  ; CHECK-NEXT: i32.sub $push[[L3:.+]]=, {{.+}}, $pop[[L1]]
  %addr = alloca i32
  ; CHECK: i32.const $push[[OFF:.+]]=, 12
  ; CHECK-NEXT: i32.add $push[[ADDR:.+]]=, $pop[[L3]], $pop[[OFF]]
- ; CHECK-NEXT: set_local [[COPY:.+]], $pop[[ADDR]]
+ ; CHECK-NEXT: local.set [[COPY:.+]], $pop[[ADDR]]
  br label %body
 body:
  %a = phi i32* [%addr, %entry], [%b, %body]
  store i32 1, i32* %a
- ; CHECK: get_local $push[[L12:.+]]=, [[COPY]]
+ ; CHECK: local.get $push[[L12:.+]]=, [[COPY]]
  ; CHECK: i32.store 0($pop[[L12]]),
  br i1 %cond, label %body, label %exit
 exit:
  ret void
 }
 
 declare void @use_i8_star(i8*)
 declare i8* @llvm.frameaddress(i32)
 
 ; Test __builtin_frame_address(0).
 ; CHECK-LABEL: frameaddress_0:
-; CHECK: get_global $push[[L3:.+]]=, __stack_pointer@GLOBAL{{$}}
-; CHECK-NEXT: tee_local $push[[L2:.+]]=, [[FP:.+]], $pop[[L3]]{{$}}
+; CHECK: global.get $push[[L3:.+]]=, __stack_pointer@GLOBAL{{$}}
+; CHECK-NEXT: local.tee $push[[L2:.+]]=, [[FP:.+]], $pop[[L3]]{{$}}
 ; CHECK-NEXT: call use_i8_star@FUNCTION, $pop[[L2]]
-; CHECK-NEXT: get_local $push[[L5:.+]]=, [[FP]]
-; CHECK-NEXT: set_global __stack_pointer@GLOBAL, $pop[[L5]]
+; CHECK-NEXT: local.get $push[[L5:.+]]=, [[FP]]
+; CHECK-NEXT: global.set __stack_pointer@GLOBAL, $pop[[L5]]
 define void @frameaddress_0() {
   %t = call i8* @llvm.frameaddress(i32 0)
   call void @use_i8_star(i8* %t)
   ret void
 }
 
 ; Test __builtin_frame_address(1).
 
 ; CHECK-LABEL: frameaddress_1:
 ; CHECK:      i32.const $push0=, 0{{$}}
 ; CHECK-NEXT: call use_i8_star@FUNCTION, $pop0{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @frameaddress_1() {
   %t = call i8* @llvm.frameaddress(i32 1)
   call void @use_i8_star(i8* %t)
   ret void
 }
 
 ; Test a stack address passed to an inline asm.
 ; CHECK-LABEL: inline_asm:
-; CHECK:       get_global {{.+}}, __stack_pointer@GLOBAL{{$}}
+; CHECK:       global.get {{.+}}, __stack_pointer@GLOBAL{{$}}
 ; CHECK:       #APP
 ; CHECK-NEXT:  # %{{[0-9]+}}{{$}}
 ; CHECK-NEXT:  #NO_APP
 define void @inline_asm() {
   %tmp = alloca i8
   call void asm sideeffect "# %0", "r"(i8* %tmp)
   ret void
 }
 
 ; CHECK: .globaltype  __stack_pointer, i32{{$}}
 
 ; TODO: test over-aligned alloca

llvm/trunk/test/CodeGen/WebAssembly/varargs.ll

entry:
   ret void
 }
 
 ; Test va_arg with an i8 argument.
 
 ; CHECK-LABEL: arg_i8:
 ; CHECK-NEXT: .functype arg_i8 (i32) -> (i32){{$}}
 ; CHECK-NEXT: i32.load   $push[[NUM0:[0-9]+]]=, 0($0){{$}}
-; CHECK-NEXT: tee_local  $push[[NUM1:[0-9]+]]=, $1=, $pop[[NUM0]]{{$}}
+; CHECK-NEXT: local.tee  $push[[NUM1:[0-9]+]]=, $1=, $pop[[NUM0]]{{$}}
 ; CHECK-NEXT: i32.const  $push[[NUM2:[0-9]+]]=, 4{{$}}
 ; CHECK-NEXT: i32.add    $push[[NUM3:[0-9]+]]=, $pop[[NUM1]], $pop[[NUM2]]{{$}}
 ; CHECK-NEXT: i32.store  0($0), $pop[[NUM3]]{{$}}
 ; CHECK-NEXT: i32.load   $push[[NUM4:[0-9]+]]=, 0($1){{$}}
 ; CHECK-NEXT: return     $pop[[NUM4]]{{$}}
 define i8 @arg_i8(i8** %ap) {
 entry:
   %t = va_arg i8** %ap, i8
   ret i8 %t
 }
 
 ; Test va_arg with an i32 argument.
 
 ; CHECK-LABEL: arg_i32:
 ; CHECK-NEXT: .functype arg_i32 (i32) -> (i32){{$}}
 ; CHECK-NEXT: i32.load   $push[[NUM0:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: i32.const  $push[[NUM1:[0-9]+]]=, 3{{$}}
 ; CHECK-NEXT: i32.add    $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
 ; CHECK-NEXT: i32.const  $push[[NUM3:[0-9]+]]=, -4{{$}}
 ; CHECK-NEXT: i32.and    $push[[NUM4:[0-9]+]]=, $pop[[NUM2]], $pop[[NUM3]]{{$}}
-; CHECK-NEXT: tee_local  $push[[NUM5:[0-9]+]]=, $1=, $pop[[NUM4]]{{$}}
+; CHECK-NEXT: local.tee  $push[[NUM5:[0-9]+]]=, $1=, $pop[[NUM4]]{{$}}
 ; CHECK-NEXT: i32.const  $push[[NUM6:[0-9]+]]=, 4{{$}}
 ; CHECK-NEXT: i32.add    $push[[NUM7:[0-9]+]]=, $pop[[NUM5]], $pop[[NUM6]]{{$}}
 ; CHECK-NEXT: i32.store  0($0), $pop[[NUM7]]{{$}}
 ; CHECK-NEXT: i32.load   $push[[NUM8:[0-9]+]]=, 0($1){{$}}
 ; CHECK-NEXT: return     $pop[[NUM8]]{{$}}
 define i32 @arg_i32(i8** %ap) {
 entry:
   %t = va_arg i8** %ap, i32

llvm/trunk/test/MC/Disassembler/WebAssembly/wasm.txt

 # CHECK: block f64
 0x02 0x7C
 
 # CHECK: call_indirect
 # $0=, 128, 0
 # FIXME: WebAssemblyInstPrinter does not print immediates.
 0x11 0x80 0x01 0x00
 
-# CHECK: get_local 128
+# CHECK: local.get 128
 0x20 0x80 0x01
 
 # Prefix byte example:
-# CHECK: i64.trunc_u:sat/f64
+# CHECK: i64.trunc_sat_f64_u
 0xFC 0x07
 
 # v128.const is arbitrarily disassembled as v16i8
 # CHECK: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
 0xFD 0x02 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
 
 # CHECK: v8x16.shuffle 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
 0xFD 0x03 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F

llvm/trunk/test/MC/WebAssembly/assembler-binary.ll

 ; CHECK-NEXT:         Field:           __linear_memory
 ; CHECK-NEXT:         Kind:            MEMORY
 ; CHECK-NEXT:         Memory:
 ; CHECK-NEXT:           Initial:         0x00000000
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           __indirect_function_table
 ; CHECK-NEXT:         Kind:            TABLE
 ; CHECK-NEXT:         Table:
-; CHECK-NEXT:           ElemType:        ANYFUNC
+; CHECK-NEXT:           ElemType:        FUNCREF
 ; CHECK-NEXT:           Limits:
 ; CHECK-NEXT:             Initial:         0x00000000
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           bar
 ; CHECK-NEXT:         Kind:            FUNCTION
 ; CHECK-NEXT:         SigIndex:        1
 ; CHECK-NEXT:   - Type:            FUNCTION
 ; CHECK-NEXT:     FunctionTypes:   [ 0 ]

llvm/trunk/test/MC/WebAssembly/basic-assembly.s

 # RUN: llvm-mc -triple=wasm32-unknown-unknown -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s | FileCheck %s
 # this one is just here to see if it converts to .o without errors, but doesn't check any output:
 # RUN: llvm-mc -triple=wasm32-unknown-unknown -filetype=obj -mattr=+simd128,+nontrapping-fptoint,+exception-handling < %s
 
     .text
     .section .text.main,"",@
     .type    test0,@function
 test0:
     # Test all types:
     .functype   test0 (i32, i64) -> (i32)
     .eventtype  __cpp_exception i32
     .local      f32, f64, v128, v128
     # Explicit getlocal/setlocal:
-    get_local   2
-    set_local   2
+    local.get   2
+    local.set   2
     # Immediates:
     i32.const   -1
     f64.const   0x1.999999999999ap1
     v128.const  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
     v128.const  0, 1, 2, 3, 4, 5, 6, 7
     # Indirect addressing:
-    get_local   0
+    local.get   0
     f64.store   0
     # Loops, conditionals, binary ops, calls etc:
     block       i32
     i32.const   1
-    get_local   0
+    local.get   0
     i32.ge_s
     br_if       0        # 0: down to label0
 .LBB0_1:
     loop        i32      # label1:
     call        something1@FUNCTION
     i64.const   1234
     i32.call    something2@FUNCTION
     i32.const   0
     call_indirect 0
     i32.const   1
     i32.add
-    tee_local   0
-    get_local   0
+    local.tee   0
+    local.get   0
     i32.lt_s
     br_if       0        # 0: up to label1
 .LBB0_2:
     end_loop
     end_block            # label0:
-    get_local   4
-    get_local   5
+    local.get   4
+    local.get   5
     block       void
     block       i64
     block       f32
     block       f64
     br_table {0, 1, 2}   # 2 entries, default
     end_block            # first entry jumps here.
     i32.const   1
     br 2
     end_block            # second entry jumps here.
     i32.const   2
     br 1
     end_block            # default jumps here.
     i32.const   3
     end_block            # "switch" exit.
     if          # void
     if          i32
     end_if
     else
     end_if
     f32x4.add
     # Test correct parsing of instructions with / and : in them:
     # TODO: enable once instruction has been added.
-    #i32x4.trunc_s/f32x4:sat
-    i32.trunc_s/f32
+    #i32x4.trunc_sat_f32x4_s
+    i32.trunc_f32_s
     try         except_ref
 .LBB0_3:
     i32.catch   0
 .LBB0_4:
     catch_all
 .LBB0_5:
     end_try
-    #i32.trunc_s:sat/f32
-    get_global  __stack_pointer@GLOBAL
+    #i32.trunc_sat_f32_s
+    global.get  __stack_pointer@GLOBAL
     end_function
 .Lfunc_end0:
     .size test0, .Lfunc_end0-test0
     .globaltype __stack_pointer, i32
 
 # CHECK:           .text
 # CHECK-LABEL: test0:
 # CHECK-NEXT:      .functype test0 (i32, i64) -> (i32)
 # CHECK-NEXT:      .eventtype  __cpp_exception i32
 # CHECK-NEXT:      .local      f32, f64
-# CHECK-NEXT:      get_local   2
-# CHECK-NEXT:      set_local   2
+# CHECK-NEXT:      local.get   2
+# CHECK-NEXT:      local.set   2
 # CHECK-NEXT:      i32.const   -1
 # CHECK-NEXT:      f64.const   0x1.999999999999ap1
 # CHECK-NEXT:      v128.const  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
 # CHECK-NEXT:      v128.const  0, 1, 2, 3, 4, 5, 6, 7
-# CHECK-NEXT:      get_local   0
+# CHECK-NEXT:      local.get   0
 # CHECK-NEXT:      f64.store   0:p2align=0
 # CHECK-NEXT:      block       i32
 # CHECK-NEXT:      i32.const   1
-# CHECK-NEXT:      get_local   0
+# CHECK-NEXT:      local.get   0
 # CHECK-NEXT:      i32.ge_s
 # CHECK-NEXT:      br_if 0            # 0: down to label0
 # CHECK-NEXT:  .LBB0_1:
 # CHECK-NEXT:      loop        i32         # label1:
 # CHECK-NEXT:      call        something1@FUNCTION
 # CHECK-NEXT:      i64.const   1234
 # CHECK-NEXT:      i32.call    something2@FUNCTION
 # CHECK-NEXT:      i32.const   0
 # CHECK-NEXT:      call_indirect 0
 # CHECK-NEXT:      i32.const   1
 # CHECK-NEXT:      i32.add
-# CHECK-NEXT:      tee_local   0
-# CHECK-NEXT:      get_local   0
+# CHECK-NEXT:      local.tee   0
+# CHECK-NEXT:      local.get   0
 # CHECK-NEXT:      i32.lt_s
 # CHECK-NEXT:      br_if 0            # 0: up to label1
 # CHECK-NEXT:  .LBB0_2:
 # CHECK-NEXT:      end_loop
 # CHECK-NEXT:      end_block                       # label0:
-# CHECK-NEXT:      get_local   4
-# CHECK-NEXT:      get_local   5
+# CHECK-NEXT:      local.get   4
+# CHECK-NEXT:      local.get   5
 # CHECK-NEXT:      block
 # CHECK-NEXT:      block       i64
 # CHECK-NEXT:      block       f32
 # CHECK-NEXT:      block       f64
 # CHECK-NEXT:      br_table {0, 1, 2}  # 1: down to label4
 # CHECK-NEXT:                          # 2: down to label3
 # CHECK-NEXT:      end_block           # label5:
 # CHECK-NEXT:      i32.const 1
 # CHECK-NEXT:      br 2                # 2: down to label2
 # CHECK-NEXT:      end_block           # label4:
 # CHECK-NEXT:      i32.const 2
 # CHECK-NEXT:      br 1                # 1: down to label2
 # CHECK-NEXT:      end_block           # label3:
 # CHECK-NEXT:      i32.const 3
 # CHECK-NEXT:      end_block           # label2:
 # CHECK-NEXT:      if
 # CHECK-NEXT:      if          i32
 # CHECK-NEXT:      end_if
 # CHECK-NEXT:      else
 # CHECK-NEXT:      end_if
 # CHECK-NEXT:      f32x4.add
-# CHECK-NEXT:      i32.trunc_s/f32
+# CHECK-NEXT:      i32.trunc_f32_s
 # CHECK-NEXT:      try         except_ref
 # CHECK-NEXT:  .LBB0_3:
 # CHECK-NEXT:      i32.catch   0
 # CHECK-NEXT:  .LBB0_4:
 # CHECK-NEXT:      catch_all
 # CHECK-NEXT:  .LBB0_5:
 # CHECK-NEXT:      end_try
-# CHECK-NEXT:      get_global  __stack_pointer@GLOBAL
+# CHECK-NEXT:      global.get  __stack_pointer@GLOBAL
 # CHECK-NEXT:      end_function
 
 # CHECK:           .globaltype  __stack_pointer, i32

llvm/trunk/test/MC/WebAssembly/comdat.ll

 ; CHECK-NEXT:         Field:           __linear_memory
 ; CHECK-NEXT:         Kind:            MEMORY
 ; CHECK-NEXT:         Memory:          
 ; CHECK-NEXT:           Initial:         0x00000001
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           __indirect_function_table
 ; CHECK-NEXT:         Kind:            TABLE
 ; CHECK-NEXT:         Table:           
-; CHECK-NEXT:           ElemType:        ANYFUNC
+; CHECK-NEXT:           ElemType:        FUNCREF
 ; CHECK-NEXT:           Limits:          
 ; CHECK-NEXT:             Initial:         0x00000000
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           funcImport
 ; CHECK-NEXT:         Kind:            FUNCTION
 ; CHECK-NEXT:         SigIndex:        0
 ; CHECK-NEXT:   - Type:            FUNCTION
 ; CHECK-NEXT:     FunctionTypes:   [ 0, 0, 0 ]

llvm/trunk/test/MC/WebAssembly/global-ctor-dtor.ll

 ; CHECK-NEXT:         Field:           __linear_memory
 ; CHECK-NEXT:         Kind:            MEMORY
 ; CHECK-NEXT:         Memory:          
 ; CHECK-NEXT:           Initial:         0x00000001
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           __indirect_function_table
 ; CHECK-NEXT:         Kind:            TABLE
 ; CHECK-NEXT:         Table:           
-; CHECK-NEXT:           ElemType:        ANYFUNC
+; CHECK-NEXT:           ElemType:        FUNCREF
 ; CHECK-NEXT:           Limits:          
 ; CHECK-NEXT:             Initial:         0x00000002
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           func3
 ; CHECK-NEXT:         Kind:            FUNCTION
 ; CHECK-NEXT:         SigIndex:        1
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           __cxa_atexit

llvm/trunk/test/MC/WebAssembly/simd-encodings.s

main:
     f64x2.div
 
     # CHECK: f64x2.min # encoding: [0xfd,0xa9,0x01]
     f64x2.min
 
     # CHECK: f64x2.max # encoding: [0xfd,0xaa,0x01]
     f64x2.max
 
-    # CHECK: i32x4.trunc_sat_s/f32x4 # encoding: [0xfd,0xab,0x01]
-    i32x4.trunc_sat_s/f32x4
+    # CHECK: i32x4.trunc_sat_f32x4_s # encoding: [0xfd,0xab,0x01]
+    i32x4.trunc_sat_f32x4_s
 
-    # CHECK: i32x4.trunc_sat_u/f32x4 # encoding: [0xfd,0xac,0x01]
-    i32x4.trunc_sat_u/f32x4
+    # CHECK: i32x4.trunc_sat_f32x4_u # encoding: [0xfd,0xac,0x01]
+    i32x4.trunc_sat_f32x4_u
 
-    # CHECK: i64x2.trunc_sat_s/f64x2 # encoding: [0xfd,0xad,0x01]
-    i64x2.trunc_sat_s/f64x2
+    # CHECK: i64x2.trunc_sat_f64x2_s # encoding: [0xfd,0xad,0x01]
+    i64x2.trunc_sat_f64x2_s
 
-    # CHECK: i64x2.trunc_sat_u/f64x2 # encoding: [0xfd,0xae,0x01]
-    i64x2.trunc_sat_u/f64x2
+    # CHECK: i64x2.trunc_sat_f64x2_u # encoding: [0xfd,0xae,0x01]
+    i64x2.trunc_sat_f64x2_u
 
-    # CHECK: f32x4.convert_s/i32x4 # encoding: [0xfd,0xaf,0x01]
-    f32x4.convert_s/i32x4
+    # CHECK: f32x4.convert_i32x4_s # encoding: [0xfd,0xaf,0x01]
+    f32x4.convert_i32x4_s
 
-    # CHECK: f32x4.convert_u/i32x4 # encoding: [0xfd,0xb0,0x01]
-    f32x4.convert_u/i32x4
+    # CHECK: f32x4.convert_i32x4_u # encoding: [0xfd,0xb0,0x01]
+    f32x4.convert_i32x4_u
 
-    # CHECK: f64x2.convert_s/i64x2 # encoding: [0xfd,0xb1,0x01]
-    f64x2.convert_s/i64x2
+    # CHECK: f64x2.convert_i64x2_s # encoding: [0xfd,0xb1,0x01]
+    f64x2.convert_i64x2_s
 
-    # CHECK: f64x2.convert_u/i64x2 # encoding: [0xfd,0xb2,0x01]
-    f64x2.convert_u/i64x2
+    # CHECK: f64x2.convert_i64x2_u # encoding: [0xfd,0xb2,0x01]
+    f64x2.convert_i64x2_u
 
     end_function

llvm/trunk/test/MC/WebAssembly/weak-alias.ll

 ; CHECK-NEXT:         Field:           __linear_memory
 ; CHECK-NEXT:         Kind:            MEMORY
 ; CHECK-NEXT:         Memory:
 ; CHECK-NEXT:           Initial:         0x00000001
 ; CHECK-NEXT:       - Module:          env
 ; CHECK-NEXT:         Field:           __indirect_function_table
 ; CHECK-NEXT:         Kind:            TABLE
 ; CHECK-NEXT:         Table:
-; CHECK-NEXT:           ElemType:        ANYFUNC
+; CHECK-NEXT:           ElemType:        FUNCREF
 ; CHECK-NEXT:           Limits:
 ; CHECK-NEXT:             Initial:         0x00000001
 ; CHECK-NEXT:   - Type:            FUNCTION
 ; CHECK-NEXT:     FunctionTypes:   [ 0, 0, 0, 0, 0 ]
 ; CHECK-NEXT:   - Type:            ELEM
 ; CHECK-NEXT:     Segments:
 ; CHECK-NEXT:       - Offset:
 ; CHECK-NEXT:           Opcode:          I32_CONST

llvm/trunk/test/ObjectYAML/wasm/elem_section.yaml

 # RUN: yaml2obj %s | obj2yaml | FileCheck %s
 --- !WASM
 FileHeader:
   Version:         0x00000001
 Sections:
   - Type:            TABLE
     Tables:         
-      - ElemType:          ANYFUNC
+      - ElemType:          FUNCREF
         Limits:
           Flags:           [ HAS_MAX ]
           Initial:         0x00000010
           Maximum:         0x00000011
   - Type:            ELEM
     Segments:
       - Offset:
           Opcode:        I32_CONST
           Value:         3
         Functions:
           - 1
       - Offset:
-          Opcode:        GET_GLOBAL
+          Opcode:        GLOBAL_GET
           Index:         1
         Functions:
           - 4
 ...
 # CHECK: --- !WASM
 # CHECK: FileHeader:
 # CHECK:   Version:           0x00000001
 # CHECK: Sections:
 # CHECK:   - Type:            ELEM
 # CHECK:     Segments:
 # CHECK:       - Offset:
 # CHECK:           Opcode:           I32_CONST
 # CHECK:           Value:            3
 # CHECK:         Functions: [ 1 ]
 # CHECK:       - Offset:
-# CHECK:           Opcode:           GET_GLOBAL
+# CHECK:           Opcode:           GLOBAL_GET
 # CHECK:           Index:            1
 # CHECK:         Functions: [ 4 ]
 # CHECK: ...

llvm/trunk/test/ObjectYAML/wasm/import_section.yaml

Imports:
         Memory:
           Flags:           [ HAS_MAX ]
           Initial:         0x00000010
           Maximum:         0x00000011
       - Module:          foo
         Field:           imported_table
         Kind:            TABLE
         Table:
-          ElemType:      ANYFUNC
+          ElemType:      FUNCREF
           Limits:
             Flags:           [ HAS_MAX ]
             Initial:         0x00000020
             Maximum:         0x00000022
 ...
 # CHECK: --- !WASM
 # CHECK: FileHeader:
 # CHECK:   Version:           0x00000001

 # CHECK:         Memory:
 # CHECK:           Flags:           [ HAS_MAX ]
 # CHECK:           Initial:         0x00000010
 # CHECK:           Maximum:         0x00000011
 # CHECK:       - Module:          foo
 # CHECK:         Field:           imported_table
 # CHECK:         Kind:            TABLE
 # CHECK:         Table:
-# CHECK:           ElemType:      ANYFUNC
+# CHECK:           ElemType:      FUNCREF
 # CHECK:           Limits:
 # CHECK:             Flags:           [ HAS_MAX ]
 # CHECK:             Initial:         0x00000020
 # CHECK:             Maximum:         0x00000022
 # CHECK: ...

llvm/trunk/test/ObjectYAML/wasm/table_section.yaml

 # RUN: yaml2obj %s | obj2yaml | FileCheck %s
 --- !WASM
 FileHeader:
   Version:         0x00000001
 Sections:
   - Type:            TABLE
     Tables:         
-      - ElemType:        ANYFUNC
+      - ElemType:        FUNCREF
         Limits:
           Flags:           [ HAS_MAX ]
           Initial:         0x00000010
           Maximum:         0x00000011
 ...
 # CHECK: --- !WASM
 # CHECK: FileHeader:
 # CHECK:   Version:           0x00000001
 # CHECK: Sections:
 # CHECK:  - Type:            TABLE
 # CHECK:    Tables:         
-# CHECK:      - ElemType:        ANYFUNC
+# CHECK:      - ElemType:        FUNCREF
 # CHECK:        Limits:
 # CHECK:          Flags:           [ HAS_MAX ]
 # CHECK:          Initial:         0x00000010
 # CHECK:          Maximum:         0x00000011
 # CHECK: ...

llvm/trunk/tools/yaml2obj/yaml2wasm.cpp

case wasm::WASM_OPCODE_I64_CONST:
     encodeSLEB128(InitExpr.Value.Int64, OS);
     break;
   case wasm::WASM_OPCODE_F32_CONST:
     writeUint32(OS, InitExpr.Value.Float32);
     break;
   case wasm::WASM_OPCODE_F64_CONST:
     writeUint64(OS, InitExpr.Value.Float64);
     break;
-  case wasm::WASM_OPCODE_GET_GLOBAL:
+  case wasm::WASM_OPCODE_GLOBAL_GET:
     encodeULEB128(InitExpr.Value.Global, OS);
     break;
   default:
     errs() << "Unknown opcode in init_expr: " << InitExpr.Opcode << "\n";
     return 1;
   }
   writeUint8(OS, wasm::WASM_OPCODE_END);
   return 0;