[GlobalISel] Fix choice of instruction selector for AArch64 at -O0 with -global-isel=0

[petpav01]

Summary

Commit rL347861 introduced an unintentional change in the behaviour when compiling for AArch64 at -O0 with -global-isel=0. Previously, explicitly disabling GlobalISel resulted in using FastISel but an updated condition in the commit changed it to using SelectionDAG. The patch fixes this condition and slightly better organizes the code that chooses the instruction selector.

Fixes PR40131.

Note that a fix without any cleanup would look as follows:

diff --git a/lib/CodeGen/TargetPassConfig.cpp b/lib/CodeGen/TargetPassConfig.cpp
index defb165fe0f..7a1747a6ad8 100644
--- a/lib/CodeGen/TargetPassConfig.cpp
+++ b/lib/CodeGen/TargetPassConfig.cpp
@@ -757,7 +757,8 @@ bool TargetPassConfig::addCoreISelPasses() {
   TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE);
   if (EnableFastISelOption == cl::BOU_TRUE ||
       (TM->getOptLevel() == CodeGenOpt::None && TM->getO0WantsFastISel() &&
-       !TM->Options.EnableGlobalISel)) {
+       (EnableGlobalISelOption == cl::BOU_FALSE ||
+        !TM->Options.EnableGlobalISel))) {
     TM->setFastISel(true);
     TM->setGlobalISel(false);
   }

[Hahnfeld]

I don't know anything about GlobalISel implementation. The patch seems to do the right thing, but I'll defer to somebody who knows the code.

[greened]

This also looks fine to me but I'm in the same boat as Jonas when it comes to (non-)knowledge of GlobalISel.

[aemerson]

Thanks for the cleanup. LGTM with minor naming change.

lib/CodeGen/TargetPassConfig.cpp

760 ↗

(On Diff #180039)

Minor nit: can we maybe rename Selector->SelectorType and then properly capitalize the 'selector' variable.

[petpav01]

Thank you for the review. I will commit the patch with the suggested change shortly.

llvm/trunk/lib/CodeGen/TargetPassConfig.cpp

void TargetPassConfig::addISelPrepare() {
   // to ensure that the IR is valid.
   if (!DisableVerify)
     addPass(createVerifierPass());
 }
 
 bool TargetPassConfig::addCoreISelPasses() {
   // Enable FastISel with -fast-isel, but allow that to be overridden.
   TM->setO0WantsFastISel(EnableFastISelOption != cl::BOU_FALSE);
-  if (EnableFastISelOption == cl::BOU_TRUE ||
-      (TM->getOptLevel() == CodeGenOpt::None && TM->getO0WantsFastISel() &&
-       !TM->Options.EnableGlobalISel)) {
+
+  // Determine an instruction selector.
+  enum class SelectorType { SelectionDAG, FastISel, GlobalISel };
+  SelectorType Selector;
+
+  if (EnableFastISelOption == cl::BOU_TRUE)
+    Selector = SelectorType::FastISel;
+  else if (EnableGlobalISelOption == cl::BOU_TRUE ||
+           (TM->Options.EnableGlobalISel &&
+            EnableGlobalISelOption != cl::BOU_FALSE))
+    Selector = SelectorType::GlobalISel;
+  else if (TM->getOptLevel() == CodeGenOpt::None && TM->getO0WantsFastISel())
+    Selector = SelectorType::FastISel;
+  else
+    Selector = SelectorType::SelectionDAG;
+
+  // Set consistently TM->Options.EnableFastISel and EnableGlobalISel.
+  if (Selector == SelectorType::FastISel) {
     TM->setFastISel(true);
     TM->setGlobalISel(false);
-  }
-
-  // Ask the target for an instruction selector.
-  // Explicitly enabling fast-isel should override implicitly enabled
-  // global-isel.
-  if (EnableGlobalISelOption == cl::BOU_TRUE ||
-      (EnableGlobalISelOption == cl::BOU_UNSET &&
-       TM->Options.EnableGlobalISel && EnableFastISelOption != cl::BOU_TRUE)) {
-    TM->setGlobalISel(true);
+  } else if (Selector == SelectorType::GlobalISel) {
     TM->setFastISel(false);
+    TM->setGlobalISel(true);
+  }
 
+  // Add instruction selector passes.
+  if (Selector == SelectorType::GlobalISel) {
     SaveAndRestore<bool> SavedAddingMachinePasses(AddingMachinePasses, true);
     if (addIRTranslator())
       return true;
 
     addPreLegalizeMachineIR();
 
     if (addLegalizeMachineIR())
       return true;

llvm/trunk/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option-fastisel.ll

+; REQUIRES: asserts
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   -verify-machineinstrs=0 -O0 -global-isel=false -debug-only=isel \
+; RUN:   | FileCheck %s --check-prefixes=DISABLED,FASTISEL
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   -verify-machineinstrs=0 -O1 -global-isel=false -debug-only=isel \
+; RUN:   | FileCheck %s --check-prefixes=DISABLED,NOFASTISEL
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   -verify-machineinstrs=0 -O0 -fast-isel=false -global-isel=false \
+; RUN:   -debug-only=isel \
+; RUN:   | FileCheck %s --check-prefixes=DISABLED,NOFASTISEL
+
+; RUN: llc -mtriple=aarch64-- -debug-pass=Structure %s -o /dev/null 2>&1 \
+; RUN:   -verify-machineinstrs=0 -O1 -fast-isel=false -global-isel=false \
+; RUN:   -debug-only=isel \
+; RUN:   | FileCheck %s --check-prefixes=DISABLED,NOFASTISEL
+
+; Check that the right instruction selector is chosen when using
+; -global-isel=false. FastISel should be used at -O0 (unless -fast-isel=false is
+; also present) and SelectionDAG otherwise.
+
+; DISABLED-NOT: IRTranslator
+
+; DISABLED: AArch64 Instruction Selection
+; DISABLED: Expand ISel Pseudo-instructions
+
+; FASTISEL: Enabling fast-isel
+; NOFASTISEL-NOT: Enabling fast-isel
+
+define void @empty() {
+  ret void
+}