Page MenuHomePhabricator

petpav01 (Petr Pavlu)
User

Projects

User does not belong to any projects.

User Details

User Since
Jul 24 2014, 5:23 AM (260 w, 4 d)

Recent Activity

Jan 8 2019

petpav01 added a comment to D56266: [GlobalISel] Fix choice of instruction selector for AArch64 at -O0 with -global-isel=0.

Thank you for the review. I will commit the patch with the suggested change shortly.

Jan 8 2019, 6:09 AM

Jan 3 2019

petpav01 created D56266: [GlobalISel] Fix choice of instruction selector for AArch64 at -O0 with -global-isel=0.
Jan 3 2019, 5:12 AM

Dec 7 2018

petpav01 created D55418: [GlobalISel] Set stack protector index when translating Intrinsic::stackprotector.
Dec 7 2018, 2:04 AM

Dec 3 2018

petpav01 updated subscribers of D54518: [GlobalISel] Fix insertion of stack-protector epilogue.

Apologies for the breakage. This was supposed to be an AArch64 test but the triple is incorrect. Should be fixed in rL348111.

Dec 3 2018, 1:36 AM

Nov 29 2018

petpav01 added a comment to D54518: [GlobalISel] Fix insertion of stack-protector epilogue.

Thanks Amara. Committed with the suggested change and splitting up the patch as rL347861 and rL347862.

Nov 29 2018, 5:28 AM

Nov 26 2018

petpav01 added a comment to D54518: [GlobalISel] Fix insertion of stack-protector epilogue.

Ping.

Nov 26 2018, 1:14 AM

Nov 14 2018

petpav01 created D54518: [GlobalISel] Fix insertion of stack-protector epilogue.
Nov 14 2018, 2:07 AM

Nov 8 2018

petpav01 added a comment to D51927: [ARM] Enable spilling of the hGPR class in Thumb2.

Thanks.

Nov 8 2018, 4:45 AM

Nov 7 2018

petpav01 added a comment to D51927: [ARM] Enable spilling of the hGPR class in Thumb2.

Ping.

Nov 7 2018, 6:01 AM
petpav01 updated the diff for D49364: [ARM] Add support for spilling high registers in Thumb1.

Updated patch improves the RegAllocFast part and adds more testing for it. InlineSpiller has no new changes.

Nov 7 2018, 6:00 AM

Oct 4 2018

petpav01 added a comment to D51855: [constexpr] Fix ICE when memcpy() is given a pointer to an incomplete array.

No worries, thanks.

Oct 4 2018, 2:27 AM

Sep 19 2018

petpav01 updated the diff for D51855: [constexpr] Fix ICE when memcpy() is given a pointer to an incomplete array.

Thanks for having a look at this patch. Updated version addresses the review comments.

Sep 19 2018, 12:39 AM

Sep 11 2018

petpav01 created D51927: [ARM] Enable spilling of the hGPR class in Thumb2.
Sep 11 2018, 6:06 AM

Sep 10 2018

petpav01 created D51855: [constexpr] Fix ICE when memcpy() is given a pointer to an incomplete array.
Sep 10 2018, 5:32 AM

Aug 14 2018

petpav01 updated the diff for D49364: [ARM] Add support for spilling high registers in Thumb1.

Thanks for the explanation of this idea. Updated patch goes in that direction and provides a prototype of this approach. The implementation is done in Fast Register Allocator (which has its own spiller code) and in InlineSpiller (used by the other LLVM allocators: Basic, Greedy, PBQP).

Aug 14 2018, 2:38 AM

Jul 26 2018

petpav01 added a comment to D49720: [ARM] Fix over-alignment in arguments that are HA of 128-bit vectors.

Thanks for having a look at this patch.

Jul 26 2018, 1:17 AM
petpav01 updated the diff for D49720: [ARM] Fix over-alignment in arguments that are HA of 128-bit vectors.
Jul 26 2018, 1:13 AM

Jul 24 2018

petpav01 created D49720: [ARM] Fix over-alignment in arguments that are HA of 128-bit vectors.
Jul 24 2018, 1:39 AM

Jul 19 2018

petpav01 added a comment to D49364: [ARM] Add support for spilling high registers in Thumb1.

This is possibly problematic when the register pressure is high because ThumbRegisterInfo::saveScavengerRegister() currently also tries to make use of high register r12.

Also, the constant islands pass can clobber lr. But given the only way to end up with an "hGPR" register class is inline asm, we could probably work around this issue by excluding ip/lr from allocation order for hGPR.

That said, if we ever want to make the high registers generally allocatable in Thumb1 mode, this patch probably isn't the right solution; instead, we should make the register allocator insert the copy, so we aren't forced to scavenge a register later.

Jul 19 2018, 12:53 AM
petpav01 updated the diff for D49364: [ARM] Add support for spilling high registers in Thumb1.
Jul 19 2018, 12:41 AM

Jul 16 2018

petpav01 added a reviewer for D49364: [ARM] Add support for spilling high registers in Thumb1: eli.friedman.
Jul 16 2018, 2:56 AM
petpav01 created D49364: [ARM] Add support for spilling high registers in Thumb1.
Jul 16 2018, 1:40 AM

Jul 4 2018

petpav01 added inline comments to D48916: Fix setting of empty implicit-section-name attribute for functions affected by '#pragma clang section'.
Jul 4 2018, 2:17 AM
petpav01 created D48916: Fix setting of empty implicit-section-name attribute for functions affected by '#pragma clang section'.
Jul 4 2018, 1:01 AM

Jul 2 2018

petpav01 added a comment to D48468: [SelectionDAG] Remove debug locations from ConstantSD(FP)Nodes.

Thanks for the explanation. This does not cause any immediate problem for us but it is unfortunate that a simple assignment of a constant now appears to be split between two lines. Hopefully it will be potentially possible to implement some improvement for this case in the future.

Jul 2 2018, 1:54 AM

Jun 29 2018

petpav01 added a comment to D48468: [SelectionDAG] Remove debug locations from ConstantSD(FP)Nodes.

Hi Vedant,

Jun 29 2018, 2:28 AM

Apr 19 2018

petpav01 created D45807: [libclang] Fix test LibclangReparseTest.FileName when TMPDIR is set to a symbolic link.
Apr 19 2018, 2:26 AM

Oct 11 2017

petpav01 closed D38394: Fix dumping of characters with non-standard sizes.

Landed as r315444. Closing manually because I forgot to include "Differential Revision: ..." in the commit message.

Oct 11 2017, 1:56 AM
petpav01 added a comment to D38394: Fix dumping of characters with non-standard sizes.

Thanks, will commit shortly.

Oct 11 2017, 1:46 AM

Oct 10 2017

petpav01 updated the diff for D38394: Fix dumping of characters with non-standard sizes.

Updated patch contains the following changes:

  • Remove comments for DataExtractor::GetMaxU32() and GetMaxU64() from DataExtractor.cpp and keep only the Doxygen ones in the header file.
  • Restore assertion for byte_size == 0 in GetMaxU32() and GetMaxU64(), change the assert text from "unhandled case" to "invalid byte_size" and replace assert() by lldbassert().
  • Update Doxygen documentation for GetMaxU32(), GetMaxU64(), GetMaxS64(), GetMaxU64Bitfield() and GetMaxS64Bitfield() to say that byte_size must be in interval [1,4/8] and remove that the methods return 0 if byte_size is bigger than 4/8 because that no longer holds. The patch retains the behaviour that LLDB does not crash in such cases but the returned value can be arbitrary. Note: This is something that I am not certain if I addressed properly. It seems to me this should be ok because the code now uses lldbassert() and so there will be always some error that something went wrong. An alternative is to add extra code that checks for byte_size > 4/8 and returns 0 in such cases. Please let me know if that would be preferred.
  • Enable GetMaxU64_unchecked() to also handle any byte_size in range [1,8] and add testing for this method in DataExtractorTest.cpp.
Oct 10 2017, 6:33 AM

Oct 4 2017

petpav01 added inline comments to D38394: Fix dumping of characters with non-standard sizes.
Oct 4 2017, 2:49 AM

Oct 3 2017

petpav01 added a comment to D38394: Fix dumping of characters with non-standard sizes.

Thank you for the initial review.

Oct 3 2017, 7:32 AM

Sep 29 2017

petpav01 created D38394: Fix dumping of characters with non-standard sizes.
Sep 29 2017, 2:50 AM

Jul 12 2017

petpav01 created D35298: [MainLoop] Fix possible use of an invalid iterator.
Jul 12 2017, 3:02 AM

Jan 29 2017

petpav01 updated the diff for D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.

Patch rebased.

Jan 29 2017, 7:05 AM

Feb 29 2016

petpav01 retitled D17715: [LTO] Fix error reporting from lto_module_create_in_local_context() from to [LTO] Fix error reporting from lto_module_create_in_local_context().
Feb 29 2016, 5:44 AM

Jan 15 2016

petpav01 added a comment to D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.

Ping. I would still like to address this problem. Could I please get a review on the last version of the patch?

Jan 15 2016, 2:41 AM
petpav01 updated the diff for D16106: [LTO] Fix error reporting when a file passed to libLTO is invalid or non-existent.

Updated patch deletes the error() call after LTOModule::createFromFile() from llvm-lto because any error from this function should go through the diagnostic handler in llvm-lto which will exit the program.

Jan 15 2016, 1:39 AM
petpav01 added a comment to D16106: [LTO] Fix error reporting when a file passed to libLTO is invalid or non-existent.

Thank you for looking at this patch. I will update the patch to delete the error() call after LTOModule::createFromFile() from llvm-lto.

Jan 15 2016, 1:36 AM

Jan 12 2016

petpav01 retitled D16106: [LTO] Fix error reporting when a file passed to libLTO is invalid or non-existent from to [LTO] Fix error reporting when a file passed to libLTO is invalid or non-existent.
Jan 12 2016, 1:50 AM

Dec 11 2015

petpav01 updated the diff for D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.

Updated patch adds more tests and fixes a problem introduced in the previous revision where templates taking __val_expr were not correctly protected by SFINAE from immediate context (it introduced same problem with explicit template parameters that I am trying to solve).

Dec 11 2015, 12:46 AM

Nov 18 2015

petpav01 updated the diff for D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.

I am not sure if I understand the comment about [17.6.5.4] correctly. It is not clear to me how this part of the standard prevents the user from specifying explicit template parameters for standard functions. It seems odd that the standard would disallow, for example, to use std::max<double>(1, 2.0).

Nov 18 2015, 3:06 AM

Nov 16 2015

petpav01 retitled D14694: [ARM] Prevent use of a value pointed by end() iterator when placing a jump table from to [ARM] Prevent use of a value pointed by end() iterator when placing a jump table.
Nov 16 2015, 12:37 AM

Oct 25 2015

petpav01 added a comment to D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.

Thank you for having a look at this patch. I should get to updating it as requested soon. Apologies for the delay.

Oct 25 2015, 9:43 AM

Oct 3 2015

petpav01 added a comment to D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.

It would be probably better if the patch changed the original templates to take only __val_expr as there is now no need for them to match valarray too. This should be a simple change but requires additional tests so I will wait for initial feedback that this approach is preferred.

Oct 3 2015, 5:11 AM

Sep 30 2015

petpav01 retitled D13289: [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis from to [libc++] Provide additional templates for valarray transcendentals that satisfy the standard synopsis.
Sep 30 2015, 6:44 AM

Jul 6 2015

petpav01 updated the diff for D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Updated patch fixes formatting problems and corrects the debugging output.

Jul 6 2015, 7:49 AM
petpav01 added a comment to D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Hi James,

Jul 6 2015, 7:47 AM
petpav01 updated the diff for D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Improve decoding options for non-orthogonal instructions

Jul 6 2015, 12:38 AM

Mar 16 2015

petpav01 added a comment to D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Hi James,

Mar 16 2015, 1:58 AM

Mar 2 2015

petpav01 set the repository for D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions to rL LLVM.
Mar 2 2015, 3:27 AM
petpav01 updated the diff for D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Updated patch adds a check that the instruction coming in DecodeSystemPStateInstruction() is really MSR (immediate) (MSRpstate in LLVM), which means it can be interpreted as the extended MSR if pstatefield is not allocated. I think it would be a logical error if the method was called for non-MSR (immediate) instructions so the code asserts this condition (instead of returning Fail).

Mar 2 2015, 3:26 AM

Feb 17 2015

petpav01 added a comment to D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Thank you Renato for having a look at this patch.

Feb 17 2015, 8:24 AM
petpav01 added a comment to D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions.

Any feedback on this patch? I realize it is an ugly one but I would appreciate any hints how it could be done in a cleaner way.

Feb 17 2015, 12:48 AM

Jan 26 2015

petpav01 retitled D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions from to [AArch64] Fix problems in handling generic MSR/MRS instructions.
Jan 26 2015, 3:29 AM

Sep 1 2014

petpav01 added a comment to D4979: ARM: Improve handling of the Thumb2 M-class MSR instruction.

Hi Renato,

Sep 1 2014, 3:47 AM

Aug 29 2014

petpav01 updated the diff for D4979: ARM: Improve handling of the Thumb2 M-class MSR instruction.
Aug 29 2014, 3:53 AM
petpav01 added a comment to D4979: ARM: Improve handling of the Thumb2 M-class MSR instruction.

Hi Renato,

Aug 29 2014, 3:48 AM

Aug 20 2014

petpav01 retitled D4979: ARM: Improve handling of the Thumb2 M-class MSR instruction from to ARM: Improve handling of the Thumb2 M-class MSR instruction.
Aug 20 2014, 12:39 AM

Aug 1 2014

petpav01 closed D4694: ARM: Tighten up disassembling of MSR mask for M-class.
Aug 1 2014, 7:38 AM · deleted
petpav01 accepted D4694: ARM: Tighten up disassembling of MSR mask for M-class.

r214505

Aug 1 2014, 7:38 AM · deleted

Jul 28 2014

petpav01 updated the diff for D4694: ARM: Tighten up disassembling of MSR mask for M-class.

Hi James,

Jul 28 2014, 5:33 AM · deleted
petpav01 retitled D4694: ARM: Tighten up disassembling of MSR mask for M-class from to ARM: Tighten up disassembling of MSR mask for M-class.
Jul 28 2014, 2:33 AM · deleted