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greened (David Greene)
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Jul 1 2015, 10:19 AM (216 w, 2 d)

Recent Activity

Tue, Aug 20

greened added a comment to D66098: [CostModel] Model all `extractvalue`s as free..

LGTM, though are we sure this is true for all targets? The comments in the referenced patch only consider X86. I'm pretty sure it is true for common architectures like AArch64 but I'm not as sure for more exotic things.

I have asked the exact same question before:

Did anything happen with the extractvalue cost suggestion?

I was planning to look into that, and i just did. Some observations:

  1. I'm not sure we can literally treat any extractvalue as free, it clearly isn't: https://godbolt.org/z/6wIxAa

For the short cases, the mov belongs to the return not the extractvalue. For the large cases all of that code is the result of passing an array by value.

So it seems to be the right thing to do..

Tue, Aug 20, 1:52 PM · Restricted Project
greened added a comment to D66339: [SVE] Fixed-length vector MVT ranges.

I was suggesting to change the order of the MVTs to keep all the fixed-width types contiguous (int and fp), as a lighter weight alternative to introducing the filter/concat iterators, since this would probably suffice for most use-cases. We can always introduce the concat iterators later if needed.

Tue, Aug 20, 1:46 PM · Restricted Project

Mon, Aug 19

greened added inline comments to D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Mon, Aug 19, 9:17 AM · Restricted Project
greened updated the diff for D66148: [SemanticTypedef] Provide a semantic typedef class and operators.

Removed casts, default constructors, added all operators where it makes sense (unary *, ->, ->*, unary &, comma, [] and () not added because a default return type is not obvious), placed operators in their own namespace to avoid collisions, rewrote example, updated tests.

Mon, Aug 19, 9:17 AM · Restricted Project

Fri, Aug 16

greened added inline comments to D66339: [SVE] Fixed-length vector MVT ranges.
Fri, Aug 16, 10:26 AM · Restricted Project
greened added a comment to D66339: [SVE] Fixed-length vector MVT ranges.

I like your suggestion of using concat_iterator(_range), but I think grouping all fixed-width types together is sufficient for now. If there is ever a good reason to iterate through (all combined scalable and fixed-width fp vector types)or (all combined scalable and fixed-width integer vector types), we can always introduce the extra concat_iterators then.

Fri, Aug 16, 10:26 AM · Restricted Project

Thu, Aug 15

greened added inline comments to D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Thu, Aug 15, 8:13 AM · Restricted Project

Wed, Aug 14

greened added inline comments to D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Wed, Aug 14, 2:09 PM · Restricted Project
greened added inline comments to D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Wed, Aug 14, 12:09 PM · Restricted Project
greened added inline comments to D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Wed, Aug 14, 8:31 AM · Restricted Project
greened added a comment to D66148: [SemanticTypedef] Provide a semantic typedef class and operators.

A strong motivation for using this over enum class should be provided. The default behavior is too minimalistic.

Wed, Aug 14, 8:23 AM · Restricted Project

Tue, Aug 13

greened added a comment to D66098: [CostModel] Model all `extractvalue`s as free..

LGTM, though are we sure this is true for all targets? The comments in the referenced patch only consider X86. I'm pretty sure it is true for common architectures like AArch64 but I'm not as sure for more exotic things.

Tue, Aug 13, 10:34 AM · Restricted Project
greened added a comment to D63459: Loop Cache Analysis.

Oops, I missed that this landed already. Perhaps a later commit can improve the debug message.

Tue, Aug 13, 10:26 AM · Restricted Project
greened added inline comments to D63459: Loop Cache Analysis.
Tue, Aug 13, 10:26 AM · Restricted Project
greened added inline comments to D65931: [AArch64][SVE] Implement abs and neg intrinsics.
Tue, Aug 13, 10:17 AM · Restricted Project
greened added a comment to D65930: [IntrinsicEmitter] Support scalable vectors in intrinsics.
Tue, Aug 13, 10:17 AM · Restricted Project
greened added a comment to D61437: [AArch64] Static (de)allocation of SVE stack objects..

This LGTM but I think someone else should probably sign off on it as well.

Tue, Aug 13, 10:00 AM
greened added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

Thanks for all the feedback so far. I think I've addressed all comments and suggestions, are we happy to move forward with this patch?

Tue, Aug 13, 9:55 AM · Restricted Project
greened updated the summary of D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Tue, Aug 13, 9:42 AM · Restricted Project
greened created D66148: [SemanticTypedef] Provide a semantic typedef class and operators.
Tue, Aug 13, 9:42 AM · Restricted Project

Fri, Aug 2

greened accepted D47770: [MVT][SVE] Add EVT strings and Type mapping.
Fri, Aug 2, 8:58 AM · Restricted Project
greened accepted D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..

This was accepted. Did it land?

Not yet, I initially thought about landing it together with D61437 because there was no need for it otherwise. But if everyone is happy, I guess this one can just land.

Fri, Aug 2, 8:56 AM · Restricted Project
greened added a comment to D47770: [MVT][SVE] Add EVT strings and Type mapping.

LGTM, thanks!

Fri, Aug 2, 8:54 AM · Restricted Project
greened added a comment to D61437: [AArch64] Static (de)allocation of SVE stack objects..

I wonder if this should have a test that ensures we generate VL-scaled addressing modes for SVE object addressing. If there's not enough codegen yet to emit the asm, then we should probably add such a test when we can. After all, it's the stated goal of this patch. :)

Fri, Aug 2, 8:49 AM
greened added a comment to D65653: [AArch64] Change location of frame-record within callee-save area..

I can't really comment on the correctness of this but other than the one comment I'd like to see added, LGTM.

Fri, Aug 2, 8:46 AM · Restricted Project

Thu, Aug 1

greened added a comment to D61435: [AArch64] NFC: Add generic StackOffset to describe scalable offsets..

This was accepted. Did it land?

Thu, Aug 1, 12:56 PM · Restricted Project
greened added inline comments to D61437: [AArch64] Static (de)allocation of SVE stack objects..
Thu, Aug 1, 12:56 PM
greened added a comment to D61437: [AArch64] Static (de)allocation of SVE stack objects..

I wouldn't really worry about optimizing this; dynamic stack allocation is rare in most C and C++ codebases, and one integer register likely doesn't matter much.

Thu, Aug 1, 12:42 PM
greened added inline comments to D47770: [MVT][SVE] Add EVT strings and Type mapping.
Thu, Aug 1, 12:13 PM · Restricted Project

Wed, Jul 31

greened added inline comments to D53137: Scalable vector core instruction support + size queries.
Wed, Jul 31, 1:06 PM · Restricted Project
greened added inline comments to D63459: Loop Cache Analysis.
Wed, Jul 31, 12:50 PM · Restricted Project
greened added a comment to D47770: [MVT][SVE] Add EVT strings and Type mapping.

What's the status of this?

Wed, Jul 31, 11:41 AM · Restricted Project

Jul 24 2019

greened added inline comments to D63459: Loop Cache Analysis.
Jul 24 2019, 10:13 AM · Restricted Project

Jul 18 2019

greened added inline comments to D63459: Loop Cache Analysis.
Jul 18 2019, 5:54 PM · Restricted Project
greened added inline comments to D63459: Loop Cache Analysis.
Jul 18 2019, 10:32 AM · Restricted Project

Jul 17 2019

greened added inline comments to D63902: [InlineCost] separate stats from CallAnalyzer into InliningStats.
Jul 17 2019, 10:36 AM · Restricted Project
greened added a comment to D57400: Add a .gitignore file to the root that ignores any files outside of the project directories..

What about downstream users that have added directories in their local forks? Having git suddenly ignore them would be surprising. We are in that situation.

Jul 17 2019, 10:28 AM

Jul 10 2019

greened committed rGd300a493df36: Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces" (authored by greened).
Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces"
Jul 10 2019, 11:27 AM
greened added a reverting change for rG9fdfb045ae8b: [System Model] [TTI] Update cache and prefetch TTI interfaces: rGd300a493df36: Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces".
Jul 10 2019, 11:27 AM
greened committed rL365680: Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces".
Revert "[System Model] [TTI] Update cache and prefetch TTI interfaces"
Jul 10 2019, 11:27 AM
greened committed rG9fdfb045ae8b: [System Model] [TTI] Update cache and prefetch TTI interfaces (authored by greened).
[System Model] [TTI] Update cache and prefetch TTI interfaces
Jul 10 2019, 11:09 AM
greened committed rL365676: [System Model] [TTI] Update cache and prefetch TTI interfaces.
[System Model] [TTI] Update cache and prefetch TTI interfaces
Jul 10 2019, 11:09 AM
greened closed D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.
Jul 10 2019, 11:09 AM · Restricted Project

Jul 5 2019

greened added a comment to D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.

I know this now says "ready to land" but is one review really sufficient?

Jul 5 2019, 9:30 AM · Restricted Project
greened updated the diff for D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.

Updated to latest master and removed comments on implementations

Jul 5 2019, 9:29 AM · Restricted Project

Jul 4 2019

greened added inline comments to D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.
Jul 4 2019, 7:50 PM · Restricted Project

Jun 27 2019

greened added a comment to D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.

Ping.

Jun 27 2019, 12:05 PM · Restricted Project

Jun 21 2019

greened added inline comments to D63507: Teach TableGen Intrin Emitter to handle LLVMPointerType<llvm_any_ty>.
Jun 21 2019, 10:10 AM · Restricted Project

Jun 20 2019

greened added inline comments to D63507: Teach TableGen Intrin Emitter to handle LLVMPointerType<llvm_any_ty>.
Jun 20 2019, 1:25 PM · Restricted Project
greened added a comment to D63507: Teach TableGen Intrin Emitter to handle LLVMPointerType<llvm_any_ty>.

Unfortunately, I've never worked in the IntrinsicEmitter so I can't really comment on the correctness of the patch. I will make some inline comments on non-correctness things.

Jun 20 2019, 1:22 PM · Restricted Project
greened added a comment to D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.

This is the subset of D58736 covering changes to TTI and related classes. It does not introduce any new functionality, only reorganizes things a bit to move implementations into subtargets in preparation for defining system models for targets.

Jun 20 2019, 10:20 AM · Restricted Project
greened added a comment to D58736: [System Model] Introduce a target system model.

I just posted D63614, the subset of this patch covering only the changes to TTI and related classes.

Jun 20 2019, 10:19 AM · Restricted Project
greened created D63614: [System Model] [TTI] Update cache and prefetch TTI interfaces.
Jun 20 2019, 10:17 AM · Restricted Project
greened added inline comments to D58736: [System Model] Introduce a target system model.
Jun 20 2019, 10:05 AM · Restricted Project

Jun 14 2019

greened updated the summary of D58736: [System Model] Introduce a target system model.
Jun 14 2019, 1:37 PM · Restricted Project
greened updated the diff for D58736: [System Model] Introduce a target system model.

Updated to address comments.

Jun 14 2019, 1:34 PM · Restricted Project

May 28 2019

greened committed rG561fcc0d63ca: [X86-64] Fix 256-bit SET0 lowering for non-VLX targets (authored by greened).
[X86-64] Fix 256-bit SET0 lowering for non-VLX targets
May 28 2019, 8:37 AM
greened committed rL361843: [X86-64] Fix 256-bit SET0 lowering for non-VLX targets.
[X86-64] Fix 256-bit SET0 lowering for non-VLX targets
May 28 2019, 8:37 AM
greened closed D62415: [X86-64] Fix 256-bit SET0 lowering for non-VLX targets.
May 28 2019, 8:37 AM · Restricted Project

May 26 2019

greened updated the diff for D62415: [X86-64] Fix 256-bit SET0 lowering for non-VLX targets.

Added testcase.

May 26 2019, 2:26 PM · Restricted Project

May 24 2019

greened added a comment to D62415: [X86-64] Fix 256-bit SET0 lowering for non-VLX targets.

Oops, needs a testcase. Will add.

May 24 2019, 11:35 AM · Restricted Project
greened created D62415: [X86-64] Fix 256-bit SET0 lowering for non-VLX targets.
May 24 2019, 11:35 AM · Restricted Project

May 13 2019

greened added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

I know very well how annoying it can be to read and write (and say) the scalable prefix all the time and wish for something shorter sometimes, but I also prefer <vscale x ...> for the reasons Sander gave. I'll add that <vscale x 4 x i32> feels a bit lighter than <scalable 4 x i32> even though it's the same number of characters (maybe because there's more whitespace?).

The <n x ...> syntax is shorter but doesn't have the mnemonic aspect and also clashes with the pre-existing use of "n" as a metavariable standing for some fixed vector length (as in, <N x i1> for example), so I'd rather have <scalable ...> if those are the two options.

May 13 2019, 11:48 AM · Restricted Project

May 9 2019

greened added a comment to D61089: [Reassociation] Place moved instructions after landing pads.

Looks like some lines got truncated from the head of the first test file. Test is failing due to no run line.

May 9 2019, 10:45 AM · Restricted Project
greened added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

What's the status of this? It seems like discussion has died down a bit. I think Graham's idea to change from <scalable 2 x float> to <vscale x 2 x float> will make the IR more readable/understandable but it's not a show-stopper for me.

May 9 2019, 10:33 AM · Restricted Project

May 8 2019

greened committed rG6c433713e91b: [Reassociation] Place moved instructions after landing pads (authored by greened).
[Reassociation] Place moved instructions after landing pads
May 8 2019, 8:43 AM
greened committed rL360262: [Reassociation] Place moved instructions after landing pads.
[Reassociation] Place moved instructions after landing pads
May 8 2019, 8:42 AM
greened closed D61089: [Reassociation] Place moved instructions after landing pads.
May 8 2019, 8:42 AM · Restricted Project

May 7 2019

greened updated the diff for D61089: [Reassociation] Place moved instructions after landing pads.

Added a test for catchswitch and fixed a bug with falling off the end of a basic block.

May 7 2019, 6:43 AM · Restricted Project

May 1 2019

greened updated the diff for D61089: [Reassociation] Place moved instructions after landing pads.

Updated to account for isEHPad including catchswitch. I'm not very happy with the hacky use of FoundCatchSwitch but could not think of a way to do this that keeps things relatively clear/readable and doesn't put the for loop into a deeper nesting level or completely reformat the function.

May 1 2019, 10:39 AM · Restricted Project
greened added inline comments to D61089: [Reassociation] Place moved instructions after landing pads.
May 1 2019, 10:38 AM · Restricted Project

Apr 30 2019

greened updated the summary of D61089: [Reassociation] Place moved instructions after landing pads.
Apr 30 2019, 1:39 PM · Restricted Project
greened updated the diff for D61089: [Reassociation] Place moved instructions after landing pads.

Bail out of the loop that found an existing neg if there is a catchswitch
and just create a new neg instead.

Apr 30 2019, 1:38 PM · Restricted Project
greened added inline comments to D61089: [Reassociation] Place moved instructions after landing pads.
Apr 30 2019, 1:37 PM · Restricted Project
greened added inline comments to D61089: [Reassociation] Place moved instructions after landing pads.
Apr 30 2019, 1:08 PM · Restricted Project
greened updated the diff for D61089: [Reassociation] Place moved instructions after landing pads.

Updated to use isEHPad.

Apr 30 2019, 1:07 PM · Restricted Project
greened added inline comments to D61089: [Reassociation] Place moved instructions after landing pads.
Apr 30 2019, 12:53 PM · Restricted Project
greened added inline comments to D32530: [SVE][IR] Scalable Vector IR Type.
Apr 30 2019, 12:32 PM · Restricted Project

Apr 29 2019

greened updated the diff for D61089: [Reassociation] Place moved instructions after landing pads.

Rebased on latest master and fixed test name.

Apr 29 2019, 12:23 PM · Restricted Project

Apr 24 2019

greened created D61089: [Reassociation] Place moved instructions after landing pads.
Apr 24 2019, 1:37 PM · Restricted Project

Apr 22 2019

greened added a comment to D32530: [SVE][IR] Scalable Vector IR Type.
Apr 22 2019, 12:12 PM · Restricted Project

Apr 17 2019

greened added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

We need to clarify on insertelement/extractelement. Maybe already done in some other patches, but that clarification should be part of this patch.
Is the "length of val" under the semantics "scalable * n" in <scalable n x ElemTy>, right? Or is it still n?

Apr 17 2019, 1:54 PM · Restricted Project

Apr 3 2019

greened added inline comments to D58736: [System Model] Introduce a target system model.
Apr 3 2019, 2:51 PM · Restricted Project
greened added a comment to D58736: [System Model] Introduce a target system model.

This takes a while to digest. Some quick remarks for now (also inline):

Apr 3 2019, 2:22 PM · Restricted Project
greened added a comment to D58736: [System Model] Introduce a target system model.

Thank you for pushing this forward and sorry for the delay.

Could you add some central high-level documentation about what the memory system model is? E.g. describe that an MCSystemModel has a list of execution resources, memory hierarchies, prefetch configs and write-combining buffers. A Cache hierarchy as a total size, line size, associativity, etc. To get the interpretation eight, please add more details about ever parameter, particularly the prefetch configs. Some other examples than ARM big.LITTLE would be nice as well.

Apr 3 2019, 2:18 PM · Restricted Project

Mar 20 2019

greened added inline comments to D32530: [SVE][IR] Scalable Vector IR Type.
Mar 20 2019, 11:11 AM · Restricted Project

Mar 14 2019

greened added a comment to D58736: [System Model] Introduce a target system model.

Ping?

Mar 14 2019, 1:38 PM · Restricted Project

Mar 8 2019

greened added a comment to D32530: [SVE][IR] Scalable Vector IR Type.

This all LGTM.

Mar 8 2019, 7:31 AM · Restricted Project
greened added inline comments to D47770: [MVT][SVE] Add EVT strings and Type mapping.
Mar 8 2019, 7:28 AM · Restricted Project

Mar 7 2019

greened added inline comments to D47770: [MVT][SVE] Add EVT strings and Type mapping.
Mar 7 2019, 1:58 PM · Restricted Project
greened added a reviewer for D32530: [SVE][IR] Scalable Vector IR Type: greened.
Mar 7 2019, 1:54 PM · Restricted Project
greened added a comment to D53137: Scalable vector core instruction support + size queries.

I know this isn't ready for merge, but since the mailing list discussion has died down it seems like maybe we should move the discussion here. If so, it would be helpful to have comments on all the routines explaining what they do and how they differ from the existing routines, in order to aid discussion.

Mar 7 2019, 1:52 PM · Restricted Project

Mar 6 2019

greened added a comment to D58736: [System Model] Introduce a target system model.

Ping?

Mar 6 2019, 9:04 AM · Restricted Project

Feb 28 2019

greened added a comment to D58775: [Tablegen] Add support for the !mul operator..

Cool,. I've wanted this for a while. LGTM.

Feb 28 2019, 9:44 AM · Restricted Project
greened added a comment to D58546: [lit] Honor PYTHONPATH for llvm tests.

If we do this, should we do it in lit? Else we probably need to do it in llvm, clang, lld, clang-tools-extra, etc etc etc.

Feb 28 2019, 8:17 AM · Restricted Project

Feb 27 2019

greened added a comment to D58736: [System Model] Introduce a target system model.

A larger design question I have about this is the proper place to put software prefetching configuration. Right now it lives at the memory model level, in that a memory model specifies a cache heirachy along with a software prefetch configuration. I wonder if we should allow for software prefetching configuration for each cache level, as targets might want different policies depending on which cache level they are prefetching into. I don't think we have any examples of that in the codebase today but I can imagine cases where targets might want it.

Feb 27 2019, 2:19 PM · Restricted Project
greened created D58736: [System Model] Introduce a target system model.
Feb 27 2019, 1:38 PM · Restricted Project
greened added a comment to D57806: [Interpreter] Add newline to interpreter debugging output.

LGTM.

Feb 27 2019, 1:16 PM · Restricted Project

Feb 22 2019

greened abandoned D56202: [OpenMP] Remove -fno-experimental-isel from OMP testing.

I believe https://reviews.llvm.org/D56266 is working for me.

Feb 22 2019, 1:23 PM · Restricted Project
greened committed rG3b9141df25df: [CMake] Honor LLVM_EXTERNAL_<proj>_SOURCE_DIR (authored by greened).
[CMake] Honor LLVM_EXTERNAL_<proj>_SOURCE_DIR
Feb 22 2019, 1:20 PM