AMDGPU/InsertWaitcnts: Some more const-correctness

[msearles]

LGTM

llvm/trunk/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

void setScoreUB(InstCounterType T, int32_t Val) {
     ScoreUBs[T] = Val;
     if (T == EXP_CNT) {
       int32_t UB = (int)(ScoreUBs[T] - getWaitCountMax(EXP_CNT));
       if (ScoreLBs[T] < UB)
         ScoreLBs[T] = UB;
     }
   }
 
-  int32_t getScoreLB(InstCounterType T) {
+  int32_t getScoreLB(InstCounterType T) const {
     assert(T < NUM_INST_CNTS);
     if (T >= NUM_INST_CNTS)
       return 0;
     return ScoreLBs[T];
   }
 
-  int32_t getScoreUB(InstCounterType T) {
+  int32_t getScoreUB(InstCounterType T) const {
     assert(T < NUM_INST_CNTS);
     if (T >= NUM_INST_CNTS)
       return 0;
     return ScoreUBs[T];
   }
 
   // Mapping from event to counter.
   InstCounterType eventCounter(WaitEventType E) {
public:
   int32_t getMaxVGPR() const { return VgprUB; }
   int32_t getMaxSGPR() const { return SgprUB; }
 
   int32_t getEventUB(enum WaitEventType W) const {
     assert(W < NUM_WAIT_EVENTS);
     return EventUBs[W];
   }
 
-  bool counterOutOfOrder(InstCounterType T);
+  bool counterOutOfOrder(InstCounterType T) const;
   unsigned int updateByWait(InstCounterType T, int ScoreToWait);
   void updateByEvent(const SIInstrInfo *TII, const SIRegisterInfo *TRI,
                      const MachineRegisterInfo *MRI, WaitEventType E,
                      MachineInstr &MI);
 
   bool hasPendingSMEM() const {
     return (EventUBs[SMEM_ACCESS] > ScoreLBs[LGKM_CNT] &&
             EventUBs[SMEM_ACCESS] <= ScoreUBs[LGKM_CNT]);
if ((UB >= ScoreToWait) && (ScoreToWait > LB)) {
     }
   }
 
   return NeedWait;
 }
 
 // Where there are multiple types of event in the bracket of a counter,
 // the decrement may go out of order.
-bool BlockWaitcntBrackets::counterOutOfOrder(InstCounterType T) {
+bool BlockWaitcntBrackets::counterOutOfOrder(InstCounterType T) const {
   switch (T) {
   case VM_CNT:
     return false;
   case LGKM_CNT: {
     if (EventUBs[SMEM_ACCESS] > ScoreLBs[LGKM_CNT] &&
         EventUBs[SMEM_ACCESS] <= ScoreUBs[LGKM_CNT]) {
       // Scalar memory read always can go out of order.
       return true;