In order to support codegen RV64A, this patch:
- Introduces masked atomics intrinsics for atomicrmw operations and cmpxchg that use the i64 type. These are ultimately lowered to masked operations using lr.w/sc.w, but we need to use these alternate intrinsics for RV64 because i32 is not legal
- Modifies RISCVExpandPseudoInsts.cpp to handle PseudoAtomicLoadNand64 and PseudoCmpXchg64
- Modifies the AtomicExpandPass hooks in RISCVTargetLowering sext/trunc as needed for RV64 and to select the i64 intrinsic IDs when necessary
- Adds appropriate patterns to RISCVInstrInfoA.td
- Updates test/CodeGen/RISCV/atomic-*.ll to show RV64A support
This ends up being a fairly mechanical change, as the logic for RV32A is effectively reused.