[AArch64][v8.5A] Add speculation barriers SSBB and PSSBB

[olista01]

Summary

This adds two new barrier instructions which can be used to restrict
speculative execution of load instructions.

Patch by Pablo Barrio!

[t.p.northover]

lib/Target/AArch64/AArch64InstrInfo.td

648–649

I think these should have Predicates set since not all CPUs support them.

[olista01]

lib/Target/AArch64/AArch64InstrInfo.td

648–649

This is deliberate, these instructions have been retroactively added to v8.0-A onwards. This works because they are aliases for "DSB #0" and "DSB #4", which older specs say have to behave like "DSB SY", which has stronger semantics than SSBB and PSSBB. This means that existing cores already implement these, though in a more costly way than v8.5-A allows.

[t.p.northover]

Thanks for the clarification. LGTM.

lib/Target/AArch64/AArch64InstrInfo.td

648–649

OK, I wondered if it was something like that but the manual was a bit vague on the topic and I wasn't certain the existing DSB sufficed.

lib/Target/AArch64/AArch64InstrInfo.td

 def SB : SimpleSystemI<0, (ins), "sb", "">, Sched<[]> {
     let Inst{20-5} = 0b0001100110000111;
     let Unpredictable{11-8} = 0b1111;
     let Predicates = [HasSpecCtrl];
 }
 
 def : InstAlias<"clrex", (CLREX 0xf)>;
 def : InstAlias<"isb", (ISB 0xf)>;
+def : InstAlias<"ssbb", (DSB 0)>;
+def : InstAlias<"pssbb", (DSB 4)>;
 
 def MRS    : MRSI;
 def MSR    : MSRI;
 def MSRpstateImm1 : MSRpstateImm0_1;
 def MSRpstateImm4 : MSRpstateImm0_15;
 
 // The thread pointer (on Linux, at least, where this has been implemented) is
 // TPIDR_EL0.

test/MC/AArch64/basic-a64-instructions.s

// CHECK: sevl                            // encoding: [0xbf,0x20,0x03,0xd5]
         clrex #7
         clrex #15
 // CHECK: clrex                           // encoding: [0x5f,0x3f,0x03,0xd5]
 // CHECK: clrex   #0                      // encoding: [0x5f,0x30,0x03,0xd5]
 // CHECK: clrex   #7                      // encoding: [0x5f,0x37,0x03,0xd5]
 // CHECK: clrex                           // encoding: [0x5f,0x3f,0x03,0xd5]
 
         dsb #0
+        dsb #4
         dsb #12
         dsb #15
         dsb oshld
         dsb oshst
         dsb osh
         dsb nshld
         dsb nshst
         dsb nsh
         dsb ishld
         dsb ishst
         dsb ish
         dsb ld
         dsb st
         dsb sy
-// CHECK: dsb     #0                      // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: ssbb                            // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: pssbb                           // encoding: [0x9f,0x34,0x03,0xd5]
 // CHECK: dsb     #12                     // encoding: [0x9f,0x3c,0x03,0xd5]
 // CHECK: dsb     sy                      // encoding: [0x9f,0x3f,0x03,0xd5]
 // CHECK: dsb     oshld                   // encoding: [0x9f,0x31,0x03,0xd5]
 // CHECK: dsb     oshst                   // encoding: [0x9f,0x32,0x03,0xd5]
 // CHECK: dsb     osh                     // encoding: [0x9f,0x33,0x03,0xd5]
 // CHECK: dsb     nshld                   // encoding: [0x9f,0x35,0x03,0xd5]
 // CHECK: dsb     nshst                   // encoding: [0x9f,0x36,0x03,0xd5]
 // CHECK: dsb     nsh                     // encoding: [0x9f,0x37,0x03,0xd5]

test/MC/AArch64/speculation-barriers.s

 // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s
 
-  csdb
+ssbb
+pssbb
+
 // CHECK: csdb   // encoding: [0x9f,0x22,0x03,0xd5]
+// CHECK: ssbb   // encoding: [0x9f,0x30,0x03,0xd5]
+// CHECK: pssbb  // encoding: [0x9f,0x34,0x03,0xd5]

test/MC/Disassembler/AArch64/basic-a64-instructions.txt

 # CHECK: clrex    #0
 # CHECK: clrex    #7
 # CHECK: clrex
 0x5f 0x3f 0x3 0xd5
 0x5f 0x30 0x3 0xd5
 0x5f 0x37 0x3 0xd5
 0x5f 0x3f 0x3 0xd5
 
-# CHECK: dsb      #0
 # CHECK: dsb      #12
 # CHECK: dsb      sy
 # CHECK: dsb      oshld
 # CHECK: dsb      oshst
 # CHECK: dsb      osh
 # CHECK: dsb      nshld
 # CHECK: dsb      nshst
 # CHECK: dsb      nsh
 # CHECK: dsb      ishld
 # CHECK: dsb      ishst
 # CHECK: dsb      ish
 # CHECK: dsb      ld
 # CHECK: dsb      st
 # CHECK: dsb      sy
-0x9f 0x30 0x3 0xd5
 0x9f 0x3c 0x3 0xd5
 0x9f 0x3f 0x3 0xd5
 0x9f 0x31 0x3 0xd5
 0x9f 0x32 0x3 0xd5
 0x9f 0x33 0x3 0xd5
 0x9f 0x35 0x3 0xd5
 0x9f 0x36 0x3 0xd5
 0x9f 0x37 0x3 0xd5

test/MC/Disassembler/AArch64/speculation-barriers.txt

 # RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck %s
 
 [0x9f,0x22,0x03,0xd5]
-# CHECK: csdb
+[0x9f,0x30,0x03,0xd5]
+[0x9f,0x34,0x03,0xd5]
+
+# CHECK:      csdb
+# CHECK-NEXT: ssbb
+# CHECK-NEXT: pssbb