[X86][XOP] VFRCZ* instructions should be in their own sched class

[lebedev.ri]

Summary

VFRCZ* are AMD XOP instructions.
That instruction set is only supported by bdver[1-4] cpu models.

These instructions are unrelated to the instructions grouped by the WriteFRnd sched class.
On bdver[1-3], they have latency of 10, as per agner's tables,
and as per my llvm-exegesis measurements for bdver2.
Which is different from what WriteFRnd specifies (5).

Now, the test coverage is saddening. We currently don't have any
dedicated sched models for any of these 4 cpu's, so the test coverage decreases.
I'm not sure this can be improved, until the said sched model is ready for integration...

[RKSimon]

I think you'd be much better off just adding InstRW overrides to your prototype model, similar to how SSE4A instructions are handled in the btver2/znver1 models. Once we have actual models in trunk that support these instructions we can revisit this if you have a strong use case.

lib/Target/X86/X86SchedSandyBridge.td

15

This comment explains that SNB must support all models as its used as the generic model.

test/tools/llvm-mca/X86/Generic/resources-xop.s

2

You are missing the whole point of the generic model by doing this.

[lebedev.ri]

lib/Target/X86/X86SchedSandyBridge.td

15

Aha.
I suppose that also answers my unasked question as to why there is
two distinct ways to mark 'instruction' as unsupported - here for schedule class,
and ProcessorFeatures.

test/tools/llvm-mca/X86/Generic/resources-xop.s

2

Indeed i do.

[lebedev.ri]

Can this proceed if i fix this to not regress the default sched class?

[RKSimon]

In D51570#1251153, @lebedev.ri wrote:

Can this proceed if i fix this to not regress the default sched class?

I'd much prefer to wait until we have a scheduler model for a cpu that supports this.

[RKSimon]

Abandon this?

[lebedev.ri]

In D51570#1282305, @RKSimon wrote:

Abandon this?

The issue still is there, these are very different from the WriteFRnd.
https://github.com/llvm-mirror/llvm/blob/3a8afbd8a1a153d49969b13c1d8ba3858d860acd/lib/Target/X86/X86ScheduleBdVer2.td#L749-L779
Unless we prefer *lots* of InstRW, i should probably rebase this instead.

lib/Target/X86/X86InstrXOP.td

multiclass xop2op256<bits<8> opc, string OpcodeStr, Intrinsic Int,
   def Yrm : IXOP<opc, MRMSrcMem, (outs VR256:$dst), (ins f256mem:$src),
            !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
            [(set VR256:$dst, (Int (bitconvert (memop addr:$src))))]>, XOP, VEX_L,
            Sched<[sched.Folded, ReadAfterLd]>;
 }
 
 let ExeDomain = SSEPackedSingle in {
   defm VFRCZSS : xop2opsld<0x82, "vfrczss", int_x86_xop_vfrcz_ss,
-                           ssmem, sse_load_f32, SchedWriteFRnd.Scl>;
+                           ssmem, sse_load_f32, SchedWriteVFRCZ.Scl>;
   defm VFRCZPS : xop2op128<0x80, "vfrczps", int_x86_xop_vfrcz_ps, loadv4f32,
-                           SchedWriteFRnd.XMM>;
+                           SchedWriteVFRCZ.XMM>;
   defm VFRCZPS : xop2op256<0x80, "vfrczps", int_x86_xop_vfrcz_ps_256, loadv8f32,
-                           SchedWriteFRnd.YMM>;
+                           SchedWriteVFRCZ.YMM>;
 }
 
 let ExeDomain = SSEPackedDouble in {
   defm VFRCZSD : xop2opsld<0x83, "vfrczsd", int_x86_xop_vfrcz_sd,
-                           sdmem, sse_load_f64, SchedWriteFRnd.Scl>;
+                           sdmem, sse_load_f64, SchedWriteVFRCZ.Scl>;
   defm VFRCZPD : xop2op128<0x81, "vfrczpd", int_x86_xop_vfrcz_pd, loadv2f64,
-                           SchedWriteFRnd.XMM>;
+                           SchedWriteVFRCZ.XMM>;
   defm VFRCZPD : xop2op256<0x81, "vfrczpd", int_x86_xop_vfrcz_pd_256, loadv4f64,
-                           SchedWriteFRnd.YMM>;
+                           SchedWriteVFRCZ.YMM>;
 }
 
 multiclass xop3op<bits<8> opc, string OpcodeStr, SDNode OpNode,
                   ValueType vt128, X86FoldableSchedWrite sched> {
   def rr : IXOP<opc, MRMSrcReg4VOp3, (outs VR128:$dst),
            (ins VR128:$src1, VR128:$src2),
            !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
            [(set VR128:$dst,

lib/Target/X86/X86SchedBroadwell.td

 defm : BWWriteResPair<WriteDPPD,   [BWPort0,BWPort1,BWPort5],  9, [1,1,1], 3, 5>; // Floating point double dot product.
 defm : BWWriteResPair<WriteDPPS,   [BWPort0,BWPort1,BWPort5], 14, [2,1,1], 4, 5>; // Floating point single dot product.
 defm : BWWriteResPair<WriteDPPSY,  [BWPort0,BWPort1,BWPort5], 14, [2,1,1], 4, 6>; // Floating point single dot product (YMM).
 defm : X86WriteResPairUnsupported<WriteDPPSZ>;
 defm : BWWriteResPair<WriteFSign,     [BWPort5], 1>; // Floating point fabs/fchs.
 defm : X86WriteRes<WriteFRnd,            [BWPort23],  6, [1],   1>; // Floating point rounding.
 defm : X86WriteRes<WriteFRndY,           [BWPort23],  6, [1],   1>; // Floating point rounding (YMM/ZMM).
 defm : X86WriteResPairUnsupported<WriteFRndZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : X86WriteRes<WriteFRndLd,  [BWPort1,BWPort23], 11, [2,1], 3>;
 defm : X86WriteRes<WriteFRndYLd, [BWPort1,BWPort23], 12, [2,1], 3>;
 defm : BWWriteResPair<WriteFLogic,    [BWPort5], 1, [1], 1, 5>; // Floating point and/or/xor logicals.
 defm : BWWriteResPair<WriteFLogicY,   [BWPort5], 1, [1], 1, 6>; // Floating point and/or/xor logicals (YMM/ZMM).
 defm : X86WriteResPairUnsupported<WriteFLogicZ>;
 defm : BWWriteResPair<WriteFTest,     [BWPort0], 1, [1], 1, 5>; // Floating point TEST instructions.
 defm : BWWriteResPair<WriteFTestY,    [BWPort0], 1, [1], 1, 6>; // Floating point TEST instructions (YMM/ZMM).
 defm : X86WriteResPairUnsupported<WriteFTestZ>;

lib/Target/X86/X86SchedHaswell.td

 defm : HWWriteResPair<WriteDPPSZ, [HWPort0,HWPort1,HWPort5], 14, [2,1,1], 4, 7>; // Unsupported = 1
 defm : HWWriteResPair<WriteFSign,  [HWPort0], 1>;
 defm : X86WriteRes<WriteFRnd,            [HWPort23],  6, [1],   1>;
 defm : X86WriteRes<WriteFRndY,           [HWPort23],  6, [1],   1>;
 defm : X86WriteRes<WriteFRndZ,           [HWPort23],  6, [1],   1>; // Unsupported = 1
 defm : X86WriteRes<WriteFRndLd,  [HWPort1,HWPort23], 12, [2,1], 3>;
 defm : X86WriteRes<WriteFRndYLd, [HWPort1,HWPort23], 13, [2,1], 3>;
 defm : X86WriteRes<WriteFRndZLd, [HWPort1,HWPort23], 13, [2,1], 3>; // Unsupported = 1
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : HWWriteResPair<WriteFLogic,  [HWPort5], 1, [1], 1, 6>;
 defm : HWWriteResPair<WriteFLogicY, [HWPort5], 1, [1], 1, 7>;
 defm : HWWriteResPair<WriteFLogicZ, [HWPort5], 1, [1], 1, 7>; // Unsupported = 1
 defm : HWWriteResPair<WriteFTest,   [HWPort0], 1, [1], 1, 6>;
 defm : HWWriteResPair<WriteFTestY,  [HWPort0], 1, [1], 1, 7>;
 defm : HWWriteResPair<WriteFTestZ,  [HWPort0], 1, [1], 1, 7>; // Unsupported = 1
 defm : HWWriteResPair<WriteFShuffle,  [HWPort5], 1, [1], 1, 6>;
 defm : HWWriteResPair<WriteFShuffleY, [HWPort5], 1, [1], 1, 7>;

lib/Target/X86/X86SchedSandyBridge.td

 //=- X86SchedSandyBridge.td - X86 Sandy Bridge Scheduling ----*- tablegen -*-=//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines the machine model for Sandy Bridge to support instruction
 // scheduling and other instruction cost heuristics.
 //
 // Note that we define some instructions here that are not supported by SNB,
 // but we still have to define them because SNB is the default subtarget for
 // X86. These instructions are tagged with a comment `Unsupported = 1`.
 //
 //===----------------------------------------------------------------------===//
 
 def SandyBridgeModel : SchedMachineModel {
   // All x86 instructions are modeled as a single micro-op, and SB can decode 4
   // instructions per cycle.
   // FIXME: Identify instructions that aren't a single fused micro-op.
   let IssueWidth = 4;

 defm : SBWriteResPair<WriteDPPD,   [SBPort0,SBPort1,SBPort5],  9, [1,1,1], 3, 6>;
 defm : SBWriteResPair<WriteDPPS,   [SBPort0,SBPort1,SBPort5], 12, [1,2,1], 4, 6>;
 defm : SBWriteResPair<WriteDPPSY,  [SBPort0,SBPort1,SBPort5], 12, [1,2,1], 4, 7>;
 defm : SBWriteResPair<WriteDPPSZ,  [SBPort0,SBPort1,SBPort5], 12, [1,2,1], 4, 7>; // Unsupported = 1
 defm : SBWriteResPair<WriteFSign,    [SBPort5], 1>;
 defm : SBWriteResPair<WriteFRnd,     [SBPort1], 3, [1], 1, 6>;
 defm : SBWriteResPair<WriteFRndY,    [SBPort1], 3, [1], 1, 7>;
 defm : SBWriteResPair<WriteFRndZ,    [SBPort1], 3, [1], 1, 7>; // Unsupported = 1
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : SBWriteResPair<WriteFLogic,   [SBPort5], 1, [1], 1, 6>;
 defm : SBWriteResPair<WriteFLogicY,  [SBPort5], 1, [1], 1, 7>;
 defm : SBWriteResPair<WriteFLogicZ,  [SBPort5], 1, [1], 1, 7>; // Unsupported = 1
 defm : SBWriteResPair<WriteFTest,    [SBPort0], 1, [1], 1, 6>;
 defm : SBWriteResPair<WriteFTestY,   [SBPort0], 1, [1], 1, 7>;
 defm : SBWriteResPair<WriteFTestZ,   [SBPort0], 1, [1], 1, 7>; // Unsupported = 1
 defm : SBWriteResPair<WriteFShuffle, [SBPort5], 1, [1], 1, 6>;
 defm : SBWriteResPair<WriteFShuffleY,[SBPort5], 1, [1], 1, 7>;

lib/Target/X86/X86SchedSkylakeClient.td

 defm : SKLWriteResPair<WriteDPPD,   [SKLPort5,SKLPort01],  9, [1,2], 3, 6>; // Floating point double dot product.
 defm : SKLWriteResPair<WriteDPPS,   [SKLPort5,SKLPort01], 13, [1,3], 4, 6>;
 defm : SKLWriteResPair<WriteDPPSY,  [SKLPort5,SKLPort01], 13, [1,3], 4, 7>;
 defm : X86WriteResPairUnsupported<WriteDPPSZ>;
 defm : SKLWriteResPair<WriteFSign,   [SKLPort0], 1>; // Floating point fabs/fchs.
 defm : SKLWriteResPair<WriteFRnd,     [SKLPort01], 8, [2], 2, 6>; // Floating point rounding.
 defm : SKLWriteResPair<WriteFRndY,    [SKLPort01], 8, [2], 2, 7>;
 defm : X86WriteResPairUnsupported<WriteFRndZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : SKLWriteResPair<WriteFLogic,  [SKLPort015], 1, [1], 1, 6>; // Floating point and/or/xor logicals.
 defm : SKLWriteResPair<WriteFLogicY, [SKLPort015], 1, [1], 1, 7>;
 defm : X86WriteResPairUnsupported<WriteFLogicZ>;
 defm : SKLWriteResPair<WriteFTest,   [SKLPort0], 2, [1], 1, 6>; // Floating point TEST instructions.
 defm : SKLWriteResPair<WriteFTestY,  [SKLPort0], 2, [1], 1, 7>;
 defm : X86WriteResPairUnsupported<WriteFTestZ>;
 defm : SKLWriteResPair<WriteFShuffle,  [SKLPort5], 1, [1], 1, 6>; // Floating point vector shuffles.
 defm : SKLWriteResPair<WriteFShuffleY, [SKLPort5], 1, [1], 1, 7>;

lib/Target/X86/X86SchedSkylakeServer.td

 defm : SKXWriteResPair<WriteDPPD, [SKXPort5,SKXPort015],  9, [1,2], 3, 6>; // Floating point double dot product.
 defm : SKXWriteResPair<WriteDPPS, [SKXPort5,SKXPort015], 13, [1,3], 4, 6>;
 defm : SKXWriteResPair<WriteDPPSY,[SKXPort5,SKXPort015], 13, [1,3], 4, 7>;
 defm : SKXWriteResPair<WriteDPPSZ,[SKXPort5,SKXPort015], 13, [1,3], 4, 7>;
 defm : SKXWriteResPair<WriteFSign,  [SKXPort0],  1>; // Floating point fabs/fchs.
 defm : SKXWriteResPair<WriteFRnd,   [SKXPort01], 8, [2], 2, 6>; // Floating point rounding.
 defm : SKXWriteResPair<WriteFRndY,  [SKXPort01], 8, [2], 2, 7>;
 defm : SKXWriteResPair<WriteFRndZ,  [SKXPort05], 8, [2], 2, 7>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : SKXWriteResPair<WriteFLogic, [SKXPort015], 1, [1], 1, 6>; // Floating point and/or/xor logicals.
 defm : SKXWriteResPair<WriteFLogicY, [SKXPort015], 1, [1], 1, 7>;
 defm : SKXWriteResPair<WriteFLogicZ, [SKXPort05], 1, [1], 1, 7>;
 defm : SKXWriteResPair<WriteFTest,  [SKXPort0], 2, [1], 1, 6>; // Floating point TEST instructions.
 defm : SKXWriteResPair<WriteFTestY, [SKXPort0], 2, [1], 1, 7>;
 defm : SKXWriteResPair<WriteFTestZ, [SKXPort0], 2, [1], 1, 7>;
 defm : SKXWriteResPair<WriteFShuffle,  [SKXPort5], 1, [1], 1, 6>; // Floating point vector shuffles.
 defm : SKXWriteResPair<WriteFShuffleY, [SKXPort5], 1, [1], 1, 7>;

lib/Target/X86/X86Schedule.td

 defm WriteDPPD   : X86SchedWritePair; // Floating point double dot product.
 defm WriteDPPS   : X86SchedWritePair; // Floating point single dot product.
 defm WriteDPPSY  : X86SchedWritePair; // Floating point single dot product (YMM).
 defm WriteDPPSZ  : X86SchedWritePair; // Floating point single dot product (ZMM).
 defm WriteFSign  : X86SchedWritePair; // Floating point fabs/fchs.
 defm WriteFRnd   : X86SchedWritePair; // Floating point rounding.
 defm WriteFRndY  : X86SchedWritePair; // Floating point rounding (YMM).
 defm WriteFRndZ  : X86SchedWritePair; // Floating point rounding (ZMM).
+defm WriteVFRCZ   : X86SchedWritePair; // Floating point fraction extraction.
+defm WriteVFRCZY  : X86SchedWritePair; // Floating point fraction extraction (YMM).
+defm WriteVFRCZZ  : X86SchedWritePair; // Floating point fraction extraction (ZMM).
 defm WriteFLogic  : X86SchedWritePair; // Floating point and/or/xor logicals.
 defm WriteFLogicY : X86SchedWritePair; // Floating point and/or/xor logicals (YMM).
 defm WriteFLogicZ : X86SchedWritePair; // Floating point and/or/xor logicals (ZMM).
 defm WriteFTest   : X86SchedWritePair; // Floating point TEST instructions.
 defm WriteFTestY  : X86SchedWritePair; // Floating point TEST instructions (YMM).
 defm WriteFTestZ  : X86SchedWritePair; // Floating point TEST instructions (ZMM).
 defm WriteFShuffle  : X86SchedWritePair; // Floating point vector shuffles.
 defm WriteFShuffleY : X86SchedWritePair; // Floating point vector shuffles (YMM).

  : X86SchedWriteWidths<WriteFSqrt64, WriteFSqrt64X,
                        WriteFSqrt64Y, WriteFSqrt64Z>;
 def SchedWriteFRcp
  : X86SchedWriteWidths<WriteFRcp, WriteFRcpX, WriteFRcpY, WriteFRcpZ>;
 def SchedWriteFRsqrt
  : X86SchedWriteWidths<WriteFRsqrt, WriteFRsqrtX, WriteFRsqrtY, WriteFRsqrtZ>;
 def SchedWriteFRnd
  : X86SchedWriteWidths<WriteFRnd, WriteFRnd, WriteFRndY, WriteFRndZ>;
+def SchedWriteVFRCZ
+ : X86SchedWriteWidths<WriteVFRCZ, WriteVFRCZ, WriteVFRCZY, WriteVFRCZZ>;
 def SchedWriteFLogic
  : X86SchedWriteWidths<WriteFLogic, WriteFLogic, WriteFLogicY, WriteFLogicZ>;
 def SchedWriteFTest
  : X86SchedWriteWidths<WriteFTest, WriteFTest, WriteFTestY, WriteFTestZ>;
 
 def SchedWriteFShuffle
  : X86SchedWriteWidths<WriteFShuffle, WriteFShuffle,
                        WriteFShuffleY, WriteFShuffleZ>;

lib/Target/X86/X86ScheduleAtom.td

 defm : AtomWriteResPair<WriteFSqrt64X,      [AtomPort01], [AtomPort01],125,125,[125],[125]>;
 defm : X86WriteResPairUnsupported<WriteFSqrt64Y>;
 defm : X86WriteResPairUnsupported<WriteFSqrt64Z>;
 defm : AtomWriteResPair<WriteFSqrt80,       [AtomPort01], [AtomPort01], 71, 71, [71], [71]>;
 defm : AtomWriteResPair<WriteFSign,          [AtomPort1],  [AtomPort1]>;
 defm : AtomWriteResPair<WriteFRnd,           [AtomPort0],  [AtomPort0],  5,  5,  [5],  [5]>;
 defm : X86WriteResPairUnsupported<WriteFRndY>;
 defm : X86WriteResPairUnsupported<WriteFRndZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : AtomWriteResPair<WriteFLogic,        [AtomPort01],  [AtomPort0]>;
 defm : X86WriteResPairUnsupported<WriteFLogicY>;
 defm : X86WriteResPairUnsupported<WriteFLogicZ>;
 defm : AtomWriteResPair<WriteFTest,         [AtomPort01],  [AtomPort0]>;
 defm : X86WriteResPairUnsupported<WriteFTestY>;
 defm : X86WriteResPairUnsupported<WriteFTestZ>;
 defm : AtomWriteResPair<WriteFShuffle,       [AtomPort0],  [AtomPort0]>;
 defm : X86WriteResPairUnsupported<WriteFShuffleY>;

lib/Target/X86/X86ScheduleBtVer2.td

 defm : JWriteResFpuPair<WriteFSqrt64X,     [JFPU1, JFPM], 27, [1, 27]>;
 defm : JWriteResYMMPair<WriteFSqrt64Y,     [JFPU1, JFPM], 54, [2, 54], 2>;
 defm : X86WriteResPairUnsupported<WriteFSqrt64Z>;
 defm : JWriteResFpuPair<WriteFSqrt80,      [JFPU1, JFPM], 35, [1, 35]>;
 defm : JWriteResFpuPair<WriteFSign,        [JFPU1, JFPM],  2>;
 defm : JWriteResFpuPair<WriteFRnd,         [JFPU1, JSTC],  3>;
 defm : JWriteResYMMPair<WriteFRndY,        [JFPU1, JSTC],  3, [2,2], 2>;
 defm : X86WriteResPairUnsupported<WriteFRndZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : JWriteResFpuPair<WriteFLogic,      [JFPU01, JFPX],  1>;
 defm : JWriteResYMMPair<WriteFLogicY,     [JFPU01, JFPX],  1, [2, 2], 2>;
 defm : X86WriteResPairUnsupported<WriteFLogicZ>;
 defm : JWriteResFpuPair<WriteFTest,       [JFPU0, JFPA, JALU0], 3>;
 defm : JWriteResYMMPair<WriteFTestY ,     [JFPU01, JFPX, JFPA, JALU0], 4, [2, 2, 2, 1], 3>;
 defm : X86WriteResPairUnsupported<WriteFTestZ>;
 defm : JWriteResFpuPair<WriteFShuffle,    [JFPU01, JFPX],  1>;
 defm : JWriteResYMMPair<WriteFShuffleY,   [JFPU01, JFPX],  1, [2, 2], 2>;

lib/Target/X86/X86ScheduleSLM.td

 defm : SLMWriteResPair<WriteDPPD,   [SLM_FPC_RSV1], 3>;
 defm : SLMWriteResPair<WriteDPPS,   [SLM_FPC_RSV1], 3>;
 defm : SLMWriteResPair<WriteDPPSY,  [SLM_FPC_RSV1], 3>;
 defm : X86WriteResPairUnsupported<WriteDPPSZ>;
 defm : SLMWriteResPair<WriteFSign,  [SLM_FPC_RSV01], 1>;
 defm : SLMWriteResPair<WriteFRnd,   [SLM_FPC_RSV1], 3>;
 defm : SLMWriteResPair<WriteFRndY,  [SLM_FPC_RSV1], 3>;
 defm : X86WriteResPairUnsupported<WriteFRndZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : SLMWriteResPair<WriteFLogic, [SLM_FPC_RSV01], 1>;
 defm : SLMWriteResPair<WriteFLogicY, [SLM_FPC_RSV01], 1>;
 defm : X86WriteResPairUnsupported<WriteFLogicZ>;
 defm : SLMWriteResPair<WriteFTest,  [SLM_FPC_RSV01], 1>;
 defm : SLMWriteResPair<WriteFTestY, [SLM_FPC_RSV01], 1>;
 defm : X86WriteResPairUnsupported<WriteFTestZ>;
 defm : SLMWriteResPair<WriteFShuffle,  [SLM_FPC_RSV0], 1>;
 defm : SLMWriteResPair<WriteFShuffleY, [SLM_FPC_RSV0], 1>;

lib/Target/X86/X86ScheduleZnver1.td

 defm : ZnWriteResFpuPair<WriteFDiv64,    [ZnFPU3], 15>;
 defm : ZnWriteResFpuPair<WriteFDiv64X,   [ZnFPU3], 15>;
 //defm : ZnWriteResFpuPair<WriteFDiv64Y,   [ZnFPU3], 15>;
 defm : X86WriteResPairUnsupported<WriteFDiv64Z>;
 defm : ZnWriteResFpuPair<WriteFSign,     [ZnFPU3],  2>;
 defm : ZnWriteResFpuPair<WriteFRnd,      [ZnFPU3],  4, [1], 1, 7, 1>; // FIXME: Should folds require 1 extra uops?
 defm : ZnWriteResFpuPair<WriteFRndY,     [ZnFPU3],  4, [1], 1, 7, 1>; // FIXME: Should folds require 1 extra uops?
 defm : X86WriteResPairUnsupported<WriteFRndZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZ>;
+defm : X86WriteResPairUnsupported<WriteVFRCZY>;
+defm : X86WriteResPairUnsupported<WriteVFRCZZ>;
 defm : ZnWriteResFpuPair<WriteFLogic,    [ZnFPU],   1>;
 defm : ZnWriteResFpuPair<WriteFLogicY,   [ZnFPU],   1>;
 defm : X86WriteResPairUnsupported<WriteFLogicZ>;
 defm : ZnWriteResFpuPair<WriteFTest,     [ZnFPU],   1>;
 defm : ZnWriteResFpuPair<WriteFTestY,    [ZnFPU],   1>;
 defm : X86WriteResPairUnsupported<WriteFTestZ>;
 defm : ZnWriteResFpuPair<WriteFShuffle,  [ZnFPU12], 1>;
 defm : ZnWriteResFpuPair<WriteFShuffleY, [ZnFPU12], 1>;

test/CodeGen/X86/xop-schedule.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+xop | FileCheck %s --check-prefix=GENERIC
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER2
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver3 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER3
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver4 | FileCheck %s --check-prefix=BDVER --check-prefix=BDVER4
 
 define void @test_vfrczpd(<2 x double> %a0, <4 x double> %a1, <2 x double> *%a2, <4 x double> *%a3) {
 ; GENERIC-LABEL: test_vfrczpd:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
-; GENERIC-NEXT:    vfrczpd %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT:    vfrczpd %ymm1, %ymm1 # sched: [3:1.00]
-; GENERIC-NEXT:    vfrczpd (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT:    vfrczpd (%rsi), %ymm1 # sched: [10:1.00]
+; GENERIC-NEXT:    vfrczpd %xmm0, %xmm0 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczpd %ymm1, %ymm1 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczpd (%rdi), %xmm0 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczpd (%rsi), %ymm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    #NO_APP
 ; GENERIC-NEXT:    vzeroupper # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; BDVER-LABEL: test_vfrczpd:
 ; BDVER:       # %bb.0:
 ; BDVER-NEXT:    #APP
 ; BDVER-NEXT:    vfrczpd %xmm0, %xmm0
 ; BDVER-NEXT:    vfrczpd %ymm1, %ymm1
 ; BDVER-NEXT:    vfrczpd (%rdi), %xmm0
 ; BDVER-NEXT:    vfrczpd (%rsi), %ymm1
 ; BDVER-NEXT:    #NO_APP
 ; BDVER-NEXT:    vzeroupper
 ; BDVER-NEXT:    retq
   call void asm sideeffect "vfrczpd $0, $0 \0a\09 vfrczpd $1, $1 \0a\09 vfrczpd $2, $0 \0a\09 vfrczpd $3, $1", "x,x,*m,*m"(<2 x double> %a0, <4 x double> %a1, <2 x double> *%a2, <4 x double> *%a3)
   ret void
 }
 
 define void @test_vfrczps(<4 x float> %a0, <4 x double> %a1, <4 x float> *%a2, <4 x double> *%a3) {
 ; GENERIC-LABEL: test_vfrczps:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
-; GENERIC-NEXT:    vfrczps %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT:    vfrczps %ymm1, %ymm1 # sched: [3:1.00]
-; GENERIC-NEXT:    vfrczps (%rdi), %xmm0 # sched: [9:1.00]
-; GENERIC-NEXT:    vfrczps (%rsi), %ymm1 # sched: [10:1.00]
+; GENERIC-NEXT:    vfrczps %xmm0, %xmm0 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczps %ymm1, %ymm1 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczps (%rdi), %xmm0 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczps (%rsi), %ymm1 # sched: [0:0.25]
 ; GENERIC-NEXT:    #NO_APP
 ; GENERIC-NEXT:    vzeroupper # sched: [100:0.33]
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; BDVER-LABEL: test_vfrczps:
 ; BDVER:       # %bb.0:
 ; BDVER-NEXT:    #APP
 ; BDVER-NEXT:    vfrczps %xmm0, %xmm0
 ; BDVER-NEXT:    vfrczps %ymm1, %ymm1
 ; BDVER-NEXT:    vfrczps (%rdi), %xmm0
 ; BDVER-NEXT:    vfrczps (%rsi), %ymm1
 ; BDVER-NEXT:    #NO_APP
 ; BDVER-NEXT:    vzeroupper
 ; BDVER-NEXT:    retq
   call void asm sideeffect "vfrczps $0, $0 \0a\09 vfrczps $1, $1 \0a\09 vfrczps $2, $0 \0a\09 vfrczps $3, $1", "x,x,*m,*m"(<4 x float> %a0, <4 x double> %a1, <4 x float> *%a2, <4 x double> *%a3)
   ret void
 }
 
 define void @test_vfrczsd(<2 x double> %a0, <2 x double> *%a1) {
 ; GENERIC-LABEL: test_vfrczsd:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
-; GENERIC-NEXT:    vfrczsd %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT:    vfrczsd (%rdi), %xmm0 # sched: [9:1.00]
+; GENERIC-NEXT:    vfrczsd %xmm0, %xmm0 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczsd (%rdi), %xmm0 # sched: [0:0.25]
 ; GENERIC-NEXT:    #NO_APP
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; BDVER-LABEL: test_vfrczsd:
 ; BDVER:       # %bb.0:
 ; BDVER-NEXT:    #APP
 ; BDVER-NEXT:    vfrczsd %xmm0, %xmm0
 ; BDVER-NEXT:    vfrczsd (%rdi), %xmm0
 ; BDVER-NEXT:    #NO_APP
 ; BDVER-NEXT:    retq
   call void asm sideeffect "vfrczsd $0, $0 \0a\09 vfrczsd $1, $0", "x,*m"(<2 x double> %a0, <2 x double> *%a1)
   ret void
 }
 
 define void @test_vfrczss(<4 x float> %a0, <4 x double> *%a1) {
 ; GENERIC-LABEL: test_vfrczss:
 ; GENERIC:       # %bb.0:
 ; GENERIC-NEXT:    #APP
-; GENERIC-NEXT:    vfrczss %xmm0, %xmm0 # sched: [3:1.00]
-; GENERIC-NEXT:    vfrczss (%rdi), %xmm0 # sched: [9:1.00]
+; GENERIC-NEXT:    vfrczss %xmm0, %xmm0 # sched: [0:0.25]
+; GENERIC-NEXT:    vfrczss (%rdi), %xmm0 # sched: [0:0.25]
 ; GENERIC-NEXT:    #NO_APP
 ; GENERIC-NEXT:    retq # sched: [1:1.00]
 ;
 ; BDVER-LABEL: test_vfrczss:
 ; BDVER:       # %bb.0:
 ; BDVER-NEXT:    #APP
 ; BDVER-NEXT:    vfrczss %xmm0, %xmm0
 ; BDVER-NEXT:    vfrczss (%rdi), %xmm0

test/tools/llvm-mca/X86/Generic/resources-xop.s

-# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
-# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
+# It seems we can't actually run this test using generic cpu, since these are XOP instructions, and the generic cpu does not support them.
+# -R-U-N-: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
+
+# Dummy run-line to keep everything working:
+# RUN: not FileCheck %s
 
 vfrczpd %xmm0, %xmm3
 vfrczpd (%rax), %xmm3
 
 vfrczpd %ymm0, %ymm3
 vfrczpd (%rax), %ymm3
 
 vfrczps %xmm0, %xmm3

 
 vpshlq %xmm0, %xmm1, %xmm3
 vpshlq (%rax), %xmm0, %xmm3
 vpshlq %xmm0, (%rax), %xmm3
 
 vpshlw %xmm0, %xmm1, %xmm3
 vpshlw (%rax), %xmm0, %xmm3
 vpshlw %xmm0, (%rax), %xmm3
-
-# CHECK:      Instruction Info:
-# CHECK-NEXT: [1]: #uOps
-# CHECK-NEXT: [2]: Latency
-# CHECK-NEXT: [3]: RThroughput
-# CHECK-NEXT: [4]: MayLoad
-# CHECK-NEXT: [5]: MayStore
-# CHECK-NEXT: [6]: HasSideEffects (U)
-
-# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
-# CHECK-NEXT:  1      3     1.00                        vfrczpd %xmm0, %xmm3
-# CHECK-NEXT:  2      9     1.00    *                   vfrczpd (%rax), %xmm3
-# CHECK-NEXT:  1      3     1.00                        vfrczpd %ymm0, %ymm3
-# CHECK-NEXT:  2      10    1.00    *                   vfrczpd (%rax), %ymm3
-# CHECK-NEXT:  1      3     1.00                        vfrczps %xmm0, %xmm3
-# CHECK-NEXT:  2      9     1.00    *                   vfrczps (%rax), %xmm3
-# CHECK-NEXT:  1      3     1.00                        vfrczps %ymm0, %ymm3
-# CHECK-NEXT:  2      10    1.00    *                   vfrczps (%rax), %ymm3
-# CHECK-NEXT:  1      3     1.00                        vfrczsd %xmm0, %xmm3
-# CHECK-NEXT:  2      9     1.00    *                   vfrczsd (%rax), %xmm3
-# CHECK-NEXT:  1      3     1.00                        vfrczss %xmm0, %xmm3
-# CHECK-NEXT:  2      9     1.00    *                   vfrczss (%rax), %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcmov  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcmov  (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcmov  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpcmov  %ymm0, %ymm1, %ymm2, %ymm3
-# CHECK-NEXT:  2      8     1.00    *                   vpcmov  (%rax), %ymm0, %ymm1, %ymm3
-# CHECK-NEXT:  2      8     1.00    *                   vpcmov  %ymm0, (%rax), %ymm1, %ymm3
-# CHECK-NEXT:  1      1     0.50                        vpcomb  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomb  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomd  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomd  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomq  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomq  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomub $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomub $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomud $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomud $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomuq $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomuq $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomuw $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomuw $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpcomw  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpcomw  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpermil2pd  $0, %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpermil2pd  $0, (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpermil2pd  $0, %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpermil2pd  $0, %ymm0, %ymm1, %ymm2, %ymm3
-# CHECK-NEXT:  2      8     1.00    *                   vpermil2pd  $0, (%rax), %ymm0, %ymm1, %ymm3
-# CHECK-NEXT:  2      8     1.00    *                   vpermil2pd  $0, %ymm0, (%rax), %ymm1, %ymm3
-# CHECK-NEXT:  1      1     1.00                        vpermil2ps  $0, %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpermil2ps  $0, (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpermil2ps  $0, %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpermil2ps  $0, %ymm0, %ymm1, %ymm2, %ymm3
-# CHECK-NEXT:  2      8     1.00    *                   vpermil2ps  $0, (%rax), %ymm0, %ymm1, %ymm3
-# CHECK-NEXT:  2      8     1.00    *                   vpermil2ps  $0, %ymm0, (%rax), %ymm1, %ymm3
-# CHECK-NEXT:  3      3     1.50                        vphaddbd  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddbd  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddbq  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddbq  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddbw  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddbw  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphadddq  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphadddq  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddubd %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddubd (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddubq %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddubq (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddubw %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddubw (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddudq %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddudq (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphadduwd %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphadduwd (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphadduwq %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphadduwq (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddwd  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddwd  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphaddwq  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphaddwq  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphsubbw  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphsubbw  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphsubdq  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphsubdq  (%rax), %xmm3
-# CHECK-NEXT:  3      3     1.50                        vphsubwd  %xmm0, %xmm3
-# CHECK-NEXT:  4      9     1.50    *                   vphsubwd  (%rax), %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacsdd  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacsdd  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacsdqh %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacsdqh %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacsdql %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacsdql %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacssdd %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacssdd %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacssdqh  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacssdqh  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacssdql  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacssdql  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacsswd %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacsswd %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacssww %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacssww %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacswd  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacswd  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmacsww  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmacsww  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmadcsswd  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmadcsswd  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      5     1.00                        vpmadcswd %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      11    1.00    *                   vpmadcswd %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      1     0.50                        vpperm  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpperm  (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     0.50    *                   vpperm  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotb  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotb  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotb  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotb  $0, %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotb  $0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotd  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotd  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotd  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotd  $0, %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotd  $0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotq  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotq  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotq  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotq  $0, %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotq  $0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotw  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotw  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotw  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vprotw  $0, %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vprotw  $0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshab  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshab  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshab  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshad  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshad  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshad  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshaq  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshaq  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshaq  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshaw  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshaw  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshaw  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshlb  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshlb  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshlb  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshld  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshld  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshld  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshlq  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshlq  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshlq  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  1      1     1.00                        vpshlw  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshlw  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  2      7     1.00    *                   vpshlw  %xmm0, (%rax), %xmm3
-
-# CHECK:      Resources:
-# CHECK-NEXT: [0]   - SBDivider
-# CHECK-NEXT: [1]   - SBFPDivider
-# CHECK-NEXT: [2]   - SBPort0
-# CHECK-NEXT: [3]   - SBPort1
-# CHECK-NEXT: [4]   - SBPort4
-# CHECK-NEXT: [5]   - SBPort5
-# CHECK-NEXT: [6.0] - SBPort23
-# CHECK-NEXT: [6.1] - SBPort23
-
-# CHECK:      Resource pressure per iteration:
-# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]
-# CHECK-NEXT:  -      -     68.00  68.00   -     71.00  41.50  41.50
-
-# CHECK:      Resource pressure by instruction:
-# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczpd %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -     0.50   0.50   vfrczpd (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczpd %ymm0, %ymm3
-# CHECK-NEXT:  -      -      -     1.00    -      -     0.50   0.50   vfrczpd (%rax), %ymm3
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczps %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -     0.50   0.50   vfrczps (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczps %ymm0, %ymm3
-# CHECK-NEXT:  -      -      -     1.00    -      -     0.50   0.50   vfrczps (%rax), %ymm3
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczsd %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -     0.50   0.50   vfrczsd (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczss %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.00    -      -     0.50   0.50   vfrczss (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcmov  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcmov  (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcmov  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vpcmov  %ymm0, %ymm1, %ymm2, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpcmov  (%rax), %ymm0, %ymm1, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpcmov  %ymm0, (%rax), %ymm1, %ymm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomb  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomb  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomd  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomd  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomq  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomq  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomub $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomub $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomud $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomud $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomuq $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomuq $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomuw $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomuw $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpcomw  $0, %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpcomw  $0, (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vpermil2pd  $0, %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2pd  $0, (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2pd  $0, %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vpermil2pd  $0, %ymm0, %ymm1, %ymm2, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2pd  $0, (%rax), %ymm0, %ymm1, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2pd  $0, %ymm0, (%rax), %ymm1, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vpermil2ps  $0, %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2ps  $0, (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2ps  $0, %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     vpermil2ps  $0, %ymm0, %ymm1, %ymm2, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2ps  $0, (%rax), %ymm0, %ymm1, %ymm3
-# CHECK-NEXT:  -      -      -      -      -     1.00   0.50   0.50   vpermil2ps  $0, %ymm0, (%rax), %ymm1, %ymm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddbd  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddbd  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddbq  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddbq  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddbw  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddbw  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphadddq  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphadddq  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddubd %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddubd (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddubq %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddubq (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddubw %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddubw (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddudq %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddudq (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphadduwd %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphadduwd (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphadduwq %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphadduwq (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddwd  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddwd  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphaddwq  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphaddwq  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphsubbw  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphsubbw  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphsubdq  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphsubdq  (%rax), %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50    -      -     vphsubwd  %xmm0, %xmm3
-# CHECK-NEXT:  -      -      -     1.50    -     1.50   0.50   0.50   vphsubwd  (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacsdd  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacsdd  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacsdqh %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacsdqh %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacsdql %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacsdql %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacssdd %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacssdd %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacssdqh  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacssdqh  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacssdql  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacssdql  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacsswd %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacsswd %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacssww %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacssww %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacswd  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacswd  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmacsww  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmacsww  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmadcsswd  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmadcsswd  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpmadcswd %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpmadcswd %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50    -      -     vpperm  %xmm0, %xmm1, %xmm2, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpperm  (%rax), %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -      -     0.50    -     0.50   0.50   0.50   vpperm  %xmm0, (%rax), %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotb  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotb  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotb  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotb  $0, %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotb  $0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotd  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotd  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotd  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotd  $0, %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotd  $0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotq  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotq  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotq  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotq  $0, %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotq  $0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotw  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotw  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotw  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vprotw  $0, %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vprotw  $0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshab  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshab  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshab  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshad  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshad  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshad  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshaq  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshaq  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshaq  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshaw  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshaw  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshaw  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshlb  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshlb  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshlb  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshld  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshld  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshld  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshlq  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshlq  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshlq  %xmm0, (%rax), %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vpshlw  %xmm0, %xmm1, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshlw  (%rax), %xmm0, %xmm3
-# CHECK-NEXT:  -      -     1.00    -      -      -     0.50   0.50   vpshlw  %xmm0, (%rax), %xmm3

test/tools/llvm-mca/X86/Generic/xop-super-registers-1.s

 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -timeline -timeline-max-iterations=2 < %s | FileCheck %s
 
-  vmulps  %ymm0, %ymm1, %ymm2
-  vfrczpd %xmm1, %xmm2
-  vmulps  %ymm2, %ymm3, %ymm4
-  vaddps  %ymm4, %ymm5, %ymm6
-  vmulps  %ymm6, %ymm3, %ymm4
-  vaddps  %ymm4, %ymm5, %ymm0
+  vmulps   %ymm0, %ymm1, %ymm2
+  vphaddbd %xmm1, %xmm2
+  vmulps   %ymm2, %ymm3, %ymm4
+  vaddps   %ymm4, %ymm5, %ymm6
+  vmulps   %ymm6, %ymm3, %ymm4
+  vaddps   %ymm4, %ymm5, %ymm0
 
 # CHECK:      Iterations:        100
 # CHECK-NEXT: Instructions:      600
-# CHECK-NEXT: Total Cycles:      318
-# CHECK-NEXT: Total uOps:        600
+# CHECK-NEXT: Total Cycles:      322
+# CHECK-NEXT: Total uOps:        800
 
 # CHECK:      Dispatch Width:    4
-# CHECK-NEXT: uOps Per Cycle:    1.89
-# CHECK-NEXT: IPC:               1.89
+# CHECK-NEXT: uOps Per Cycle:    2.48
+# CHECK-NEXT: IPC:               1.86
 # CHECK-NEXT: Block RThroughput: 3.0
 
 # CHECK:      Instruction Info:
 # CHECK-NEXT: [1]: #uOps
 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      5     1.00                        vmulps  %ymm0, %ymm1, %ymm2
-# CHECK-NEXT:  1      3     1.00                        vfrczpd %xmm1, %xmm2
+# CHECK-NEXT:  3      3     1.50                        vphaddbd  %xmm1, %xmm2
 # CHECK-NEXT:  1      5     1.00                        vmulps  %ymm2, %ymm3, %ymm4
 # CHECK-NEXT:  1      3     1.00                        vaddps  %ymm4, %ymm5, %ymm6
 # CHECK-NEXT:  1      5     1.00                        vmulps  %ymm6, %ymm3, %ymm4
 # CHECK-NEXT:  1      3     1.00                        vaddps  %ymm4, %ymm5, %ymm0
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SBDivider
 # CHECK-NEXT: [1]   - SBFPDivider
 # CHECK-NEXT: [2]   - SBPort0
 # CHECK-NEXT: [3]   - SBPort1
 # CHECK-NEXT: [4]   - SBPort4
 # CHECK-NEXT: [5]   - SBPort5
 # CHECK-NEXT: [6.0] - SBPort23
 # CHECK-NEXT: [6.1] - SBPort23
 
 # CHECK:      Resource pressure per iteration:
 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]
-# CHECK-NEXT:  -      -     3.00   3.00    -      -      -      -
+# CHECK-NEXT:  -      -     3.00   2.51    -     2.49    -      -
 
 # CHECK:      Resource pressure by instruction:
 # CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vmulps  %ymm0, %ymm1, %ymm2
-# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vfrczpd %xmm1, %xmm2
+# CHECK-NEXT:  -      -      -     0.51    -     2.49    -      -     vphaddbd  %xmm1, %xmm2
 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vmulps  %ymm2, %ymm3, %ymm4
 # CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vaddps  %ymm4, %ymm5, %ymm6
 # CHECK-NEXT:  -      -     1.00    -      -      -      -      -     vmulps  %ymm6, %ymm3, %ymm4
 # CHECK-NEXT:  -      -      -     1.00    -      -      -      -     vaddps  %ymm4, %ymm5, %ymm0
 
 # CHECK:      Timeline view:
 # CHECK-NEXT:                     0123456789
-# CHECK-NEXT: Index     0123456789          0123456
+# CHECK-NEXT: Index     0123456789          01234567
 
-# CHECK:      [0,0]     DeeeeeER  .    .    .    ..   vmulps  %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: [0,1]     DeeeE--R  .    .    .    ..   vfrczpd %xmm1, %xmm2
-# CHECK-NEXT: [0,2]     D===eeeeeER    .    .    ..   vmulps  %ymm2, %ymm3, %ymm4
-# CHECK-NEXT: [0,3]     D========eeeER .    .    ..   vaddps  %ymm4, %ymm5, %ymm6
-# CHECK-NEXT: [0,4]     .D==========eeeeeER .    ..   vmulps  %ymm6, %ymm3, %ymm4
-# CHECK-NEXT: [0,5]     .D===============eeeER   ..   vaddps  %ymm4, %ymm5, %ymm0
-# CHECK-NEXT: [1,0]     .D==================eeeeeER   vmulps  %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: [1,1]     .DeeeE--------------------R   vfrczpd %xmm1, %xmm2
-# CHECK-NEXT: [1,2]     . D==eeeeeE---------------R   vmulps  %ymm2, %ymm3, %ymm4
-# CHECK-NEXT: [1,3]     . D=======eeeE------------R   vaddps  %ymm4, %ymm5, %ymm6
-# CHECK-NEXT: [1,4]     . D==========eeeeeE-------R   vmulps  %ymm6, %ymm3, %ymm4
-# CHECK-NEXT: [1,5]     . D===============eeeE----R   vaddps  %ymm4, %ymm5, %ymm0
+# CHECK:      [0,0]     DeeeeeER  .    .    .    . .   vmulps %ymm0, %ymm1, %ymm2
+# CHECK-NEXT: [0,1]     DeeeE--R  .    .    .    . .   vphaddbd %xmm1, %xmm2
+# CHECK-NEXT: [0,2]     .D==eeeeeER    .    .    . .   vmulps %ymm2, %ymm3, %ymm4
+# CHECK-NEXT: [0,3]     .D========eeeER.    .    . .   vaddps %ymm4, %ymm5, %ymm6
+# CHECK-NEXT: [0,4]     .D===========eeeeeER.    . .   vmulps %ymm6, %ymm3, %ymm4
+# CHECK-NEXT: [0,5]     .D================eeeER  . .   vaddps %ymm4, %ymm5, %ymm0
+# CHECK-NEXT: [1,0]     . D==================eeeeeER   vmulps %ymm0, %ymm1, %ymm2
+# CHECK-NEXT: [1,1]     . DeeeE--------------------R   vphaddbd %xmm1, %xmm2
+# CHECK-NEXT: [1,2]     .  D==eeeeeE---------------R   vmulps %ymm2, %ymm3, %ymm4
+# CHECK-NEXT: [1,3]     .  D=======eeeE------------R   vaddps %ymm4, %ymm5, %ymm6
+# CHECK-NEXT: [1,4]     .  D==========eeeeeE-------R   vmulps %ymm6, %ymm3, %ymm4
+# CHECK-NEXT: [1,5]     .  D===============eeeE----R   vaddps %ymm4, %ymm5, %ymm0
 
 # CHECK:      Average Wait times (based on the timeline view):
 # CHECK-NEXT: [0]: Executions
 # CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
 # CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
 
 # CHECK:            [0]    [1]    [2]    [3]
 # CHECK-NEXT: 0.     2     10.0   0.5    0.0       vmulps %ymm0, %ymm1, %ymm2
-# CHECK-NEXT: 1.     2     1.0    1.0    11.0      vfrczpd  %xmm1, %xmm2
-# CHECK-NEXT: 2.     2     3.5    0.0    7.5       vmulps %ymm2, %ymm3, %ymm4
-# CHECK-NEXT: 3.     2     8.5    0.0    6.0       vaddps %ymm4, %ymm5, %ymm6
-# CHECK-NEXT: 4.     2     11.0   0.0    3.5       vmulps %ymm6, %ymm3, %ymm4
-# CHECK-NEXT: 5.     2     16.0   0.0    2.0       vaddps %ymm4, %ymm5, %ymm0
+# CHECK-NEXT: 1.     2     1.0    1.0    11.0      vphaddbd %xmm1, %xmm2
+# CHECK-NEXT: 2.     2     3.0    0.0    7.5       vmulps %ymm2, %ymm3, %ymm4
+# CHECK-NEXT: 3.     2     8.5    0.5    6.0       vaddps %ymm4, %ymm5, %ymm6
+# CHECK-NEXT: 4.     2     11.5   0.0    3.5       vmulps %ymm6, %ymm3, %ymm4
+# CHECK-NEXT: 5.     2     16.5   0.0    2.0       vaddps %ymm4, %ymm5, %ymm0