Add R_HEX_16_X relocation

[sidneym]

Summary

This relocation has only 6 effective bits the rest are in the extender.

[sidneym]

Updated the testcase to reflect the fact this relocation only has 6 effective bits.

[sidneym]

This is just a rebase.

[sidneym]

If this patch looks ok I'd like to commit it.

Thanks,

[sidneym]

Drop mask for R_HEX_32.

[ruiu]

LGTM

ELF/Arch/Hexagon.cpp

   return 0x00001fe0;
 }
 
+static uint32_t findMaskR16(uint32_t Insn) {
+  if ((0xff000000 & Insn) == 0x48000000)
+    return 0x061f20ff;
+  if ((0xff000000 & Insn) == 0x49000000)
+    return 0x061f3fe0;
+  if ((0xff000000 & Insn) == 0x78000000)
+    return 0x00df3fe0;
+  if ((0xff000000 & Insn) == 0xb0000000)
+    return 0x0fe03fe0;
+
+  error("unrecognized instruction for R_HEX_16_X relocation: 0x" +
+        utohexstr(Insn));
+  return 0;
+}
+
 static void or32le(uint8_t *P, int32_t V) { write32le(P, read32le(P) | V); }
 
 void Hexagon::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {

   case R_HEX_12_X:
     or32le(Loc, applyMask(0x000007e0, Val));
     break;
+  case R_HEX_16_X:  // This reloc only has 6 effective bits.
+    or32le(Loc, applyMask(findMaskR16(read32le(Loc)), Val & 0x3f));
+    break;
   case R_HEX_32_6_X:
     or32le(Loc, applyMask(0x0fff3fff, Val >> 6));
     break;

test/ELF/hexagon.s

 # The rest:
 r1:0=combine(r2,##_start);
 # CHECK: 7302e000     r1:0 = combine(r2,##69632) }
+
+# R_HEX_16_X has 4 relocation mask variations
+# 0x48000000
+memw(##_start) = r0
+# CHECK: 4880c000   memw(##69632) = r0 }
+
+# 0x49000000
+r0 = memw(##_start)
+# CHECK: 4980c000   r0 = memw(##69632)
+
+# 0x78000000
+r0 = ##_start
+# CHECK: 7800c000   r0 = ##69632 }
+
+# 0xb0000000
+r0 = add(r1, ##_start)
+# CHECK: b001c000   r0 = add(r1,##69632) }