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[AArch64][SVE] Asm: Support for ADR instruction.
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Authored by sdesmalen on Jul 3 2018, 2:42 AM.

Details

Summary

Supporting various addressing modes:

  • adr z0.s, [z0.s, z0.s]
  • adr z0.s, [z0.s, z0.s, lsl #<shift>]
  • adr z0.d, [z0.d, z0.d]
  • adr z0.d, [z0.d, z0.d, lsl #<shift>]
  • adr z0.d, [z0.d, z0.d, uxtw #<shift>]
  • adr z0.d, [z0.d, z0.d, sxtw #<shift>]

Diff Detail

Event Timeline

sdesmalen created this revision.Jul 3 2018, 2:42 AM
SjoerdMeijer accepted this revision.Jul 6 2018, 5:40 AM

Looks OK to me.

This revision is now accepted and ready to land.Jul 6 2018, 5:40 AM
This revision was automatically updated to reflect the committed changes.