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[AArch64][SVE] Asm: Support for INC/DEC (scalar) instructions.
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Authored by sdesmalen on Jun 4 2018, 6:36 AM.

Details

Summary

Increment/decrement scalar register by (scaled) element count given by
predicate pattern, e.g. 'incw x0, all, mul #4'.

Diff Detail

Event Timeline

sdesmalen created this revision.Jun 4 2018, 6:36 AM
SjoerdMeijer accepted this revision.Jun 8 2018, 6:16 AM

Looks OK to me.

test/MC/AArch64/SVE/decb.s
118

I think you had a similar discussion with Florian about testing ranges of immediates in one of the other patches.
Looks like your checking all values between:

decb x0, #14
...
decb x0, #28

I certainly don't mind, but was just wondering if there's an added value (perhaps I am missing something).

test/MC/AArch64/SVE/decd.s
118

Same here, and in the other variants.

This revision is now accepted and ready to land.Jun 8 2018, 6:16 AM
sdesmalen added inline comments.Jun 15 2018, 7:14 AM
test/MC/AArch64/SVE/decb.s
118

Yes, that's a fair point, I can probably cut this down a bit by just testing the boundaries (#14 and #28) for most variants, and just let one variant (e.g. incb) test all of them. I'll make that change before I commit.

This revision was automatically updated to reflect the committed changes.