[Target][NFC] Simplify `AssemblerPredicate`.

[courbet]

Summary

AssemblerPredicate details are currently leaking in Predicate.
TableGen objects can derive from multiple classes, and tablegen supports
querying for the exact type, so there is no need for this boolean.

Also add a check that SubtargetFeatureInfo records have the right
type (Predicate or AssemblerPredicate) when generating the code.

[dsanders]

lib/Target/Mips/MipsInstrInfo.td

238–239

UseTCCInDiv is purely an assembler feature. It controls the expansion of the div macro and has no bearing on CodeGen. It doesn't make sense to implement it for CodeGen.

The reason it has a variable in MipsSubtarget is because tablegen incorrectly generates an assignment to it in MipsSubtarget::ParseSubtargetFeatures() and it didn't seem worth it to stop it from doing that.

[courbet]

Revert Mips change.

[courbet]

lib/Target/Mips/MipsInstrInfo.td

238–239

OK, I've moved the type checking from SubtargetFeatureInfo::SubtargetFeatureInfo to the emitter function, and reverted the Mips change.

[courbet]

ping

include/llvm/Target/Target.td

class PseudoInstExpansion<dag Result> {
   bit isPseudo = 1;
 }
 
 /// Predicates - These are extra conditionals which are turned into instruction
 /// selector matching code. Currently each predicate is just a string.
 class Predicate<string cond> {
   string CondString = cond;
 
-  /// AssemblerMatcherPredicate - If this feature can be used by the assembler
-  /// matcher, this is true.  Targets should set this by inheriting their
-  /// feature from the AssemblerPredicate class in addition to Predicate.
-  bit AssemblerMatcherPredicate = 0;
-
-  /// AssemblerCondString - Name of the subtarget feature being tested used
-  /// as alternative condition string used for assembler matcher.
-  /// e.g. "ModeThumb" is translated to "(Bits & ModeThumb) != 0".
-  ///      "!ModeThumb" is translated to "(Bits & ModeThumb) == 0".
-  /// It can also list multiple features separated by ",".
-  /// e.g. "ModeThumb,FeatureThumb2" is translated to
-  ///      "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
-  string AssemblerCondString = "";
-
   /// PredicateName - User-level name to use for the predicate. Mainly for use
   /// in diagnostics such as missing feature errors in the asm matcher.
   string PredicateName = "";
 
   /// Setting this to '1' indicates that the predicate must be recomputed on
   /// every function change. Most predicates can leave this at '0'.
   ///
   /// Ignored by SelectionDAG, it always recomputes the predicate on every use.
class AsmParserVariant {
   // BreakCharacters - Characters that start new identifiers
   string BreakCharacters = "";
 }
 def DefaultAsmParserVariant : AsmParserVariant;
 
 /// AssemblerPredicate - This is a Predicate that can be used when the assembler
 /// matches instructions and aliases.
 class AssemblerPredicate<string cond, string name = ""> {
-  bit AssemblerMatcherPredicate = 1;
+  /// AssemblerCondString - Name of the subtarget feature being tested used as
+  /// alternative condition string used for assembler matcher.
+  /// e.g. "ModeThumb" is translated to "(Bits & ModeThumb) != 0".
+  ///      "!ModeThumb" is translated to "(Bits & ModeThumb) == 0".
+  /// It can also list multiple features separated by ",".
+  /// e.g. "ModeThumb,FeatureThumb2" is translated to
+  ///      "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
   string AssemblerCondString = cond;
+
   string PredicateName = name;
 }
 
 /// TokenAlias - This class allows targets to define assembler token
 /// operand aliases. That is, a token literal operand which is equivalent
 /// to another, canonical, token literal. For example, ARM allows:
 ///   vmov.u32 s4, #0  -> vmov.i32, #0
 /// 'u32' is a more specific designator for the 32-bit integer type specifier

lib/Target/Mips/MipsInstrInfo.td

 def NotDSP :          Predicate<"!Subtarget->hasDSP()">;
 def InMicroMips    :  Predicate<"Subtarget->inMicroMipsMode()">,
                       AssemblerPredicate<"FeatureMicroMips">;
 def NotInMicroMips :  Predicate<"!Subtarget->inMicroMipsMode()">,
                       AssemblerPredicate<"!FeatureMicroMips">;
 def IsLE           :  Predicate<"Subtarget->isLittle()">;
 def IsBE           :  Predicate<"!Subtarget->isLittle()">;
 def IsNotNaCl    :    Predicate<"!Subtarget->isTargetNaCl()">;
-def UseTCCInDIV    :  AssemblerPredicate<"FeatureUseTCCInDIV">;
+def UseTCCInDIV    :  Predicate<"Subtarget->useTCCInDIV()">,
+                      AssemblerPredicate<"FeatureUseTCCInDIV">;
 def HasEVA       :    Predicate<"Subtarget->hasEVA()">,
                       AssemblerPredicate<"FeatureEVA">;
 def HasMSA : Predicate<"Subtarget->hasMSA()">,
              AssemblerPredicate<"FeatureMSA">;
 def HasMadd4 : Predicate<"!Subtarget->disableMadd4()">,
                AssemblerPredicate<"!FeatureMadd4">;
 def HasMT  : Predicate<"Subtarget->hasMT()">,
              AssemblerPredicate<"FeatureMT">;

lib/Target/Mips/MipsSubtarget.h

bool inMips16HardFloat() const {
     return inMips16Mode() && InMips16HardFloat;
   }
   bool inMicroMipsMode() const { return InMicroMipsMode; }
   bool inMicroMips32r6Mode() const { return InMicroMipsMode && hasMips32r6(); }
   bool hasDSP() const { return HasDSP; }
   bool hasDSPR2() const { return HasDSPR2; }
   bool hasDSPR3() const { return HasDSPR3; }
   bool hasMSA() const { return HasMSA; }
+  bool useTCCInDIV() const { return UseTCCInDIV; }
   bool disableMadd4() const { return DisableMadd4; }
   bool hasEVA() const { return HasEVA; }
   bool hasMT() const { return HasMT; }
   bool hasCRC() const { return HasCRC; }
   bool hasVirt() const { return HasVirt; }
   bool hasGINV() const { return HasGINV; }
   bool useIndirectJumpsHazard() const {
     return UseIndirectJumpsHazard && hasMips32r2();

utils/TableGen/AsmWriterEmitter.cpp

for (auto &Alias : Aliases.second) {
 
       StringRef Namespace = Target.getName();
       std::vector<Record *> ReqFeatures;
       if (PassSubtarget) {
         // We only consider ReqFeatures predicates if PassSubtarget
         std::vector<Record *> RF =
             CGA.TheDef->getValueAsListOfDefs("Predicates");
         copy_if(RF, std::back_inserter(ReqFeatures), [](Record *R) {
-          return R->getValueAsBit("AssemblerMatcherPredicate");
+          return R->isSubClassOf("AssemblerPredicate");
         });
       }
 
       unsigned NumMIOps = 0;
       for (auto &ResultInstOpnd : CGA.ResultInst->Operands)
         NumMIOps += ResultInstOpnd.MINumOperands;
 
       std::string Cond;
else {
 
     for (unsigned i = 0; i < PrintMethods.size(); ++i) {
       O << "  case " << i << ":\n"
         << "    " << PrintMethods[i] << "(MI, OpIdx, "
         << (PassSubtarget ? "STI, " : "") << "OS);\n"
         << "    break;\n";
     }
     O << "  }\n";
-  }    
+  }
   O << "}\n\n";
 
   if (!MCOpPredicates.empty()) {
     O << "static bool " << Target.getName() << ClassName
       << "ValidateMCOperand(const MCOperand &MCOp,\n"
       << "                  const MCSubtargetInfo &STI,\n"
-      << "                  unsigned PredicateIndex) {\n"      
+      << "                  unsigned PredicateIndex) {\n"
       << "  switch (PredicateIndex) {\n"
       << "  default:\n"
       << "    llvm_unreachable(\"Unknown MCOperandPredicate kind\");\n"
       << "    break;\n";
 
     for (unsigned i = 0; i < MCOpPredicates.size(); ++i) {
       Init *MCOpPred = MCOpPredicates[i]->getValueInit("MCOperandPredicate");
       if (CodeInit *SI = dyn_cast<CodeInit>(MCOpPred)) {

utils/TableGen/FixedLenDecoderEmitter.cpp

 
 bool FilterChooser::emitPredicateMatch(raw_ostream &o, unsigned &Indentation,
                                        unsigned Opc) const {
   ListInit *Predicates =
     AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
   bool IsFirstEmission = true;
   for (unsigned i = 0; i < Predicates->size(); ++i) {
     Record *Pred = Predicates->getElementAsRecord(i);
-    if (!Pred->getValue("AssemblerMatcherPredicate"))
+    if (!Pred->isSubClassOf("AssemblerPredicate"))
       continue;
 
     StringRef P = Pred->getValueAsString("AssemblerCondString");
 
     if (P.empty())
       continue;
 
     if (!IsFirstEmission)
bool FilterChooser::emitPredicateMatch(raw_ostream &o, unsigned &Indentation,
   return !Predicates->empty();
 }
 
 bool FilterChooser::doesOpcodeNeedPredicate(unsigned Opc) const {
   ListInit *Predicates =
     AllInstructions[Opc]->TheDef->getValueAsListInit("Predicates");
   for (unsigned i = 0; i < Predicates->size(); ++i) {
     Record *Pred = Predicates->getElementAsRecord(i);
-    if (!Pred->getValue("AssemblerMatcherPredicate"))
+    if (!Pred->isSubClassOf("AssemblerPredicate"))
       continue;
 
     StringRef P = Pred->getValueAsString("AssemblerCondString");
 
     if (P.empty())
       continue;
 
     return true;

utils/TableGen/RISCVCompressInstEmitter.cpp

createDagOperandMapping(Rec, SourceOperands, DestOperands, SourceDag, DestDag,
                           SourceOperandMap);
   // Create operand mapping between the source and destination instructions.
   createInstOperandMapping(Rec, SourceDag, DestDag, SourceOperandMap,
                            DestOperandMap, SourceOperands, DestInst);
 
   // Get the target features for the CompressPat.
   std::vector<Record *> PatReqFeatures;
   std::vector<Record *> RF = Rec->getValueAsListOfDefs("Predicates");
-  copy_if(RF, std::back_inserter(PatReqFeatures), [](Record *R) {
-    return R->getValueAsBit("AssemblerMatcherPredicate");
-  });
+  copy_if(RF, std::back_inserter(PatReqFeatures),
+          [](Record *R) { return R->isSubClassOf("AssemblerPredicate"); });
 
   CompressPatterns.push_back(CompressPat(SourceInst, DestInst, PatReqFeatures,
                                          SourceOperandMap, DestOperandMap));
 }
 
 static void getReqFeatures(std::map<StringRef, int> &FeaturesMap,
                            const std::vector<Record *> &ReqFeatures) {
   for (auto &R : ReqFeatures) {
for (auto &CompressPat : CompressPatterns) {
 
     std::map<StringRef, int> FeaturesMap;
     // Add CompressPat required features.
     getReqFeatures(FeaturesMap, CompressPat.PatReqFeatures);
 
     // Add Dest instruction required features.
     std::vector<Record *> ReqFeatures;
     std::vector<Record *> RF = Dest.TheDef->getValueAsListOfDefs("Predicates");
-    copy_if(RF, std::back_inserter(ReqFeatures), [](Record *R) {
-      return R->getValueAsBit("AssemblerMatcherPredicate");
-    });
+    copy_if(RF, std::back_inserter(ReqFeatures),
+            [](Record *R) { return R->isSubClassOf("AssemblerPredicate"); });
     getReqFeatures(FeaturesMap, ReqFeatures);
 
     // Emit checks for all required features.
     for (auto &F : FeaturesMap) {
       StringRef Op = F.first;
       if (Op[0] == '!')
         CondStream.indent(6) << ("!STI.getFeatureBits()[" + Namespace +
                                  "::" + Op.substr(1) + "]")

utils/TableGen/SubtargetFeatureInfo.h

 /// participates in instruction matching.
 struct SubtargetFeatureInfo {
   /// The predicate record for this feature.
   Record *TheDef;
 
   /// An unique index assigned to represent this feature.
   uint64_t Index;
 
-  SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {}
+  SubtargetFeatureInfo(Record *D, uint64_t Idx) : TheDef(D), Index(Idx) {
+    if (!TheDef->isSubClassOf("Predicate")) {
+      PrintFatalError(TheDef->getLoc(),
+                      TheDef->getName().str() + " must be a Predicate");
+    }
+  }
 
   /// The name of the enumerated constant identifying this feature.
   std::string getEnumName() const {
     return "Feature_" + TheDef->getName().str();
   }
 
   /// The name of the enumerated constant identifying the bitnumber for
   /// this feature.

utils/TableGen/SubtargetFeatureInfo.cpp

 LLVM_DUMP_METHOD void SubtargetFeatureInfo::dump() const {
   errs() << getEnumName() << " " << Index << "\n" << *TheDef;
 }
 #endif
 
 std::vector<std::pair<Record *, SubtargetFeatureInfo>>
 SubtargetFeatureInfo::getAll(const RecordKeeper &Records) {
   std::vector<std::pair<Record *, SubtargetFeatureInfo>> SubtargetFeatures;
-  std::vector<Record *> AllPredicates =
-      Records.getAllDerivedDefinitions("Predicate");
-  for (Record *Pred : AllPredicates) {
-    // Ignore predicates that are not intended for the assembler.
-    //
-    // The "AssemblerMatcherPredicate" string should be promoted to an argument
-    // if we re-use the machinery for non-assembler purposes in future.
-    if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
-      continue;
-
+  std::vector<Record *> AllAssemblerPredicates =
+      Records.getAllDerivedDefinitions("AssemblerPredicate");
+  for (Record *Pred : AllAssemblerPredicates) {
     if (Pred->getName().empty())
       PrintFatalError(Pred->getLoc(), "Predicate has no name!");
 
     SubtargetFeatures.emplace_back(
         Pred, SubtargetFeatureInfo(Pred, SubtargetFeatures.size()));
   }
   return SubtargetFeatures;
 }