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[CodeGen] Always update divergence in SelectionDAG::UpdateNodeOperands
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Authored by scott.linder on May 21 2018, 9:40 AM.

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Summary

Only one overload of SelectionDAG::UpdateNodeOperands was modified to update divergence information in https://reviews.llvm.org/D35267 which leads to IsDivergent bits becoming stale, and so verification passes failing with an assert.

The test case is as simple as I could manage while still triggering the bug; redundant instructions are needed to get the correct combining/legalizing to call the right overloads.

Diff Detail

Repository
rL LLVM

Event Timeline

scott.linder created this revision.May 21 2018, 9:40 AM
arsenm added inline comments.May 23 2018, 2:05 AM
test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
1 ↗(On Diff #147797)

Needs to check something

scott.linder added inline comments.May 23 2018, 8:10 AM
test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
1 ↗(On Diff #147797)

I am not sure what to check; currently it just triggers the assert, so it is a noop in non-assert builds.

The bug does not show up in the divergence analysis itself, so opt -analyze -divergence is not enough.

Ping

I am still not certain how to improve the test, but I think this is a fairly straightforward patch

alex-t added a comment.Jun 4 2018, 3:24 AM

My apologies for the delay. Thanks for handling this. LGTM.

alex-t accepted this revision.Jun 4 2018, 3:25 AM
This revision is now accepted and ready to land.Jun 4 2018, 3:25 AM
This revision was automatically updated to reflect the committed changes.