[PowerPC, AsmParser] Enable the mnemonic spell corrector.

[Quolyk]

Summary

Motivation: https://bugs.llvm.org/show_bug.cgi?id=34087

[nemanjai]

This is pretty cool. Thanks for implementing it.
I am not familiar with this code so I don't want to approve the patch, but the functionality that the test case shows is pretty cool.

Also, will this provide any diagnostics/suggestions for inline assembly? If so, it would be good to add that test case as well.

[sdardis]

test/MC/PowerPC/invalid-instructions-spellcheck.s

1 ↗

(On Diff #124557)

You can drop -show-encoding from the invocation of llvm-mc, as you're not checking the instruction encodings.

[Quolyk]

In D40552#939138, @nemanjai wrote:

This is pretty cool. Thanks for implementing it.
I am not familiar with this code so I don't want to approve the patch, but the functionality that the test case shows is pretty cool.

Also, will this provide any diagnostics/suggestions for inline assembly? If so, it would be good to add that test case as well.

IFAIK, this wil not provide any diagnostics/suggestions for inline assembly.

[Quolyk]

Deleted -show-encoding from test

[hfinkel]

LGTM

Do you have commit access?

[Quolyk]

In D40552#955994, @hfinkel wrote:

LGTM

Do you have commit access?

I don't, please commit.

llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp

public:
   void operator delete(void *p) { ::operator delete(p); }
 
   /// getStartLoc - Get the location of the first token of this operand.
   SMLoc getStartLoc() const override { return StartLoc; }
 
   /// getEndLoc - Get the location of the last token of this operand.
   SMLoc getEndLoc() const override { return EndLoc; }
 
+  /// getLocRange - Get the range between the first and last token of this
+  /// operand.
+  SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); }
+
   /// isPPC64 - True if this operand is for an instruction in 64-bit mode.
   bool isPPC64() const { return IsPPC64; }
 
   int64_t getImm() const {
     assert(Kind == Immediate && "Invalid access!");
     return Imm.Val;
   }
   int64_t getImmS16Context() const {
case PPC::CP_PASTE_LAST: {
     TmpInst.addOperand(MCOperand::createImm(Opcode == PPC::CP_PASTEx ? 0 : 1));
 
     Inst = TmpInst;
     break;
   }
   }
 }
 
+static std::string PPCMnemonicSpellCheck(StringRef S, uint64_t FBS,
+                                         unsigned VariantID = 0);
+
 bool PPCAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
                                            OperandVector &Operands,
                                            MCStreamer &Out, uint64_t &ErrorInfo,
                                            bool MatchingInlineAsm) {
   MCInst Inst;
 
   switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm)) {
   case Match_Success:
     // Post-process instructions (typically extended mnemonics)
     ProcessInstruction(Inst, Operands);
     Inst.setLoc(IDLoc);
     Out.EmitInstruction(Inst, getSTI());
     return false;
   case Match_MissingFeature:
     return Error(IDLoc, "instruction use requires an option to be enabled");
-  case Match_MnemonicFail:
-    return Error(IDLoc, "unrecognized instruction mnemonic");
+  case Match_MnemonicFail: {
+    uint64_t FBS = ComputeAvailableFeatures(getSTI().getFeatureBits());
+    std::string Suggestion = PPCMnemonicSpellCheck(
+        ((PPCOperand &)*Operands[0]).getToken(), FBS);
+    return Error(IDLoc, "invalid instruction" + Suggestion,
+                 ((PPCOperand &)*Operands[0]).getLocRange());
+  }
   case Match_InvalidOperand: {
     SMLoc ErrorLoc = IDLoc;
     if (ErrorInfo != ~0ULL) {
       if (ErrorInfo >= Operands.size())
         return Error(IDLoc, "too few operands for instruction");
 
       ErrorLoc = ((PPCOperand &)*Operands[ErrorInfo]).getStartLoc();
       if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;

 extern "C" void LLVMInitializePowerPCAsmParser() {
   RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
   RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
   RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());
 }
 
 #define GET_REGISTER_MATCHER
 #define GET_MATCHER_IMPLEMENTATION
+#define GET_MNEMONIC_SPELL_CHECKER
 #include "PPCGenAsmMatcher.inc"
 
 // Define this matcher function after the auto-generated include so we
 // have the match class enum definitions.
 unsigned PPCAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
                                                   unsigned Kind) {
   // If the kind is a token for a literal immediate, check if our asm
   // operand matches. This is for InstAliases which have a fixed-value

llvm/trunk/test/MC/PowerPC/invalid-instructions-spellcheck.s

+# RUN: not llvm-mc -triple powerpc-unknown-unknown < %s 2>&1 | FileCheck %s
+
+# This tests the mnemonic spell checker.
+
+# First check what happens when an instruction is omitted:
+
+%r1, %r2, %r3
+
+# CHECK:      error: unexpected token at start of statement
+# CHECK-NEXT: %r1, %r2, %r3
+# CHECK-NEXT:   ^
+
+# We don't want to see a suggestion here; the edit distance is too large to
+# give sensible suggestions:
+
+aaaaaaaaaaaaaaa %r1, %r2, %r3
+
+# CHECK:      error: invalid instruction
+# CHECK-NEXT: aaaaaaaaaaaaaaa %r1, %r2, %r3
+# CHECK-NEXT: ^
+
+# Check that we get one suggestion: 'vmaxfpg' is 1 edit away, i.e. an deletion.
+
+vmaxfpg %r1, %r2
+
+# CHECK:      error: invalid instruction, did you mean: vmaxfp?
+# CHECK-NEXT: vmaxfpg %r1, %r2
+# CHECK-NEXT: ^
+
+# Check edit distance 1 and 2, just insertions:
+
+xsnmsubad %r1, %r2
+
+# CHECK:      error: invalid instruction, did you mean: xsmsubadp, xsnmsubadp?
+# CHECK-NEXT: xsnmsubad %r1, %r2
+# CHECK-NEXT: ^
+
+# Check an instruction that is 2 edits away, and also has a lot of candidates:
+
+adXd %r1, %r2, %r3
+
+# CHECK:      error: invalid instruction, did you mean: add, addc, adde, addi, fadd?
+# CHECK-NEXT: adXd %r1, %r2, %r3
+# CHECK-NEXT: ^