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Differential D39792

[AArch64][SVE] Asm: More concise test format
ClosedPublic

Authored by sdesmalen on Nov 8 2017, 4:24 AM.

Details

Reviewers
rengolin
asb
fhahn
Commits
rG0f4075e0b12a: [AArch64][SVE] Asm: More concise test format
rL317894: [AArch64][SVE] Asm: More concise test format
Summary

Change the test format for SVE assembler/disassembler tests to be less verbose and have both tests in the same file.

The tests check the following:

  • All instructions are assembled correctly into the right encoding.
  • All instructions are disassembled correctly (into the preferred assembly format)
  • Without -mattr=+sve the instructions are not assembled.
  • Without -mattr=+sve the instructions are not disassembled.

This patch also adds several negative tests for SVE add/sub.

Diff Detail

Repository
rL LLVM

Event Timeline

sdesmalen created this revision.Nov 8 2017, 4:24 AM
Herald added subscribers: kristof.beyls, tschuett, javed.absar, aemerson. · View Herald TranscriptNov 8 2017, 4:24 AM
fhahn edited edge metadata.Nov 8 2017, 4:36 AM

Thanks Sander, it looks like you incorporated the suggestions from D39091 and I think with the new format it is much easier to see what's going on!

That being said, it seems like we do not test passing invalid operands to SVE instructions (with +sve), , i.e. all assembler instructions are valid SVE instructions. We should also have tests with invalid operands, e.g. sub z99.s, z0.s, z0.s, sub z0.X, z0.X, z0.X, sub z0.s, z0.h, z0.d, sub x0, z0.h, z0.h.

rengolin edited edge metadata.Nov 8 2017, 4:42 AM

Much better indeed! I agree with Florian on the additional "bad arguments" tests. Thanks!

asb edited edge metadata.Nov 8 2017, 4:44 AM

This looks good to me. Tests for invalid operands etc as Florian suggests are definitely worth having. ARM, Mips and RISCV tend to add this in test files prefixed or suffixed with invalid, e.g. add-invalid.s or sve-invalid.s. AArch64 seems to use a diagnostics suffix.

sdesmalen added a comment.Nov 8 2017, 5:09 AM

Thanks for the quick feedback all! Indeed, negative testing is important. Most of the instructions that I'm planning to add we have a separate set of negative tests. This includes ADD|SUB, although the current set of negative tests currently addresses other cases like e.g. out-of-bound immediates, not yet exercised by the unpredicated add/sub from my previous patch. I'll see if I can update the negative-test generator to include the cases mentioned by Florian.

sdesmalen updated this revision to Diff 122408.Nov 10 2017, 2:48 AM
sdesmalen edited the summary of this revision. (Show Details)

Added negative tests.

sdesmalen added a comment.Nov 10 2017, 2:57 AM

One of the negative tests actually exposed a bug where the same diagnostic is produced several times (it does this because it is unmatched for each register operand class, rather than bail out with a parse failure when z31.x is given). I have a fix for that, but will address it in a separate patch so not to complicate this patch.

fhahn accepted this revision.Nov 10 2017, 3:02 AM

LGTM, thanks. It might be worth to add a case where GPRs and vector registers are passed. Please wait a bit with committing, to give people a chance to raise additional comments.

This revision is now accepted and ready to land.Nov 10 2017, 3:02 AM
rengolin accepted this revision.Nov 10 2017, 3:16 AM
In D39792#921624, @sdesmalen wrote:

One of the negative tests actually exposed a bug where the same diagnostic is produced several times (it does this because it is unmatched for each register operand class, rather than bail out with a parse failure when z31.x is given). I have a fix for that, but will address it in a separate patch so not to complicate this patch.

Excellent! :)

I agree the fix is better at a different patch. LGTM, thanks!

sdesmalen added a child revision: D39894: [AArch64][SVE] Asm: Report SVE parsing diagnostics only once.Nov 10 2017, 3:30 AM

Thanks! FYI, I've created the other patch here: https://reviews.llvm.org/D39894

sdesmalen updated this revision to Diff 122438.Nov 10 2017, 8:03 AM

I had accidentally changed one of the diagnostic messages in the negative tests, causing the two tests to fail. This is now fixed and the tests all pass.

Closed by commit rL317894: [AArch64][SVE] Asm: More concise test format (authored by fhahn). · Explain WhyNov 10 2017, 8:25 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
test/
MC/
AArch64/
SVE/
16 lines
104 lines
assembler_tests/
66 lines
66 lines
disassembler_tests/
50 lines
50 lines
16 lines
104 lines

Diff 122443

llvm/trunk/test/MC/AArch64/SVE/add-diagnostics.s

// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// Register z32 does not exist.
add z22.h, z10.h, z32.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: add z22.h, z10.h, z32.h
// Invalid element kind.
add z20.h, z2.h, z31.x
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid sve vector kind qualifier
// CHECK-NEXT: add z20.h, z2.h, z31.x
// Element size specifiers should match.
add z27.h, z11.h, z27.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: add z27.h, z11.h, z27.b

llvm/trunk/test/MC/AArch64/SVE/add.s

// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
add z31.s, z31.s, z31.s
// CHECK-INST: add z31.s, z31.s, z31.s
// CHECK-ENCODING: [0xff,0x03,0xbf,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 03 bf 04 <unknown>
add z23.d, z13.d, z8.d
// CHECK-INST: add z23.d, z13.d, z8.d
// CHECK-ENCODING: [0xb7,0x01,0xe8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 01 e8 04 <unknown>
add z0.s, z0.s, z0.s
// CHECK-INST: add z0.s, z0.s, z0.s
// CHECK-ENCODING: [0x00,0x00,0xa0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 00 a0 04 <unknown>
add z31.d, z31.d, z31.d
// CHECK-INST: add z31.d, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x03,0xff,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 03 ff 04 <unknown>
add z21.b, z10.b, z21.b
// CHECK-INST: add z21.b, z10.b, z21.b
// CHECK-ENCODING: [0x55,0x01,0x35,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 01 35 04 <unknown>
add z31.b, z31.b, z31.b
// CHECK-INST: add z31.b, z31.b, z31.b
// CHECK-ENCODING: [0xff,0x03,0x3f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 03 3f 04 <unknown>
add z0.h, z0.h, z0.h
// CHECK-INST: add z0.h, z0.h, z0.h
// CHECK-ENCODING: [0x00,0x00,0x60,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 00 60 04 <unknown>
add z23.b, z13.b, z8.b
// CHECK-INST: add z23.b, z13.b, z8.b
// CHECK-ENCODING: [0xb7,0x01,0x28,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 01 28 04 <unknown>
add z0.d, z0.d, z0.d
// CHECK-INST: add z0.d, z0.d, z0.d
// CHECK-ENCODING: [0x00,0x00,0xe0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 00 e0 04 <unknown>
add z31.h, z31.h, z31.h
// CHECK-INST: add z31.h, z31.h, z31.h
// CHECK-ENCODING: [0xff,0x03,0x7f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 03 7f 04 <unknown>
add z0.b, z0.b, z0.b
// CHECK-INST: add z0.b, z0.b, z0.b
// CHECK-ENCODING: [0x00,0x00,0x20,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 00 20 04 <unknown>
add z21.d, z10.d, z21.d
// CHECK-INST: add z21.d, z10.d, z21.d
// CHECK-ENCODING: [0x55,0x01,0xf5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 01 f5 04 <unknown>
add z21.h, z10.h, z21.h
// CHECK-INST: add z21.h, z10.h, z21.h
// CHECK-ENCODING: [0x55,0x01,0x75,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 01 75 04 <unknown>
add z21.s, z10.s, z21.s
// CHECK-INST: add z21.s, z10.s, z21.s
// CHECK-ENCODING: [0x55,0x01,0xb5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 01 b5 04 <unknown>
add z23.h, z13.h, z8.h
// CHECK-INST: add z23.h, z13.h, z8.h
// CHECK-ENCODING: [0xb7,0x01,0x68,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 01 68 04 <unknown>
add z23.s, z13.s, z8.s
// CHECK-INST: add z23.s, z13.s, z8.s
// CHECK-ENCODING: [0xb7,0x01,0xa8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 01 a8 04 <unknown>

llvm/trunk/test/MC/AArch64/SVE/assembler_tests/add.s

// RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve < %s | FileCheck %s
// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s
add z31.s, z31.s, z31.s // 00000100-10111111-00000011-11111111
// CHECK: add z31.s, z31.s, z31.s // encoding: [0xff,0x03,0xbf,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10111111-00000011-11111111
add z23.d, z13.d, z8.d // 00000100-11101000-00000001-10110111
// CHECK: add z23.d, z13.d, z8.d // encoding: [0xb7,0x01,0xe8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11101000-00000001-10110111
add z0.s, z0.s, z0.s // 00000100-10100000-00000000-00000000
// CHECK: add z0.s, z0.s, z0.s // encoding: [0x00,0x00,0xa0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10100000-00000000-00000000
add z31.d, z31.d, z31.d // 00000100-11111111-00000011-11111111
// CHECK: add z31.d, z31.d, z31.d // encoding: [0xff,0x03,0xff,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11111111-00000011-11111111
add z21.b, z10.b, z21.b // 00000100-00110101-00000001-01010101
// CHECK: add z21.b, z10.b, z21.b // encoding: [0x55,0x01,0x35,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00110101-00000001-01010101
add z31.b, z31.b, z31.b // 00000100-00111111-00000011-11111111
// CHECK: add z31.b, z31.b, z31.b // encoding: [0xff,0x03,0x3f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00111111-00000011-11111111
add z0.h, z0.h, z0.h // 00000100-01100000-00000000-00000000
// CHECK: add z0.h, z0.h, z0.h // encoding: [0x00,0x00,0x60,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01100000-00000000-00000000
add z23.b, z13.b, z8.b // 00000100-00101000-00000001-10110111
// CHECK: add z23.b, z13.b, z8.b // encoding: [0xb7,0x01,0x28,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00101000-00000001-10110111
add z0.d, z0.d, z0.d // 00000100-11100000-00000000-00000000
// CHECK: add z0.d, z0.d, z0.d // encoding: [0x00,0x00,0xe0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11100000-00000000-00000000
add z31.h, z31.h, z31.h // 00000100-01111111-00000011-11111111
// CHECK: add z31.h, z31.h, z31.h // encoding: [0xff,0x03,0x7f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01111111-00000011-11111111
add z0.b, z0.b, z0.b // 00000100-00100000-00000000-00000000
// CHECK: add z0.b, z0.b, z0.b // encoding: [0x00,0x00,0x20,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00100000-00000000-00000000
add z21.d, z10.d, z21.d // 00000100-11110101-00000001-01010101
// CHECK: add z21.d, z10.d, z21.d // encoding: [0x55,0x01,0xf5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11110101-00000001-01010101
add z21.h, z10.h, z21.h // 00000100-01110101-00000001-01010101
// CHECK: add z21.h, z10.h, z21.h // encoding: [0x55,0x01,0x75,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01110101-00000001-01010101
add z21.s, z10.s, z21.s // 00000100-10110101-00000001-01010101
// CHECK: add z21.s, z10.s, z21.s // encoding: [0x55,0x01,0xb5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10110101-00000001-01010101
add z23.h, z13.h, z8.h // 00000100-01101000-00000001-10110111
// CHECK: add z23.h, z13.h, z8.h // encoding: [0xb7,0x01,0x68,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01101000-00000001-10110111
add z23.s, z13.s, z8.s // 00000100-10101000-00000001-10110111
// CHECK: add z23.s, z13.s, z8.s // encoding: [0xb7,0x01,0xa8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10101000-00000001-10110111

llvm/trunk/test/MC/AArch64/SVE/assembler_tests/sub.s

// RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=+sve < %s | FileCheck %s
// RUN: not llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s
sub z0.h, z0.h, z0.h // 00000100-01100000-00000100-00000000
// CHECK: sub z0.h, z0.h, z0.h // encoding: [0x00,0x04,0x60,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01100000-00000100-00000000
sub z21.b, z10.b, z21.b // 00000100-00110101-00000101-01010101
// CHECK: sub z21.b, z10.b, z21.b // encoding: [0x55,0x05,0x35,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00110101-00000101-01010101
sub z31.h, z31.h, z31.h // 00000100-01111111-00000111-11111111
// CHECK: sub z31.h, z31.h, z31.h // encoding: [0xff,0x07,0x7f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01111111-00000111-11111111
sub z21.h, z10.h, z21.h // 00000100-01110101-00000101-01010101
// CHECK: sub z21.h, z10.h, z21.h // encoding: [0x55,0x05,0x75,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01110101-00000101-01010101
sub z31.b, z31.b, z31.b // 00000100-00111111-00000111-11111111
// CHECK: sub z31.b, z31.b, z31.b // encoding: [0xff,0x07,0x3f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00111111-00000111-11111111
sub z0.s, z0.s, z0.s // 00000100-10100000-00000100-00000000
// CHECK: sub z0.s, z0.s, z0.s // encoding: [0x00,0x04,0xa0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10100000-00000100-00000000
sub z23.b, z13.b, z8.b // 00000100-00101000-00000101-10110111
// CHECK: sub z23.b, z13.b, z8.b // encoding: [0xb7,0x05,0x28,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00101000-00000101-10110111
sub z21.d, z10.d, z21.d // 00000100-11110101-00000101-01010101
// CHECK: sub z21.d, z10.d, z21.d // encoding: [0x55,0x05,0xf5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11110101-00000101-01010101
sub z21.s, z10.s, z21.s // 00000100-10110101-00000101-01010101
// CHECK: sub z21.s, z10.s, z21.s // encoding: [0x55,0x05,0xb5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10110101-00000101-01010101
sub z0.b, z0.b, z0.b // 00000100-00100000-00000100-00000000
// CHECK: sub z0.b, z0.b, z0.b // encoding: [0x00,0x04,0x20,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-00100000-00000100-00000000
sub z23.d, z13.d, z8.d // 00000100-11101000-00000101-10110111
// CHECK: sub z23.d, z13.d, z8.d // encoding: [0xb7,0x05,0xe8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11101000-00000101-10110111
sub z23.s, z13.s, z8.s // 00000100-10101000-00000101-10110111
// CHECK: sub z23.s, z13.s, z8.s // encoding: [0xb7,0x05,0xa8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10101000-00000101-10110111
sub z31.d, z31.d, z31.d // 00000100-11111111-00000111-11111111
// CHECK: sub z31.d, z31.d, z31.d // encoding: [0xff,0x07,0xff,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11111111-00000111-11111111
sub z23.h, z13.h, z8.h // 00000100-01101000-00000101-10110111
// CHECK: sub z23.h, z13.h, z8.h // encoding: [0xb7,0x05,0x68,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-01101000-00000101-10110111
sub z0.d, z0.d, z0.d // 00000100-11100000-00000100-00000000
// CHECK: sub z0.d, z0.d, z0.d // encoding: [0x00,0x04,0xe0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-11100000-00000100-00000000
sub z31.s, z31.s, z31.s // 00000100-10111111-00000111-11111111
// CHECK: sub z31.s, z31.s, z31.s // encoding: [0xff,0x07,0xbf,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-ERROR-NEXT: 00000100-10111111-00000111-11111111

llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/add.s

# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=+sve < %s | FileCheck %s
# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s
0xff,0x03,0xbf,0x04
# CHECK: add z31.s, z31.s, z31.s // encoding: [0xff,0x03,0xbf,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x01,0xe8,0x04
# CHECK: add z23.d, z13.d, z8.d // encoding: [0xb7,0x01,0xe8,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x00,0xa0,0x04
# CHECK: add z0.s, z0.s, z0.s // encoding: [0x00,0x00,0xa0,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x03,0xff,0x04
# CHECK: add z31.d, z31.d, z31.d // encoding: [0xff,0x03,0xff,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x01,0x35,0x04
# CHECK: add z21.b, z10.b, z21.b // encoding: [0x55,0x01,0x35,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x03,0x3f,0x04
# CHECK: add z31.b, z31.b, z31.b // encoding: [0xff,0x03,0x3f,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x00,0x60,0x04
# CHECK: add z0.h, z0.h, z0.h // encoding: [0x00,0x00,0x60,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x01,0x28,0x04
# CHECK: add z23.b, z13.b, z8.b // encoding: [0xb7,0x01,0x28,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x00,0xe0,0x04
# CHECK: add z0.d, z0.d, z0.d // encoding: [0x00,0x00,0xe0,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x03,0x7f,0x04
# CHECK: add z31.h, z31.h, z31.h // encoding: [0xff,0x03,0x7f,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x00,0x20,0x04
# CHECK: add z0.b, z0.b, z0.b // encoding: [0x00,0x00,0x20,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x01,0xf5,0x04
# CHECK: add z21.d, z10.d, z21.d // encoding: [0x55,0x01,0xf5,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x01,0x75,0x04
# CHECK: add z21.h, z10.h, z21.h // encoding: [0x55,0x01,0x75,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x01,0xb5,0x04
# CHECK: add z21.s, z10.s, z21.s // encoding: [0x55,0x01,0xb5,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x01,0x68,0x04
# CHECK: add z23.h, z13.h, z8.h // encoding: [0xb7,0x01,0x68,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x01,0xa8,0x04
# CHECK: add z23.s, z13.s, z8.s // encoding: [0xb7,0x01,0xa8,0x04]
# CHECK-ERROR: invalid instruction encoding

llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/sub.s

# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=+sve < %s | FileCheck %s
# RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding -disassemble -mattr=-sve 2>&1 < %s | FileCheck --check-prefix=CHECK-ERROR %s
0x00,0x04,0x60,0x04
# CHECK: sub z0.h, z0.h, z0.h // encoding: [0x00,0x04,0x60,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x05,0x35,0x04
# CHECK: sub z21.b, z10.b, z21.b // encoding: [0x55,0x05,0x35,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x07,0x7f,0x04
# CHECK: sub z31.h, z31.h, z31.h // encoding: [0xff,0x07,0x7f,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x05,0x75,0x04
# CHECK: sub z21.h, z10.h, z21.h // encoding: [0x55,0x05,0x75,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x07,0x3f,0x04
# CHECK: sub z31.b, z31.b, z31.b // encoding: [0xff,0x07,0x3f,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x04,0xa0,0x04
# CHECK: sub z0.s, z0.s, z0.s // encoding: [0x00,0x04,0xa0,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x05,0x28,0x04
# CHECK: sub z23.b, z13.b, z8.b // encoding: [0xb7,0x05,0x28,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x05,0xf5,0x04
# CHECK: sub z21.d, z10.d, z21.d // encoding: [0x55,0x05,0xf5,0x04]
# CHECK-ERROR: invalid instruction encoding
0x55,0x05,0xb5,0x04
# CHECK: sub z21.s, z10.s, z21.s // encoding: [0x55,0x05,0xb5,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x04,0x20,0x04
# CHECK: sub z0.b, z0.b, z0.b // encoding: [0x00,0x04,0x20,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x05,0xe8,0x04
# CHECK: sub z23.d, z13.d, z8.d // encoding: [0xb7,0x05,0xe8,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x05,0xa8,0x04
# CHECK: sub z23.s, z13.s, z8.s // encoding: [0xb7,0x05,0xa8,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x07,0xff,0x04
# CHECK: sub z31.d, z31.d, z31.d // encoding: [0xff,0x07,0xff,0x04]
# CHECK-ERROR: invalid instruction encoding
0xb7,0x05,0x68,0x04
# CHECK: sub z23.h, z13.h, z8.h // encoding: [0xb7,0x05,0x68,0x04]
# CHECK-ERROR: invalid instruction encoding
0x00,0x04,0xe0,0x04
# CHECK: sub z0.d, z0.d, z0.d // encoding: [0x00,0x04,0xe0,0x04]
# CHECK-ERROR: invalid instruction encoding
0xff,0x07,0xbf,0x04
# CHECK: sub z31.s, z31.s, z31.s // encoding: [0xff,0x07,0xbf,0x04]
# CHECK-ERROR: invalid instruction encoding

llvm/trunk/test/MC/AArch64/SVE/sub-diagnostics.s

// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// Register z32 does not exist.
sub z3.h, z26.h, z32.h
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sub z3.h, z26.h, z32.h
// Invalid element kind.
sub z4.h, z27.h, z31.x
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid sve vector kind qualifier
// CHECK-NEXT: sub z4.h, z27.h, z31.x
// Element size specifiers should match.
sub z0.h, z8.h, z8.b
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
// CHECK-NEXT: sub z0.h, z8.h, z8.b

llvm/trunk/test/MC/AArch64/SVE/sub.s

// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
sub z0.h, z0.h, z0.h
// CHECK-INST: sub z0.h, z0.h, z0.h
// CHECK-ENCODING: [0x00,0x04,0x60,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 04 60 04 <unknown>
sub z21.b, z10.b, z21.b
// CHECK-INST: sub z21.b, z10.b, z21.b
// CHECK-ENCODING: [0x55,0x05,0x35,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 05 35 04 <unknown>
sub z31.h, z31.h, z31.h
// CHECK-INST: sub z31.h, z31.h, z31.h
// CHECK-ENCODING: [0xff,0x07,0x7f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 07 7f 04 <unknown>
sub z21.h, z10.h, z21.h
// CHECK-INST: sub z21.h, z10.h, z21.h
// CHECK-ENCODING: [0x55,0x05,0x75,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 05 75 04 <unknown>
sub z31.b, z31.b, z31.b
// CHECK-INST: sub z31.b, z31.b, z31.b
// CHECK-ENCODING: [0xff,0x07,0x3f,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 07 3f 04 <unknown>
sub z0.s, z0.s, z0.s
// CHECK-INST: sub z0.s, z0.s, z0.s
// CHECK-ENCODING: [0x00,0x04,0xa0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 04 a0 04 <unknown>
sub z23.b, z13.b, z8.b
// CHECK-INST: sub z23.b, z13.b, z8.b
// CHECK-ENCODING: [0xb7,0x05,0x28,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 05 28 04 <unknown>
sub z21.d, z10.d, z21.d
// CHECK-INST: sub z21.d, z10.d, z21.d
// CHECK-ENCODING: [0x55,0x05,0xf5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 05 f5 04 <unknown>
sub z21.s, z10.s, z21.s
// CHECK-INST: sub z21.s, z10.s, z21.s
// CHECK-ENCODING: [0x55,0x05,0xb5,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 55 05 b5 04 <unknown>
sub z0.b, z0.b, z0.b
// CHECK-INST: sub z0.b, z0.b, z0.b
// CHECK-ENCODING: [0x00,0x04,0x20,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 04 20 04 <unknown>
sub z23.d, z13.d, z8.d
// CHECK-INST: sub z23.d, z13.d, z8.d
// CHECK-ENCODING: [0xb7,0x05,0xe8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 05 e8 04 <unknown>
sub z23.s, z13.s, z8.s
// CHECK-INST: sub z23.s, z13.s, z8.s
// CHECK-ENCODING: [0xb7,0x05,0xa8,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 05 a8 04 <unknown>
sub z31.d, z31.d, z31.d
// CHECK-INST: sub z31.d, z31.d, z31.d
// CHECK-ENCODING: [0xff,0x07,0xff,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 07 ff 04 <unknown>
sub z23.h, z13.h, z8.h
// CHECK-INST: sub z23.h, z13.h, z8.h
// CHECK-ENCODING: [0xb7,0x05,0x68,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: b7 05 68 04 <unknown>
sub z0.d, z0.d, z0.d
// CHECK-INST: sub z0.d, z0.d, z0.d
// CHECK-ENCODING: [0x00,0x04,0xe0,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: 00 04 e0 04 <unknown>
sub z31.s, z31.s, z31.s
// CHECK-INST: sub z31.s, z31.s, z31.s
// CHECK-ENCODING: [0xff,0x07,0xbf,0x04]
// CHECK-ERROR: invalid operand for instruction
// CHECK-UNKNOWN: ff 07 bf 04 <unknown>
llvm/trunk/test/MC/AArch64/SVE/disassembler_tests/add.s