[dwarfdump] Add verbose output for .debug-line section

[JDevlieghere]

Summary

This patch adds dumping of line table instructions as well as the final
state at each specified pc value in verbose mode. This is essentially
the same as the default in Darwin's dwarfdump. Dumping the actual line
table opcodes can be particularly useful for something like debugging a
bad .debug_line section.

[aprantl]

Doing this during parsing doesn't seem too intrusive and looks like it is the right trade-off.
Do you have a test case, too?

[JDevlieghere]

In D37971#873777, @aprantl wrote:

Doing this during parsing doesn't seem too intrusive and looks like it is the right trade-off.
Do you have a test case, too?

Jup, I put up the code before/while fixing the tests. I've added a verbose.test to check the printing of the opcodes. The existing tests that use verbose mode essentially verify that the resulting rows are still identical. As a verification I also ran a diff against Darwin's dwarfdump and the printed opcodes are identical.

[dblaikie]

lib/DebugInfo/DWARF/DWARFDebugLine.cpp

445

If we don't have one already, should probably have a DW_LNE enum stringification function generated from Dwarf.def - and use that to print the DW_LNE_* first, outside the switch, then use the switch to dump the specific parameters, if any, etc.

462

There's some inconsistency in whitespace (some of the printing "DW_LNE_foo (" and some without the space) - pick one for consistency.

test/DebugInfo/MIR/X86/empty-inline.mir

14–16

Perhaps it's worth un-verbosifying test cases when they need to be touched manually like this anyway?

[aprantl]

Added a couple more inline comments.

Since you aren't checking for the verbose details in many of the modified tests, perhaps it would be better to replace the RUN command with a --debug-line (non-verbose) invocation?
This is not super important, so feel free to decide what to do on a case-by-case basis.

lib/DebugInfo/DWARF/DWARFContext.cpp

340

Add: // Verbose dumping is done during parsing and not on the intermediate representation.

lib/DebugInfo/DWARF/DWARFDebugLine.cpp

445

To avoid typos and make the binary smaller, I'd prefer:
dwarf::LNExtendedString(DW_LNE_end_sequence)
here and below...

[aprantl]

Looks like I just typed up everything that David said :-)

[JDevlieghere]

Thanks Dave, I've updated the diff with your feedback.

test/DebugInfo/MIR/X86/empty-inline.mir

14–16

That's how I got started before switching to this approach. I wasn't confident enough about the content of the verbose output not being part of the test. I definitely don't want to reduce the test quality for this kind of change. If there are tests that stick out where it would obviously not matter, I'd be more than happy to change it!

[dblaikie]

lib/DebugInfo/DWARF/DWARFDebugLine.cpp

444–445

Could this go outside the switch? So it's written once rather than in every case in the switch? Or are there some cases that need to avoid it or otherwise do something different? (& if possible, the newline printing could also go after the switch to avoid that being repeated in every case)

test/DebugInfo/MIR/X86/empty-inline.mir

14–16

Seems like the opposite, though - by removing the CHECK-NEXTs you've reduced the quality of the test by allowing other line entries to be present, etc, potentially.

So it's probably better here, for instance, to unverbosify the test to keep it closer to the original intent. (possibly similarly on other tests)

[JDevlieghere]

• Moved printing outside switch.
• Un-verbosed test cases.

[JDevlieghere]

test/DebugInfo/MIR/X86/empty-inline.mir

14–16

Fair enough, I agree that this is probably better. Thanks!

[aprantl]

Did you accidentally upload the wrong patch?

[JDevlieghere]

• Upload the correct patch (Thanks Adrian!)

[dblaikie]

test/DebugInfo/MIR/X86/empty-inline.mir

7

I don't think the {{.*}} is needed? Maybe - not sure how whitespace-ignorant FileCheck is by default.

test/MC/ARM/dwarf-asm-multiple-sections.s

54–57

Why did these line numbers change?

[JDevlieghere]

test/DebugInfo/MIR/X86/empty-inline.mir

7

AFAIK only leading and trailing whitespace is ignored. An additional benefit is that most of the lines won't have to be changed if we ever want to make the test verbose again.

test/MC/ARM/dwarf-asm-multiple-sections.s

54–57

That's because added the 3 run lines at the top of the file, before the code.

[probinson]

test/DebugInfo/MIR/X86/empty-inline.mir

7

I am pretty sure that FileCheck treats all whitespace as variable length, unless you tell it to be strict.

[JDevlieghere]

• Remove regex for whitespace

[JDevlieghere]

test/DebugInfo/MIR/X86/empty-inline.mir

7

Seems like you were both right! I've updated the tests.

[dblaikie]

Seems good

include/llvm/DebugInfo/DWARF/DWARFDebugLine.h

struct LineTable {
     bool getFileLineInfoForAddress(uint64_t Address, const char *CompDir,
                                    DILineInfoSpecifier::FileLineInfoKind Kind,
                                    DILineInfo &Result) const;
 
     void dump(raw_ostream &OS) const;
     void clear();
 
     /// Parse prologue and all rows.
-    bool parse(const DWARFDataExtractor &DebugLineData, uint32_t *OffsetPtr);
+    bool parse(const DWARFDataExtractor &DebugLineData, uint32_t *OffsetPtr,
+               raw_ostream *OS = nullptr);
 
     using RowVector = std::vector<Row>;
     using RowIter = RowVector::const_iterator;
     using SequenceVector = std::vector<Sequence>;
     using SequenceIter = SequenceVector::const_iterator;
 
     struct Prologue Prologue;
     RowVector Rows;

lib/DebugInfo/DWARF/DWARFContext.cpp

for (const auto &CU : compile_units()) {
       auto CUDIE = CU->getUnitDIE();
       if (!CUDIE)
         continue;
       if (auto StmtOffset = toSectionOffset(CUDIE.find(DW_AT_stmt_list))) {
         DWARFDataExtractor lineData(*DObj, DObj->getLineSection(),
                                     isLittleEndian(), savedAddressByteSize);
         DWARFDebugLine::LineTable LineTable;
         uint32_t Offset = *StmtOffset;
+        if (DumpOpts.Verbose) {
+          LineTable.parse(lineData, &Offset, &OS);
+        } else {
           LineTable.parse(lineData, &Offset);
           LineTable.dump(OS);
         }
       }
     }
+  }
 
   // FIXME: This seems sketchy.
   for (const auto &CU : compile_units()) {
     savedAddressByteSize = CU->getAddressByteSize();
     break;
   }
   if (shouldDump(ExplicitDWO, ".debug_line.dwo", DIDT_ID_DebugLine,
                  DObj->getLineDWOSection().Data)) {

lib/DebugInfo/DWARF/DWARFDebugLine.cpp

DWARFDebugLine::getOrParseLineTable(const DWARFDataExtractor &DebugLineData,
   if (Pos.second) {
     if (!LT->parse(DebugLineData, &Offset))
       return nullptr;
   }
   return LT;
 }
 
 bool DWARFDebugLine::LineTable::parse(const DWARFDataExtractor &DebugLineData,
-                                      uint32_t *OffsetPtr) {
+                                      uint32_t *OffsetPtr, raw_ostream *OS) {
   const uint32_t DebugLineOffset = *OffsetPtr;
 
   clear();
 
   if (!Prologue.parse(DebugLineData, OffsetPtr)) {
     // Restore our offset and return false to indicate failure!
     *OffsetPtr = DebugLineOffset;
     return false;
   }
 
+  if (OS)
+    Prologue.dump(*OS);
+
   const uint32_t EndOffset =
       DebugLineOffset + Prologue.TotalLength + Prologue.sizeofTotalLength();
 
   ParsingState State(this);
 
   while (*OffsetPtr < EndOffset) {
+    if (OS)
+      *OS << format("0x%08.08" PRIx32 ": ", *OffsetPtr);
+
     uint8_t Opcode = DebugLineData.getU8(OffsetPtr);
 
+    if (OS)
+      *OS << format("%02.02" PRIx8 " ", Opcode);
+
     if (Opcode == 0) {
       // Extended Opcodes always start with a zero opcode followed by
       // a uleb128 length so you can skip ones you don't know about
       uint32_t ExtOffset = *OffsetPtr;
       uint64_t Len = DebugLineData.getULEB128(OffsetPtr);
       uint32_t ArgSize = Len - (*OffsetPtr - ExtOffset);
 
       uint8_t SubOpcode = DebugLineData.getU8(OffsetPtr);
       switch (SubOpcode) {
       case DW_LNE_end_sequence:
         // Set the end_sequence register of the state machine to true and
         // append a row to the matrix using the current values of the
         // state-machine registers. Then reset the registers to the initial
         // values specified above. Every statement program sequence must end
         // with a DW_LNE_end_sequence instruction which creates a row whose
         // address is that of the byte after the last target machine instruction
         // of the sequence.
         State.Row.EndSequence = true;
         State.appendRowToMatrix(*OffsetPtr);
+        if (OS) {
+          *OS << "DW_LNE_end_sequence\n";
+          OS->indent(12);
+          State.Row.dump(*OS);
+          *OS << "\n";
+        }
         State.resetRowAndSequence();
         break;
 
       case DW_LNE_set_address:
         // Takes a single relocatable address as an operand. The size of the
         // operand is the size appropriate to hold an address on the target
         // machine. Set the address register to the value given by the
         // relocatable address. All of the other statement program opcodes
         // that affect the address register add a delta to it. This instruction
         // stores a relocatable value into it instead.
         State.Row.Address = DebugLineData.getRelocatedAddress(OffsetPtr);
+        if (OS)
+          *OS << format("DW_LNE_set_address (0x%16.16" PRIx64 ")\n",
+                        State.Row.Address);
         break;
 
       case DW_LNE_define_file:
         // Takes 4 arguments. The first is a null terminated string containing
         // a source file name. The second is an unsigned LEB128 number
         // representing the directory index of the directory in which the file
         // was found. The third is an unsigned LEB128 number representing the
         // time of last modification of the file. The fourth is an unsigned
if (Opcode == 0) {
         // the file register of the state machine.
         {
           FileNameEntry FileEntry;
           FileEntry.Name = DebugLineData.getCStr(OffsetPtr);
           FileEntry.DirIdx = DebugLineData.getULEB128(OffsetPtr);
           FileEntry.ModTime = DebugLineData.getULEB128(OffsetPtr);
           FileEntry.Length = DebugLineData.getULEB128(OffsetPtr);
           Prologue.FileNames.push_back(FileEntry);
+          if (OS)
+            *OS << "DW_LNE_define_file(" << FileEntry.Name.str()
+                << ", dir=" << FileEntry.DirIdx << ", mod_time="
+                << format("(0x%16.16" PRIx64 ")", FileEntry.ModTime)
+                << ", length=" << FileEntry.Length << ")\n";
         }
         break;
 
       case DW_LNE_set_discriminator:
         State.Row.Discriminator = DebugLineData.getULEB128(OffsetPtr);
+        if (OS)
+          *OS << "DW_LNE_set_discriminator (" << State.Row.Discriminator
+              << ")\n";
         break;
 
       default:
         // Length doesn't include the zero opcode byte or the length itself, but
         // it does include the sub_opcode, so we have to adjust for that below
         (*OffsetPtr) += ArgSize;
         break;
       }
     } else if (Opcode < Prologue.OpcodeBase) {
       switch (Opcode) {
       // Standard Opcodes
       case DW_LNS_copy:
         // Takes no arguments. Append a row to the matrix using the
         // current values of the state-machine registers. Then set
         // the basic_block register to false.
         State.appendRowToMatrix(*OffsetPtr);
+        if (OS) {
+          *OS << "DW_LNS_copy\n";
+          OS->indent(12);
+          State.Row.dump(*OS);
+          *OS << "\n";
+        }
         break;
 
       case DW_LNS_advance_pc:
         // Takes a single unsigned LEB128 operand, multiplies it by the
         // min_inst_length field of the prologue, and adds the
         // result to the address register of the state machine.
-        State.Row.Address +=
+        {
+          uint64_t AddrOffset =
               DebugLineData.getULEB128(OffsetPtr) * Prologue.MinInstLength;
+          State.Row.Address += AddrOffset;
+          if (OS)
+            *OS << "DW_LNS_advance_pc (" << AddrOffset << ")\n";
+        }
         break;
 
       case DW_LNS_advance_line:
         // Takes a single signed LEB128 operand and adds that value to
         // the line register of the state machine.
         State.Row.Line += DebugLineData.getSLEB128(OffsetPtr);
+        if (OS)
+          *OS << "DW_LNS_advance_line (" << State.Row.Line << ")\n";
         break;
 
       case DW_LNS_set_file:
         // Takes a single unsigned LEB128 operand and stores it in the file
         // register of the state machine.
         State.Row.File = DebugLineData.getULEB128(OffsetPtr);
+        if (OS)
+          *OS << "DW_LNS_set_file (" << State.Row.File << ")\n";
         break;
 
       case DW_LNS_set_column:
         // Takes a single unsigned LEB128 operand and stores it in the
         // column register of the state machine.
         State.Row.Column = DebugLineData.getULEB128(OffsetPtr);
+        if (OS)
+          *OS << "DW_LNS_set_column (" << State.Row.Column << ")\n";
         break;
 
       case DW_LNS_negate_stmt:
         // Takes no arguments. Set the is_stmt register of the state
         // machine to the logical negation of its current value.
         State.Row.IsStmt = !State.Row.IsStmt;
+        if (OS)
+          *OS << "DW_LNS_negate_stmt\n";
         break;
 
       case DW_LNS_set_basic_block:
         // Takes no arguments. Set the basic_block register of the
         // state machine to true
         State.Row.BasicBlock = true;
+        if (OS)
+          *OS << "DW_LNS_set_basic_block\n";
         break;
 
       case DW_LNS_const_add_pc:
         // Takes no arguments. Add to the address register of the state
         // machine the address increment value corresponding to special
         // opcode 255. The motivation for DW_LNS_const_add_pc is this:
         // when the statement program needs to advance the address by a
         // small amount, it can use a single special opcode, which occupies
         // a single byte. When it needs to advance the address by up to
         // twice the range of the last special opcode, it can use
         // DW_LNS_const_add_pc followed by a special opcode, for a total
         // of two bytes. Only if it needs to advance the address by more
         // than twice that range will it need to use both DW_LNS_advance_pc
         // and a special opcode, requiring three or more bytes.
         {
           uint8_t AdjustOpcode = 255 - Prologue.OpcodeBase;
           uint64_t AddrOffset =
               (AdjustOpcode / Prologue.LineRange) * Prologue.MinInstLength;
           State.Row.Address += AddrOffset;
+          if (OS)
+            *OS << format("DW_LNS_const_add_pc (0x%16.16" PRIx64 ")\n",
+                          AddrOffset);
         }
         break;
 
       case DW_LNS_fixed_advance_pc:
         // Takes a single uhalf operand. Add to the address register of
         // the state machine the value of the (unencoded) operand. This
         // is the only extended opcode that takes an argument that is not
         // a variable length number. The motivation for DW_LNS_fixed_advance_pc
         // is this: existing assemblers cannot emit DW_LNS_advance_pc or
         // special opcodes because they cannot encode LEB128 numbers or
         // judge when the computation of a special opcode overflows and
         // requires the use of DW_LNS_advance_pc. Such assemblers, however,
         // can use DW_LNS_fixed_advance_pc instead, sacrificing compression.
-        State.Row.Address += DebugLineData.getU16(OffsetPtr);
+        {
+          uint16_t PCOffset = DebugLineData.getU16(OffsetPtr);
+          State.Row.Address += PCOffset;
+          if (OS)
+            *OS << format("DW_LNS_fixed_advance_pc (0x%16.16" PRIx64 ")\n",
+                          PCOffset);
+        }
         break;
 
       case DW_LNS_set_prologue_end:
         // Takes no arguments. Set the prologue_end register of the
         // state machine to true
         State.Row.PrologueEnd = true;
+        if (OS)
+          *OS << "DW_LNS_set_prologue_end\n";
         break;
 
       case DW_LNS_set_epilogue_begin:
         // Takes no arguments. Set the basic_block register of the
         // state machine to true
         State.Row.EpilogueBegin = true;
+        if (OS)
+          *OS << "DW_LNS_set_epilogue_begin\n";
         break;
 
       case DW_LNS_set_isa:
         // Takes a single unsigned LEB128 operand and stores it in the
         // column register of the state machine.
         State.Row.Isa = DebugLineData.getULEB128(OffsetPtr);
+        if (OS)
+          *OS << "DW_LNS_set_column (" << State.Row.Isa << ")\n";
         break;
 
       default:
         // Handle any unknown standard opcodes here. We know the lengths
         // of such opcodes because they are specified in the prologue
         // as a multiple of LEB128 operands for each opcode.
         {
           assert(Opcode - 1U < Prologue.StandardOpcodeLengths.size());
           uint8_t OpcodeLength = Prologue.StandardOpcodeLengths[Opcode - 1];
-          for (uint8_t I = 0; I < OpcodeLength; ++I)
-            DebugLineData.getULEB128(OffsetPtr);
+          for (uint8_t I = 0; I < OpcodeLength; ++I) {
+            uint64_t Value = DebugLineData.getULEB128(OffsetPtr);
+            if (OS)
+              *OS << format("Skipping ULEB128 value: 0x%16.16" PRIx64 ")\n",
+                            Value);
+          }
         }
         break;
       }
     } else {
       // Special Opcodes
 
       // A special opcode value is chosen based on the amount that needs
       // to be added to the line and address registers. The maximum line
if (Opcode == 0) {
 
       uint8_t AdjustOpcode = Opcode - Prologue.OpcodeBase;
       uint64_t AddrOffset =
           (AdjustOpcode / Prologue.LineRange) * Prologue.MinInstLength;
       int32_t LineOffset =
           Prologue.LineBase + (AdjustOpcode % Prologue.LineRange);
       State.Row.Line += LineOffset;
       State.Row.Address += AddrOffset;
+
+      if (OS) {
+        *OS << "address += " << ((uint32_t)AdjustOpcode)
+            << ",  line += " << LineOffset << "\n";
+        OS->indent(12);
+        State.Row.dump(*OS);
+        *OS << "\n";
+      }
+
       State.appendRowToMatrix(*OffsetPtr);
       // Reset discriminator to 0.
       State.Row.Discriminator = 0;
     }
   }
 
   if (!State.Sequence.Empty) {
     fprintf(stderr, "warning: last sequence in debug line table is not"

test/DebugInfo/MIR/X86/empty-inline.mir

 # RUN: llc  -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s
 #
 # This testcase has an implicit def pseudo-iunstruction with a debug location.
 #
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_subprogram
 # CHECK:  DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000)
 # CHECK-NOT: DW_TAG
 # CHECK:  DW_AT_specification {{.*}} "_ZN1C5m_fn3Ev"
 # CHECK-NOT: DW_TAG
 #      Here should not be an inlined subroutine with 0 length.
 # CHECK: NULL
 #
-# CHECK: Address            Line   Column File   ISA Discriminator Flags
-# CHECK-NEXT:                ---
-# CHECK-NEXT:                 25      0      1   0             0  is_stmt
-# CHECK-NEXT:                 29     28      1   0             0  is_stmt prologue_end
-# CHECK-NEXT:                 29     28      1   0             0  is_stmt end_sequence
+# CHECK:                 25      0      1   0             0  is_stmt
+# CHECK:                 29     28      1   0             0  is_stmt prologue_end
+# CHECK:                 29     28      1   0             0  is_stmt end_sequence
 --- |
   source_filename = "t.ll"
   target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
   target triple = "x86_64-apple-macosx"
-  
   %class.E = type { %class.D }
   %class.D = type { %class.B }
   %class.B = type { %class.A, %class.A }
   %class.A = type { i8 }
   %class.C = type <{ %class.E*, %class.B, [2 x i8] }>
-  
   @a = local_unnamed_addr global %class.E* null, align 4
-  
   define i32 @_ZN1C5m_fn3Ev(%class.C* nocapture) local_unnamed_addr align 2 !dbg !6 {
     %2 = alloca %class.B, align 1
     %3 = load %class.E*, %class.E** @a, align 4
     %4 = icmp eq %class.E* %3, null
     br i1 %4, label %10, label %5
-  
   ; <label>:5:                                      ; preds = %1
     %6 = bitcast %class.C* %0 to %class.D**
     %7 = load %class.D*, %class.D** %6, align 4
     %8 = bitcast %class.D* %7 to i8*
     %9 = load i8, i8* %8, align 1
     br label %10
-  
   ; <label>:10:                                     ; preds = %5, %1
     %11 = phi i8 [ %9, %5 ], [ undef, %1 ], !dbg !10
     %12 = getelementptr inbounds %class.C, %class.C* %0, i32 0, i32 1, i32 0, i32 0
     store i8 %11, i8* %12, align 1, !dbg !14
     ret i32 undef
   }
-  
   !llvm.dbg.cu = !{!0}
   !llvm.module.flags = !{!3, !4, !5}
-  
   !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "Apple LLVM version 8.1.0 (clang-802.0.30.3)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, globals: !2)
   !1 = !DIFile(filename: "test.ii", directory: "/")
   !2 = !{}
   !3 = !{i32 2, !"Dwarf Version", i32 4}
   !4 = !{i32 2, !"Debug Info Version", i32 3}
   !5 = !{i32 1, !"PIC Level", i32 2}
   !6 = distinct !DISubprogram(name: "m_fn3", linkageName: "_ZN1C5m_fn3Ev", scope: !7, file: !1, line: 25, type: !8, isLocal: false, isDefinition: true, scopeLine: 25, flags: DIFlagPrototyped, isOptimized: true, unit: !0, declaration: !9, variables: !2)
   !7 = distinct !DICompositeType(tag: DW_TAG_class_type, name: "C", file: !1, line: 14, size: 64, align: 32, elements: !2, identifier: "_ZTS1C")

 ---
 name:            _ZN1C5m_fn3Ev
 alignment:       4
 exposesReturnsTwice: false
 legalized:       false
 regBankSelected: false
 selected:        false
 tracksRegLiveness: true
-liveins:         
+liveins:
   - { reg: '%rdi' }
-frameInfo:       
+frameInfo:
   isFrameAddressTaken: false
   isReturnAddressTaken: false
   hasStackMap:     false
   hasPatchPoint:   false
   stackSize:       0
   offsetAdjustment: 0
   maxAlignment:    8
   adjustsStack:    false
   hasCalls:        false
   maxCallFrameSize: 0
   hasOpaqueSPAdjustment: false
   hasVAStart:      false
   hasMustTailInVarArgFunc: false
-#stack:           
+#stack:
 #  - { id: 0, name: '<unnamed alloca>', offset: -16, size: 2, alignment: 8 }
 body:             |
   bb.0 (%ir-block.1):
     successors: %bb.1(0x30000000), %bb.2(0x50000000)
     liveins: %rdi
-  
     CMP64mi8 %rip, 1, _, @a, _, 0, implicit-def %eflags :: (dereferenceable load 8 from @a, align 4)
     JE_1 %bb.1, implicit %eflags
-  
   bb.2 (%ir-block.5):
     liveins: %rdi
-  
     %rax = MOV64rm %rdi, 1, _, 0, _ :: (load 8 from %ir.6, align 4)
     %al = MOV8rm killed %rax, 1, _, 0, _ :: (load 1 from %ir.8)
     MOV8mr killed %rdi, 1, _, 8, _, killed %al, debug-location !14 :: (store 1 into %ir.12)
     RETQ undef %eax
-  
   bb.1:
     liveins: %rdi
-  
     %al = IMPLICIT_DEF debug-location !10
     MOV8mr killed %rdi, 1, _, 8, _, killed %al, debug-location !14 :: (store 1 into %ir.12)
     RETQ undef %eax
 
 ...

test/DebugInfo/Mips/delay-slot.ll

 ; RUN: llc -filetype=obj -O0 -relocation-model=pic < %s -mtriple mips-unknown-linux-gnu | llvm-dwarfdump -v - | FileCheck %s
 ; PR19815
 
 ; Generated using clang -target mips-linux-gnu -g test.c -S -o - -flto|opt -sroa -S
 ; test.c:
 ;
 ; int foo(int x) {
 ;  if (x)
 ;    return 0;
 ;  return 1;
 ; }
 
-; CHECK: Address            Line   Column File   ISA Discriminator Flags
-; CHECK: ------------------ ------ ------ ------ --- ------------- -------------
 ; CHECK: 0x0000000000000000      1      0      1   0             0  is_stmt
 ; FIXME: The next address probably ought to be 0x0000000000000004 but there's
 ;        a constant initialization before the prologue's end.
 ; CHECK: 0x0000000000000008      2      0      1   0             0  is_stmt prologue_end
 ; CHECK: 0x000000000000002c      3      0      1   0             0  is_stmt
 ; CHECK: 0x000000000000003c      4      0      1   0             0  is_stmt
 ; CHECK: 0x0000000000000048      5      0      1   0             0  is_stmt
 ; CHECK: 0x0000000000000058      5      0      1   0             0  is_stmt end_sequence

test/MC/ARM/dwarf-asm-multiple-sections-dwarf-2.s

 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x00000024, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
 // DWARF-NEXT: [0x00000000 - 0x00000004)
 // DWARF-NEXT: [0x00000000 - 0x00000004)
 
 // DWARF: .debug_line contents:
 // DWARF:      0x0000000000000000      7      0      1   0   0 is_stmt
-// DWARF-NEXT: 0x0000000000000004      7      0      1   0   0 is_stmt end_sequence
+// DWARF:      0x0000000000000004      7      0      1   0   0 is_stmt end_sequence
 // DWARF:      0x0000000000000000     11      0      1   0   0 is_stmt
-// DWARF-NEXT: 0x0000000000000004     11      0      1   0   0 is_stmt end_sequence
+// DWARF:      0x0000000000000004     11      0      1   0   0 is_stmt end_sequence
 
 
 // DWARF-NOT: .debug_ranges contents:
 // DWARF-NOT: .debug_pubnames contents:
 
 
 // RELOC: RELOCATION RECORDS FOR [.rel.debug_info]:
 // RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_abbrev

test/MC/ARM/dwarf-asm-multiple-sections.s

 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x00000024, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
 // DWARF-NEXT: [0x00000000 - 0x00000004)
 // DWARF-NEXT: [0x00000000 - 0x00000004)
 
 
 // DWARF: .debug_line contents:
 // DWARF:      0x0000000000000000     14      0      1   0   0  is_stmt
-// DWARF-NEXT: 0x0000000000000004     14      0      1   0   0  is_stmt end_sequence
-// DWARF-NEXT: 0x0000000000000000     18      0      1   0   0  is_stmt
-// DWARF-NEXT: 0x0000000000000004     18      0      1   0   0  is_stmt end_sequence
+// DWARF:      0x0000000000000004     14      0      1   0   0  is_stmt end_sequence
+// DWARF:      0x0000000000000000     18      0      1   0   0  is_stmt
+// DWARF:      0x0000000000000004     18      0      1   0   0  is_stmt end_sequence
 
 
 // DWARF: .debug_ranges contents:
 // DWARF: 00000000 ffffffff 00000000
 // DWARF: 00000000 00000000 00000004
 // DWARF: 00000000 ffffffff 00000000
 // DWARF: 00000000 00000000 00000004
 // DWARF: 00000000 <End of list>
 
 

test/MC/ARM/dwarf-asm-nonstandard-section.s

 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
 // DWARF-NEXT: [0x00000000 - 0x00000004)
 
 
 // DWARF: .debug_line contents:
 // DWARF:      0x0000000000000000      7      0      1   0   0  is_stmt
-// DWARF-NEXT: 0x0000000000000004      7      0      1   0   0  is_stmt end_sequence
+// DWARF:      0x0000000000000004      7      0      1   0   0  is_stmt end_sequence
 
 
 // DWARF-NOT: .debug_ranges contents:
 // DWARF-NOT: .debug_pubnames contents:
 
 
 
 // RELOC: RELOCATION RECORDS FOR [.rel.debug_info]:

test/MC/ARM/dwarf-asm-single-section.s

 
 
 // DWARF: .debug_aranges contents:
 // DWARF-NEXT: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
 // DWARF-NEXT: [0x00000000 - 0x00000004)
 
 // DWARF: .debug_line contents:
 // DWARF:      0x0000000000000000      7      0      1   0   0 is_stmt
-// DWARF-NEXT: 0x0000000000000004      7      0      1   0   0 is_stmt end_sequence
+// DWARF:      0x0000000000000004      7      0      1   0   0 is_stmt end_sequence
 
 
 // DWARF-NOT: .debug_ranges contents:
 // DWARF-NOT: .debug_pubnames contents:
 
 
 // RELOC: RELOCATION RECORDS FOR [.rel.debug_info]:
 // RELOC-NEXT: 00000006 R_ARM_ABS32 .debug_abbrev

test/MC/MachO/gen-dwarf.s

 
 // CHECK:    DW_TAG_label [2] *
 // CHECK:      DW_AT_name [DW_FORM_string]  ("bar")
 // CHECK:      DW_AT_decl_file [DW_FORM_data4]  ([[FILE:".*gen-dwarf.s"]])
 // CHECK:      DW_AT_decl_line [DW_FORM_data4]  (5)
 // CHECK:      DW_AT_low_pc [DW_FORM_addr]  (0x0000000000000000)
 // CHECK:      DW_AT_prototyped [DW_FORM_flag]  (0x00)
 
-// CHECK:      DW_TAG_unspecified_parameters [3]  
+// CHECK:      DW_TAG_unspecified_parameters [3]
 
 // CHECK:      NULL
 
 // CHECK:    DW_TAG_label [2] *
 // CHECK:      DW_AT_name [DW_FORM_string]  ("foo")
 // CHECK:      DW_AT_decl_file [DW_FORM_data4]  ([[FILE]])
 // CHECK:      DW_AT_decl_line [DW_FORM_data4]  (9)
 // CHECK:      DW_AT_low_pc [DW_FORM_addr]  (0x0000000000000007)
 // CHECK:      DW_AT_prototyped [DW_FORM_flag]  (0x00)
 
-// CHECK:      DW_TAG_unspecified_parameters [3]  
+// CHECK:      DW_TAG_unspecified_parameters [3]
 
 // CHECK:      NULL
 
 // CHECK:    DW_TAG_label [2] *
 // CHECK:      DW_AT_name [DW_FORM_string]  ("baz")
 // CHECK:      DW_AT_decl_file [DW_FORM_data4]  ([[FILE]])
 // CHECK:      DW_AT_decl_line [DW_FORM_data4]  (10)
 // CHECK:      DW_AT_low_pc [DW_FORM_addr]  (0x0000000000000007)
 // CHECK:      DW_AT_prototyped [DW_FORM_flag]  (0x00)
 
-// CHECK:      DW_TAG_unspecified_parameters [3]  
+// CHECK:      DW_TAG_unspecified_parameters [3]
 
 // CHECK:      NULL
 
 // CHECK:    NULL
 
 // CHECK: .debug_aranges contents:
 // CHECK: Address Range Header: length = 0x0000001c, version = 0x0002, cu_offset = 0x00000000, addr_size = 0x04, seg_size = 0x00
 

 // CHECK: standard_opcode_lengths[DW_LNS_set_prologue_end] = 0
 // CHECK: standard_opcode_lengths[DW_LNS_set_epilogue_begin] = 0
 // CHECK: standard_opcode_lengths[DW_LNS_set_isa] = 1
 // We don't check include_directories as it has a temp path
 // CHECK:                 Dir  Mod Time   File Len   File Name
 // CHECK:                 ---- ---------- ---------- ---------------------------
 // CHECK: file_names[  1]    1 0x00000000 0x00000000 gen-dwarf.s
 
-// CHECK: Address            Line   Column File   ISA Discriminator Flags
-// CHECK: ------------------ ------ ------ ------ --- ------------- -------------
 // CHECK: 0x0000000000000000      6      0      1   0             0  is_stmt
 // CHECK: 0x0000000000000005      7      0      1   0             0  is_stmt
 // CHECK: 0x0000000000000006      8      0      1   0             0  is_stmt
 // CHECK: 0x0000000000000007     11      0      1   0             0  is_stmt
 // CHECK: 0x0000000000000008     11      0      1   0             0  is_stmt end_sequence

test/tools/dsymutil/X86/basic-linking-x86.test

 CHECK-NEXT:Address Range Header: length = 0x0000003c, version = 0x0002, cu_offset = 0x00000126, addr_size = 0x08, seg_size = 0x00
 CHECK-NEXT:[0x0000000100000f40 - 0x0000000100000f84)
 CHECK-NEXT:[0x0000000100000f90 - 0x0000000100000fa9)
 
 CHECK: .debug_line contents:
 CHECK:                Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic1.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000ea0     23      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000eb6     24      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000ec4     24      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000ea0     23      0      1   0             0  is_stmt
+CHECK: 0x0000000100000eb6     24      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000ec4     24      0      1   0             0  is_stmt end_sequence
 
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic2.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000ed0     19      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000ee2     20      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f19     20      0      1   0             0  is_stmt end_sequence
-CHECK-NEXT: 0x0000000100000f20     14      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f24     15      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f37     15      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000ed0     19      0      1   0             0  is_stmt
+CHECK: 0x0000000100000ee2     20      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f19     20      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f20     14      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f24     15      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f37     15      0      1   0             0  is_stmt end_sequence
 
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic3.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f40     16      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f4b     17      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f58     18      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f6c     19      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f7b     20      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f84     20      0      1   0             0  is_stmt end_sequence
-CHECK-NEXT: 0x0000000100000f90     11      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f9b     12      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000fa9     12      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f40     16      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f4b     17      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f58     18      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f6c     19      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f7b     20      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f84     20      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f90     11      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f9b     12      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000fa9     12      0      1   0             0  is_stmt end_sequence
 
 CHECK: .debug_pubnames contents:
 CHECK-NEXT: length = 0x00000017 version = 0x0002 unit_offset = 0x00000000 unit_size = 0x00000081
 CHECK-NEXT: Offset     Name
 CHECK-NEXT: 0x00000026 "main"
 CHECK-NEXT: length = 0x00000036 version = 0x0002 unit_offset = 0x00000081 unit_size = 0x000000a5
 CHECK-NEXT: Offset     Name
 CHECK-NEXT: 0x0000002d "private_int"

test/tools/dsymutil/X86/basic-lto-dw4-linking-x86.test

 CHECK:      DW_AT_low_pc [DW_FORM_addr] (0x0000000100000f40)
 CHECK:      DW_AT_high_pc [DW_FORM_data4] (0x0000000b)
 CHECK:      DW_AT_frame_base [DW_FORM_exprloc]  (DW_OP_reg6 RBP)
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000027] = "main")
 CHECK:      DW_AT_decl_file [DW_FORM_data1] ("/Inputs{{[/\\]}}basic1.c")
 CHECK:      DW_AT_prototyped [DW_FORM_flag_present] (true)
 CHECK:      DW_AT_type [DW_FORM_ref_addr]   (0x00000000000000a1)
 CHECK:      DW_AT_external [DW_FORM_flag_present] (true)
-CHECK:      DW_TAG_formal_parameter [3]  
+CHECK:      DW_TAG_formal_parameter [3]
 CHECK:        DW_AT_location [DW_FORM_exprloc]  (DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:        DW_AT_name [DW_FORM_strp] ( .debug_str[0x0000002c] = "argc")
 CHECK:        DW_AT_decl_file [DW_FORM_data1]       ("/Inputs{{[/\\]}}basic1.c")
 CHECK:        DW_AT_type [DW_FORM_ref_addr] (0x00000000000000a1)
-CHECK:      DW_TAG_formal_parameter [4]  
+CHECK:      DW_TAG_formal_parameter [4]
 CHECK:        DW_AT_location [DW_FORM_exprloc]  (DW_OP_reg4 RSI)
 CHECK:        DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000031] = "argv")
 CHECK:        DW_AT_type [DW_FORM_ref4]     (cu + 0x0060 => {0x00000060})
 CHECK:      NULL
 CHECK:    DW_TAG_pointer_type [5]
 CHECK:       DW_AT_type [DW_FORM_ref4]       (cu + 0x0065 => {0x00000065})
-CHECK:    DW_TAG_pointer_type [5]  
-CHECK:    DW_TAG_const_type [6]  
-CHECK:    DW_TAG_base_type [7]  
+CHECK:    DW_TAG_pointer_type [5]
+CHECK:    DW_TAG_const_type [6]
+CHECK:    DW_TAG_base_type [7]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000036] = "char")
 CHECK:      DW_AT_encoding [DW_FORM_data1]  (DW_ATE_signed_char)
 CHECK:      DW_AT_byte_size [DW_FORM_data1] (0x01)
 CHECK:    NULL
 
 CHECK:  Compile Unit:{{.*}} version = 0x0004
 
 CHECK:  DW_TAG_compile_unit [1] *
 CHECK:    DW_AT_producer [DW_FORM_strp] ( .debug_str[0x00000001] = "clang version 3.7.0 ")
 CHECK:    DW_AT_language [DW_FORM_data2]  (DW_LANG_C99)
 CHECK:    DW_AT_name [DW_FORM_strp] ( .debug_str[0x0000003b] = "basic2.c")
 CHECK:    DW_AT_stmt_list [DW_FORM_sec_offset]      (0x00000044)
 CHECK:    DW_AT_low_pc [DW_FORM_addr]       (0x0000000100000f50)
 CHECK:    DW_AT_high_pc [DW_FORM_data4]     (0x00000037)
-CHECK:    DW_TAG_base_type [7]  
+CHECK:    DW_TAG_base_type [7]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000044] = "int")
-CHECK:    DW_TAG_variable [8]  
+CHECK:    DW_TAG_variable [8]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000048] = "baz")
 CHECK:      DW_AT_location [DW_FORM_exprloc] (DW_OP_addr 0x100001000)
-CHECK:    DW_TAG_variable [8]  
+CHECK:    DW_TAG_variable [8]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x0000004c] = "private_int")
 CHECK:      DW_AT_decl_file [DW_FORM_data1] ("/Inputs{{[/\\]}}basic2.c")
 CHECK:      DW_AT_location [DW_FORM_exprloc] (DW_OP_addr 0x100001008)
-CHECK:    DW_TAG_subprogram [9]  
+CHECK:    DW_TAG_subprogram [9]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000058] = "inc")
 CHECK:      DW_AT_type [DW_FORM_ref4] (cu + 0x002a => {0x000000a1})
 CHECK:      DW_AT_inline [DW_FORM_data1]  (DW_INL_inlined)
 CHECK:    DW_TAG_subprogram [10] *
 CHECK:      DW_AT_low_pc [DW_FORM_addr] (0x0000000100000f50)
 CHECK:      DW_AT_high_pc [DW_FORM_data4] (0x00000037)
 CHECK:      DW_AT_frame_base [DW_FORM_exprloc]  (DW_OP_reg6 RBP)
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x0000005c] = "foo")
 CHECK:      DW_AT_decl_file [DW_FORM_data1] ("/Inputs{{[/\\]}}basic2.c")
 CHECK:      DW_AT_prototyped [DW_FORM_flag_present] (true)
 CHECK:      DW_AT_type [DW_FORM_ref4] (cu + 0x002a => {0x000000a1})
 CHECK:      DW_TAG_formal_parameter [11]
 CHECK:        DW_AT_location [DW_FORM_sec_offset]   (0x00000000
 CHECK:          0x0000000000000000 - 0x000000000000000c: DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:        DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000060] = "arg")
 CHECK:        DW_AT_type [DW_FORM_ref4] (cu + 0x002a => {0x000000a1})
-CHECK:      DW_TAG_inlined_subroutine [12]  
+CHECK:      DW_TAG_inlined_subroutine [12]
 CHECK:        DW_AT_abstract_origin [DW_FORM_ref4]  (cu + 0x005b => {0x000000d2} "inc")
 CHECK:        DW_AT_low_pc [DW_FORM_addr] (0x0000000100000f61)
 CHECK:        DW_AT_high_pc [DW_FORM_data4] (0x0000000f)
 CHECK:      NULL
 CHECK:    NULL
 
 CHECK:  Compile Unit: {{.*}} version = 0x0004
 
 CHECK:  DW_TAG_compile_unit [1] *
 CHECK:    DW_AT_producer [DW_FORM_strp] ( .debug_str[0x00000001] = "clang version 3.7.0 ")
 CHECK:    DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000064] = "basic3.c")
 CHECK:    DW_AT_stmt_list [DW_FORM_sec_offset]      (0x0000009a)
 CHECK:    DW_AT_low_pc [DW_FORM_addr]       (0x0000000100000f90)
 CHECK:    DW_AT_high_pc [DW_FORM_data4]     (0x00000024)
-CHECK:    DW_TAG_variable [13]  
+CHECK:    DW_TAG_variable [13]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x0000006d] = "val")
 CHECK:      DW_AT_decl_file [DW_FORM_data1] ("/Inputs{{[/\\]}}basic3.c")
 CHECK:      DW_AT_location [DW_FORM_exprloc] (DW_OP_addr 0x100001004)
-CHECK:    DW_TAG_volatile_type [14]  
-CHECK:    DW_TAG_subprogram [15]  
+CHECK:    DW_TAG_volatile_type [14]
+CHECK:    DW_TAG_subprogram [15]
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000058] = "inc")
 CHECK:      DW_AT_inline [DW_FORM_data1]  (DW_INL_inlined)
 CHECK:    DW_TAG_subprogram [2] *
 CHECK:      DW_AT_low_pc [DW_FORM_addr] (0x0000000100000f90)
 CHECK:      DW_AT_high_pc [DW_FORM_data4] (0x00000024)
 CHECK:      DW_AT_frame_base [DW_FORM_exprloc]  (DW_OP_reg6 RBP)
 CHECK:      DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000071] = "bar")
 CHECK:      DW_TAG_formal_parameter [16]
 CHECK:        DW_AT_location [DW_FORM_sec_offset]   (0x00000025
 CHECK:          0x0000000000000000 - 0x000000000000000f: DW_OP_reg5 RDI, DW_OP_piece 0x4
 CHECK:          0x0000000000000019 - 0x000000000000001d: DW_OP_reg5 RDI, DW_OP_piece 0x4)
 CHECK:        DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000060] = "arg")
-CHECK:      DW_TAG_inlined_subroutine [17]  
+CHECK:      DW_TAG_inlined_subroutine [17]
 CHECK:        DW_AT_abstract_origin [DW_FORM_ref4]  (cu + 0x0044 => {0x0000015f} "inc")
 CHECK:        DW_AT_ranges [DW_FORM_sec_offset]     (0x00000000
 CHECK:           [0x0000000100000f94 - 0x0000000100000f9a)
 CHECK:           [0x0000000100000f9f - 0x0000000100000fa7))
 
 CHECK:      NULL
 CHECK:    NULL
 

 CHECK-NEXT: [0x0000000100000f50 - 0x0000000100000f87)
 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x0000011b, addr_size = 0x08, seg_size = 0x00
 CHECK-NEXT: [0x0000000100000f90 - 0x0000000100000fb4)
 
 CHECK: .debug_line contents:
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic1.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f40     26      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f44     27     10      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f49     27      3      1   0             0 
-CHECK-NEXT: 0x0000000100000f4b     27      3      1   0             0  end_sequence
+CHECK: 0x0000000100000f40     26      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f44     27     10      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f49     27      3      1   0             0
+CHECK: 0x0000000100000f4b     27      3      1   0             0  end_sequence
 
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic2.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f50     19      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f54     20     18      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f5a     20     17      1   0             0 
-CHECK-NEXT: 0x0000000100000f5c     20     10      1   0             0 
-CHECK-NEXT: 0x0000000100000f61     15     10      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f70     20     23      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f74     20     36      1   0             0 
-CHECK-NEXT: 0x0000000100000f83     20     31      1   0             0 
-CHECK-NEXT: 0x0000000100000f85     20      3      1   0             0 
-CHECK-NEXT: 0x0000000100000f87     20      3      1   0             0  end_sequence
+CHECK: 0x0000000100000f50     19      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f54     20     18      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f5a     20     17      1   0             0
+CHECK: 0x0000000100000f5c     20     10      1   0             0
+CHECK: 0x0000000100000f61     15     10      1   0             0  is_stmt
+CHECK: 0x0000000100000f70     20     23      1   0             0  is_stmt
+CHECK: 0x0000000100000f74     20     36      1   0             0
+CHECK: 0x0000000100000f83     20     31      1   0             0
+CHECK: 0x0000000100000f85     20      3      1   0             0
+CHECK: 0x0000000100000f87     20      3      1   0             0  end_sequence
 
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic3.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f90     16      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f94     12     10      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f9a     17      7      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f9f     12     10      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fa7     20      1      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fa9     19     18      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fab     19     10      1   0             0 
-CHECK-NEXT: 0x0000000100000fb2     20      1      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fb4     20      1      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f90     16      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f94     12     10      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f9a     17      7      1   0             0  is_stmt
+CHECK: 0x0000000100000f9f     12     10      1   0             0  is_stmt
+CHECK: 0x0000000100000fa7     20      1      1   0             0  is_stmt
+CHECK: 0x0000000100000fa9     19     18      1   0             0  is_stmt
+CHECK: 0x0000000100000fab     19     10      1   0             0
+CHECK: 0x0000000100000fb2     20      1      1   0             0  is_stmt
+CHECK: 0x0000000100000fb4     20      1      1   0             0  is_stmt end_sequence
 
 CHECK: .debug_pubnames contents:
 CHECK-NEXT: length = 0x00000017 version = 0x0002 unit_offset = 0x00000000 unit_size = 0x00000077
 CHECK-NEXT: Offset     Name
 CHECK-NEXT: 0x0000002a "main"
 CHECK-NEXT: length = 0x0000002e version = 0x0002 unit_offset = 0x00000077 unit_size = 0x000000a4
 CHECK-NEXT: Offset     Name
 CHECK-NEXT: 0x00000031 "baz"

test/tools/dsymutil/X86/basic-lto-linking-x86.test

 CHECK-NEXT: Address Range Header: length = 0x0000002c, version = 0x0002, cu_offset = 0x0000013a, addr_size = 0x08, seg_size = 0x00
 CHECK-NEXT: [0x0000000100000f90 - 0x0000000100000fb4)
 
 
 CHECK: .debug_line contents
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic1.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f40     23      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f44     24      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f4b     24      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f40     23      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f44     24      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f4b     24      0      1   0             0  is_stmt end_sequence
 
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic2.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f50     19      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f54     20      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f63     15      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f72     20      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f89     20      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f50     19      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f54     20      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f63     15      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f72     20      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f89     20      0      1   0             0  is_stmt end_sequence
 
 CHECK:                 Dir  Mod Time   File Len   File Name
 CHECK-NEXT:                 ---- ---------- ---------- ---------------------------
 CHECK-NEXT: file_names[  1]    0 0x00000000 0x00000000 basic3.c
-CHECK: Address            Line   Column File   ISA Discriminator Flags
-CHECK-NEXT: ------------------ ------ ------ ------ --- ------------- -------------
-CHECK-NEXT: 0x0000000100000f90     16      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f94     12      0      1   0             0  is_stmt prologue_end
-CHECK-NEXT: 0x0000000100000f9a     17      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000f9f     12      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fa7     20      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fa9     19      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fb2     20      0      1   0             0  is_stmt
-CHECK-NEXT: 0x0000000100000fb4     20      0      1   0             0  is_stmt end_sequence
+CHECK: 0x0000000100000f90     16      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f94     12      0      1   0             0  is_stmt prologue_end
+CHECK: 0x0000000100000f9a     17      0      1   0             0  is_stmt
+CHECK: 0x0000000100000f9f     12      0      1   0             0  is_stmt
+CHECK: 0x0000000100000fa7     20      0      1   0             0  is_stmt
+CHECK: 0x0000000100000fa9     19      0      1   0             0  is_stmt
+CHECK: 0x0000000100000fb2     20      0      1   0             0  is_stmt
+CHECK: 0x0000000100000fb4     20      0      1   0             0  is_stmt end_sequence
 
 CHECK: .debug_pubnames contents:
 CHECK-NEXT: length = 0x00000017 version = 0x0002 unit_offset = 0x00000000 unit_size = 0x00000081
 CHECK-NEXT: Offset     Name
 CHECK-NEXT: 0x00000026 "main"
 CHECK-NEXT: length = 0x0000002e version = 0x0002 unit_offset = 0x00000081 unit_size = 0x000000b9
 CHECK-NEXT: Offset     Name
 CHECK-NEXT: 0x00000026 "private_int"

test/tools/llvm-dwarfdump/X86/brief.s

 # RUN: llvm-mc %s -filetype obj -triple x86_64-apple-darwin -o - \
-# RUN: | llvm-dwarfdump -debug-info - \
+# RUN: | llvm-dwarfdump --debug-info --debug-line - \
 # RUN: | FileCheck %s
 
 # CHECK-NOT: .debug_abbrev contents:
 #
 # CHECK: .debug_info contents:
 # CHECK: DW_TAG_compile_unit
 # CHECK-NOT: DW_FORM
 # CHECK: DW_AT_name        ("brief.c")
 # CHECK: DW_AT_name      ("main")
 # CHECK: DW_AT_name      ("int")
 # CHECK-NOT: debug_str
 # CHECK-NOT: DW_AT_type {{.*}} =>
-#
+
+# CHECK: Address            Line   Column File   ISA Discriminator Flags
+# CHECK-NEXT:------------------ ------ ------ ------ --- ------------- -------------
+# CHECK-NEXT:0x0000000000000000      1      0      1   0             0  is_stmt
+# CHECK-NEXT:0x0000000000000006      1     12      1   0             0  is_stmt prologue_end
+# CHECK-NEXT:0x0000000000000008      1     12      1   0             0  is_stmt end_sequence
+
 # CHECK-NOT: {{.*}} contents:
-#
+
 # This test is meant to verify that without specifying -verbose DW_FORMs and
 # abbreviation codes are hidden from .debug_info section. Furthermore it
-# verifies that it also hides .debug_str and die reference offsets into the CU.
+# verifies that it also hides .debug_str and die reference offsets into the CU
+# and that the .debug_line table is printed rather than the opcodes.
 
   .section  __TEXT,__text,regular,pure_instructions
   .macosx_version_min 10, 12
   .globl  _main                   ## -- Begin function main
   .p2align  4, 0x90
 _main:                                  ## @main
 Lfunc_begin0:
   .file 1 "brief.c"

test/tools/llvm-dwarfdump/X86/verbose.test

+# RUN: llvm-mc %S/brief.s -filetype obj -triple x86_64-apple-darwin -o - \
+# RUN: | llvm-dwarfdump -v --debug-info --debug-line - \
+# RUN: | FileCheck %s
+
+# CHECK-NOT: .debug_abbrev contents:
+
+# CHECK: .debug_info contents:
+# CHECK: DW_TAG_compile_unit [1]
+# CHECK: DW_AT_name [DW_FORM_strp] ( .debug_str[0x{{.*}}] = "brief.c")
+# CHECK: DW_AT_name [DW_FORM_strp]       ( .debug_str[0x{{.*}}] = "main")
+# CHECK: DW_AT_name [DW_FORM_strp]       ( .debug_str[0x{{.*}}] = "int")
+
+# CHECK: .debug_line contents:
+# CHECK: 00 DW_LNE_set_address (0x0000000000000000)
+# CHECK: 01 DW_LNS_copy
+# CHECK: 0x0000000000000000      1      0      1   0             0  is_stmt
+# CHECK: 05 DW_LNS_set_column (12)
+# CHECK: 0a DW_LNS_set_prologue_end
+# CHECK: 66 address += 89,  line += 0
+# CHECK: 0x0000000000000006      1     12      1   0             0  is_stmt prologue_end
+# CHECK: 02 DW_LNS_advance_pc (2)
+# CHECK: 00 DW_LNE_end_sequence
+# CHECK: 0x0000000000000008      1     12      1   0             0  is_stmt end_sequence
+#
+# CHECK-NOT: {{.*}} contents: