[SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors
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Authored by craig.topper on Sep 9 2017, 11:41 AM.

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Summary

This teach simplifyDemandedBits to handle constant splat vector shifts.

This required changing all the uses of getZExtValue to getLimitedValue since we can't rely on legalization using getShiftAmountTy for the shift amount.

I believe there may have been a bug in the ((X << C1) >>u ShAmt) handling where we didn't check if the inner shift was too large. I've fixed that here, but maybe I should split that out.

I had to add new patterns to ARM because the zext/sext the patterns were trying to look for got turned into an any_extend with this patch. Happy to split that out too, but not sure how to test without this change.

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rL LLVM
craig.topper created this revision.Sep 9 2017, 11:41 AM

Missed one ARM test change.

Adding ARM specialists

RKSimon added inline comments.Sep 9 2017, 1:06 PM
lib/CodeGen/SelectionDAG/TargetLowering.cpp
784 ↗(On Diff #114496)

Which do you think is better - getLimitedValue or using APInt::uge() which we do in other places?

Change to use APInt::uge in most places. There was one place where getLimitedValue was still convenient for a compound if condition.

LGTM - @t.p.northover @rengolin are you alright with the ARMInstrNEON.td fixes?

Any ARM specialist wanting to comment on the ARMInstrNEON.td change?

efriedma accepted this revision.Sep 25 2017, 11:55 AM

LGTM.

lib/Target/ARM/ARMInstrNEON.td
5537 ↗(On Diff #114500)

I guess the zext/sext patterns will still trigger if the value has multiple uses...?

This looks fine.

This revision is now accepted and ready to land.Sep 25 2017, 11:55 AM
This revision was automatically updated to reflect the committed changes.