[AArch64] Make "Unkown Fixup" error msg more useful by giving Fixup Kind Name

[mgrang]

Summary

Added KindName to error messages.
Renamed getFixupKindContainereSizeInBytes to getFixupKindContainerSizeInBytes.
Ran clang-format on AArch64AsmBackend.cpp.

[t.p.northover]

1. Is a functional change since it switches an assertion to an actual error report. It would be better to use "Ctx.reportError", and since I'm assuming you have places where this makes a difference to you, tests would be useful if possible. (If it was only useful in debugging an already fixed problem and you now can't trigger them we'd probably let it squeeze by, but the lack of tests should be called out and justified).
2. Trivial improvement, go ahead (you didn't need to post a patch for review for this kind of change). Shouldn't be part of the same commit as the others though.
3. Generally not encouraged since it messes up "git blame" history.

lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

 #include "llvm/Support/ErrorHandling.h"
 using namespace llvm;
 
 namespace {
 
 class AArch64AsmBackend : public MCAsmBackend {
   static const unsigned PCRelFlagVal =
       MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel;
+
 public:
   bool IsLittleEndian;
 
 public:
   AArch64AsmBackend(const Target &T, bool IsLittleEndian)
       : MCAsmBackend(), IsLittleEndian(IsLittleEndian) {}
 
   unsigned getNumFixupKinds() const override {
     return AArch64::NumTargetFixupKinds;
   }
 
   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
     const static MCFixupKindInfo Infos[AArch64::NumTargetFixupKinds] = {
         // This table *must* be in the order that the fixup_* kinds are defined
public:
   void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
                         MCInst &Res) const override;
   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
 
   void HandleAssemblerFlag(MCAssemblerFlag Flag) {}
 
   unsigned getPointerSize() const { return 8; }
 
-  unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
+  unsigned getFixupKindContainerSizeInBytes(unsigned Kind,
+                                            StringRef KindName) const;
 };
 
 } // end anonymous namespace
 
 /// \brief The number of bytes the fixup may change.
-static unsigned getFixupKindNumBytes(unsigned Kind) {
+static unsigned getFixupKindNumBytes(unsigned Kind, StringRef KindName) {
   switch (Kind) {
   default:
-    llvm_unreachable("Unknown fixup kind!");
+    report_fatal_error(Twine("Unknown fixup kind: ") + KindName);
 
   case AArch64::fixup_aarch64_tlsdesc_call:
     return 0;
 
   case FK_Data_1:
     return 1;
 
   case AArch64::fixup_aarch64_movw:

 
 static unsigned AdrImmBits(unsigned Value) {
   unsigned lo2 = Value & 0x3;
   unsigned hi19 = (Value & 0x1ffffc) >> 2;
   return (hi19 << 5) | (lo2 << 29);
 }
 
 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
-                                 MCContext &Ctx) {
+                                 MCContext &Ctx, StringRef KindName) {
   unsigned Kind = Fixup.getKind();
   int64_t SignedValue = static_cast<int64_t>(Value);
   switch (Kind) {
   default:
-    llvm_unreachable("Unknown fixup kind!");
+    report_fatal_error(Twine("Unknown fixup kind: ") + KindName);
   case AArch64::fixup_aarch64_pcrel_adr_imm21:
     if (SignedValue > 2097151 || SignedValue < -2097152)
       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");
     return AdrImmBits(Value & 0x1fffffULL);
   case AArch64::fixup_aarch64_pcrel_adrp_imm21:
     return AdrImmBits((Value & 0x1fffff000ULL) >> 12);
   case AArch64::fixup_aarch64_ldr_pcrel_imm19:
   case AArch64::fixup_aarch64_pcrel_branch19:
static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
   case FK_Data_4:
   case FK_Data_8:
   case FK_SecRel_2:
   case FK_SecRel_4:
     return Value;
   }
 }
 
-/// getFixupKindContainereSizeInBytes - The number of bytes of the
+/// getFixupKindContainerSizeInBytes - The number of bytes of the
 /// container involved in big endian or 0 if the item is little endian
-unsigned AArch64AsmBackend::getFixupKindContainereSizeInBytes(unsigned Kind) const {
+unsigned
+AArch64AsmBackend::getFixupKindContainerSizeInBytes(unsigned Kind,
+                                                    StringRef KindName) const {
   if (IsLittleEndian)
     return 0;
 
   switch (Kind) {
   default:
-    llvm_unreachable("Unknown fixup kind!");
+    report_fatal_error(Twine("Unknown fixup kind: ") + KindName);
 
   case FK_Data_1:
     return 1;
   case FK_Data_2:
     return 2;
   case FK_Data_4:
     return 4;
   case FK_Data_8:
case AArch64::fixup_aarch64_pcrel_call26:
     return 0;
   }
 }
 
 void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
                                    const MCValue &Target,
                                    MutableArrayRef<char> Data, uint64_t Value,
                                    bool IsResolved) const {
-  unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
+  MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
+  unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind(), Info.Name);
   if (!Value)
     return; // Doesn't change encoding.
-  MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
   MCContext &Ctx = Asm.getContext();
   // Apply any target-specific value adjustments.
-  Value = adjustFixupValue(Fixup, Value, Ctx);
+  Value = adjustFixupValue(Fixup, Value, Ctx, Info.Name);
 
   // Shift the value into position.
   Value <<= Info.TargetOffset;
 
   unsigned Offset = Fixup.getOffset();
   assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
 
   // Used to point to big endian bytes.
-  unsigned FulleSizeInBytes = getFixupKindContainereSizeInBytes(Fixup.getKind());
+  unsigned FulleSizeInBytes =
+      getFixupKindContainerSizeInBytes(Fixup.getKind(), Info.Name);
 
   // For each byte of the fragment that the fixup touches, mask in the
   // bits from the fixup value.
   if (FulleSizeInBytes == 0) {
     // Handle as little-endian
     for (unsigned i = 0; i != NumBytes; ++i) {
       Data[Offset + i] |= uint8_t((Value >> (i * 8)) & 0xff);
     }
enum CompactUnwindEncodings {
   UNWIND_ARM64_FRAME_X25_X26_PAIR = 0x00000008,
   UNWIND_ARM64_FRAME_X27_X28_PAIR = 0x00000010,
   UNWIND_ARM64_FRAME_D8_D9_PAIR = 0x00000100,
   UNWIND_ARM64_FRAME_D10_D11_PAIR = 0x00000200,
   UNWIND_ARM64_FRAME_D12_D13_PAIR = 0x00000400,
   UNWIND_ARM64_FRAME_D14_D15_PAIR = 0x00000800
 };
 
-} // end CU namespace
+} // namespace CU
 
 // FIXME: This should be in a separate file.
 class DarwinAArch64AsmBackend : public AArch64AsmBackend {
   const MCRegisterInfo &MRI;
 
   /// \brief Encode compact unwind stack adjustment for frameless functions.
   /// See UNWIND_ARM64_FRAMELESS_STACK_SIZE_MASK in compact_unwind_encoding.h.
   /// The stack size always needs to be 16 byte aligned.
   uint32_t encodeStackAdjustment(uint32_t StackSize) const {
     return (StackSize / 16) << 12;
   }
 
 public:
   DarwinAArch64AsmBackend(const Target &T, const MCRegisterInfo &MRI)
-      : AArch64AsmBackend(T, /*IsLittleEndian*/true), MRI(MRI) {}
+      : AArch64AsmBackend(T, /*IsLittleEndian*/ true), MRI(MRI) {}
 
   MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
     return createAArch64MachObjectWriter(OS, MachO::CPU_TYPE_ARM64,
                                          MachO::CPU_SUBTYPE_ARM64_ALL);
   }
 
   /// \brief Generate the compact unwind encoding from the CFI directives.
   uint32_t generateCompactUnwindEncoding(
-                             ArrayRef<MCCFIInstruction> Instrs) const override {
     if (Instrs.empty())
       return CU::UNWIND_ARM64_MODE_FRAMELESS;
 
     bool HasFP = false;
     unsigned StackSize = 0;
 
     uint32_t CompactUnwindEncoding = 0;
     for (size_t i = 0, e = Instrs.size(); i != e; ++i) {

 
 class ELFAArch64AsmBackend : public AArch64AsmBackend {
 public:
   uint8_t OSABI;
   bool IsILP32;
 
   ELFAArch64AsmBackend(const Target &T, uint8_t OSABI, bool IsLittleEndian,
                        bool IsILP32)
       : AArch64AsmBackend(T, IsLittleEndian), OSABI(OSABI), IsILP32(IsILP32) {}
 
   MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
     return createAArch64ELFObjectWriter(OS, OSABI, IsLittleEndian, IsILP32);
   }
 
   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
                              const MCValue &Target) override;
 };
bool ELFAArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
   // same page as the ADRP and the instruction should encode 0x0. Assuming the
   // section isn't 0x1000-aligned, we therefore need to delegate this decision
   // to the linker -- a relocation!
   if ((uint32_t)Fixup.getKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21)
     return true;
   return false;
 }
 
-}
+} // namespace
 
 namespace {
 class COFFAArch64AsmBackend : public AArch64AsmBackend {
 public:
   COFFAArch64AsmBackend(const Target &T, const Triple &TheTriple)
-      : AArch64AsmBackend(T, /*IsLittleEndian*/true) {}
+      : AArch64AsmBackend(T, /*IsLittleEndian*/ true) {}
 
   MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override {
     return createAArch64WinCOFFObjectWriter(OS);
   }
 };
-}
+} // namespace
 
 MCAsmBackend *llvm::createAArch64leAsmBackend(const Target &T,
                                               const MCRegisterInfo &MRI,
                                               const Triple &TheTriple,
                                               StringRef CPU,
                                               const MCTargetOptions &Options) {
   if (TheTriple.isOSBinFormatMachO())
     return new DarwinAArch64AsmBackend(T, MRI);