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[Power9] Exploit vinsertb instruction
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Authored by gyiu on Jun 21 2017, 9:34 PM.

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Summary

This patch adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles, and use P9 shift and vector insert instructions instead of load+vperm. This is related to differential https://reviews.llvm.org/D34160, but targets vectors of bytes instead of vectors of halfwords.

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Repository
rL LLVM

Event Timeline

gyiu created this revision.Jun 21 2017, 9:34 PM
kbarton accepted this revision.Aug 22 2017, 1:20 PM

Aside from some minor changes to the comments, this LGTM.

lib/Target/PowerPC/PPCISelLowering.cpp
7898 ↗(On Diff #103520)

... then we set(?) the rest of the Mask to be ...

7900 ↗(On Diff #103520)

you can probably drop (at least) one of the always from this sentence.

This revision is now accepted and ready to land.Aug 22 2017, 1:20 PM
This revision was automatically updated to reflect the committed changes.