After this patch, we finally have test cases that require multiple
instruction emission.
Depends on D33590
Differential D33596
[globalisel][tablegen] Add support for EXTRACT_SUBREG. dsanders on May 26 2017, 7:10 AM. Authored by
Details After this patch, we finally have test cases that require multiple Depends on D33590
Diff Detail
Event TimelineComment Actions After re-testing this on current trunk, there's a bug in X86 due to GR64 not fully supporting the 8bit subregister index. I'll fix this shortly using failedImport() for this case since we don't have multi-insn emission quite yet. The following patches introduce the infrastructure for it. Comment Actions Fix the X86 machine verifier bug where EXTRACT_SUBREG could emit a subregister Comment Actions Could you re-upload the patch without the diffs from https://reviews.llvm.org/D33590?
Comment Actions Can you add a tablegen testcase?
Comment Actions Fix the nits ( -> /, Optional<std::pair<...>>, etc.) Made the change requested for AArch64InstructionSelector.cpp as far as Comment Actions Can you add a tablegen testcase? If nothing else, it's a good way to document the tablegen backend.
Comment Actions Sure.
|
Huh, OK; I thought we did have a helper somewhere (that computes the class of all subregisters of a superregister class via a given index).