[globalisel] OperandPredicateMatcher's shouldn't need to generate the MachineOperand expr. NFC

[dsanders]

Summary

Each OperandPredicateMatcher shouldn't need to know how to generate the expression
to reference a MachineOperand. The OperandMatcher should provide it.

In addition to separating responsibilities, this also lays some groundwork for
decoupling source patterns from destination patterns to allow invented operands
or operands provided by GlobalISel's equivalent to the ComplexPattern<> class.

Depends on D29709

[rovka]

utils/TableGen/GlobalISelEmitter.cpp

133–134

This comment is out of date.

[dsanders]

Fix out of date comment.

[ab]

utils/TableGen/GlobalISelEmitter.cpp

186

"const StringRef" -> StringRef

(I now realize we had the same elsewhere; fixed that in r294555).

[dsanders]

utils/TableGen/GlobalISelEmitter.cpp

186

What's wrong with 'const StringRef'? Why should InsnVarName be assignable?

[dsanders]

Rebased to trunk

test/TableGen/GlobalISelEmitter.td

 
 // CHECK: bool MyTargetInstructionSelector::selectImpl(MachineInstr &I) const {
 // CHECK: const MachineRegisterInfo &MRI = I.getParent()->getParent()->getRegInfo();
 
 
 //===- Test a simple pattern with regclass operands. ----------------------===//
 
 // CHECK: if ((I.getOpcode() == TargetOpcode::G_ADD) &&
-// CHECK-NEXT: (((MRI.getType(I.getOperand(0).getReg()) == (LLT::scalar(32))) &&
+// CHECK-NEXT: ((/* Operand 0 */ (MRI.getType(I.getOperand(0).getReg()) == (LLT::scalar(32))) &&
 // CHECK-NEXT:  ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(I.getOperand(0).getReg(), MRI, TRI))))) &&
-// CHECK-NEXT: (((MRI.getType(I.getOperand(1).getReg()) == (LLT::scalar(32))) &&
+// CHECK-NEXT: ((/* Operand 1 */ (MRI.getType(I.getOperand(1).getReg()) == (LLT::scalar(32))) &&
 // CHECK-NEXT:  ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(I.getOperand(1).getReg(), MRI, TRI))))) &&
-// CHECK-NEXT: (((MRI.getType(I.getOperand(2).getReg()) == (LLT::scalar(32))) &&
+// CHECK-NEXT: ((/* Operand 2 */ (MRI.getType(I.getOperand(2).getReg()) == (LLT::scalar(32))) &&
 // CHECK-NEXT:  ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(I.getOperand(2).getReg(), MRI, TRI)))))) {
 
 // CHECK-NEXT:   // (add:i32 GPR32:i32:$src1, GPR32:i32:$src2) => (ADD:i32 GPR32:i32:$src1, GPR32:i32:$src2)
 // CHECK-NEXT:   I.setDesc(TII.get(MyTarget::ADD));
 // CHECK-NEXT:   constrainSelectedInstRegOperands(I, TII, TRI, RBI);
 // CHECK-NEXT:   return true;
 // CHECK-NEXT: }
 
 def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2),
             [(set GPR32:$dst, (add GPR32:$src1, GPR32:$src2))]>;
 
 //===- Test a pattern with an MBB operand. --------------------------------===//
 
 // CHECK: if ((I.getOpcode() == TargetOpcode::G_BR) &&
-// CHECK-NEXT: (((I.getOperand(0).isMBB())))) {
+// CHECK-NEXT: ((/* Operand 0 */ (I.getOperand(0).isMBB())))) {
 
 // CHECK-NEXT:   // (br (bb:Other):$target) => (BR (bb:Other):$target)
 // CHECK-NEXT:   I.setDesc(TII.get(MyTarget::BR));
 // CHECK-NEXT:   constrainSelectedInstRegOperands(I, TII, TRI, RBI);
 // CHECK-NEXT:   return true;
 // CHECK-NEXT: }
 
 def BR : I<(outs), (ins unknown:$target),
             [(br bb:$target)]>;

utils/TableGen/GlobalISelEmitter.cpp

 ///
 /// Typical predicates include:
 /// * Operand is a particular register.
 /// * Operand is assigned a particular register bank.
 /// * Operand is an MBB.
 class OperandPredicateMatcher {
 public:
   virtual ~OperandPredicateMatcher() {}
 
-  /// Emit a C++ expression that checks the predicate for the OpIdx operand of
-  /// the instruction given in InsnVarName.
-  virtual void emitCxxPredicateExpr(raw_ostream &OS, StringRef InsnVarName,
-                                    unsigned OpIdx) const = 0;
+  /// Emit a C++ expression that checks the predicate for the given operand.
+  virtual void emitCxxPredicateExpr(raw_ostream &OS,
+                                    StringRef OperandExpr) const = 0;
 };
 
 /// Generates code to check that an operand is a particular LLT.
 class LLTOperandMatcher : public OperandPredicateMatcher {
 protected:
   std::string Ty;
 
 public:
   LLTOperandMatcher(std::string Ty) : Ty(Ty) {}
 
-  void emitCxxPredicateExpr(raw_ostream &OS, StringRef InsnVarName,
-                            unsigned OpIdx) const override {
-    OS << "MRI.getType(" << InsnVarName << ".getOperand(" << OpIdx
-       << ").getReg()) == (" << Ty << ")";
+  void emitCxxPredicateExpr(raw_ostream &OS,
+                            StringRef OperandExpr) const override {
+    OS << "MRI.getType(" << OperandExpr << ".getReg()) == (" << Ty << ")";
   }
 };
 
 /// Generates code to check that an operand is in a particular register bank.
 class RegisterBankOperandMatcher : public OperandPredicateMatcher {
 protected:
   const CodeGenRegisterClass &RC;
 
 public:
   RegisterBankOperandMatcher(const CodeGenRegisterClass &RC) : RC(RC) {}
 
-  void emitCxxPredicateExpr(raw_ostream &OS, StringRef InsnVarName,
-                            unsigned OpIdx) const override {
+  void emitCxxPredicateExpr(raw_ostream &OS,
+                            StringRef OperandExpr) const override {
     OS << "(&RBI.getRegBankFromRegClass(" << RC.getQualifiedName()
-       << "RegClass) == RBI.getRegBank(" << InsnVarName << ".getOperand("
-       << OpIdx << ").getReg(), MRI, TRI))";
+       << "RegClass) == RBI.getRegBank(" << OperandExpr
+       << ".getReg(), MRI, TRI))";
   }
 };
 
 /// Generates code to check that an operand is a basic block.
 class MBBOperandMatcher : public OperandPredicateMatcher {
 public:
-  void emitCxxPredicateExpr(raw_ostream &OS, StringRef InsnVarName,
-                            unsigned OpIdx) const override {
-    OS << InsnVarName << ".getOperand(" << OpIdx << ").isMBB()";
+  void emitCxxPredicateExpr(raw_ostream &OS,
+                            StringRef OperandExpr) const override {
+    OS << OperandExpr << ".isMBB()";
   }
 };
 
 /// Generates code to check that a set of predicates match for a particular
 /// operand.
 class OperandMatcher : public PredicateListMatcher<OperandPredicateMatcher> {
 protected:
   unsigned OpIdx;
 
 public:
   OperandMatcher(unsigned OpIdx) : OpIdx(OpIdx) {}
+  std::string getOperandExpr(StringRef InsnVarName) const {
+    return (InsnVarName + ".getOperand(" + std::to_string(OpIdx) + ")").str();
+  }
 
   /// Emit a C++ expression that tests whether the instruction named in
   /// InsnVarName matches all the predicate and all the operands.
   void emitCxxPredicateExpr(raw_ostream &OS, StringRef InsnVarName) const {
-    OS << "(";
-    emitCxxPredicateListExpr(OS, InsnVarName, OpIdx);
+    OS << "(/* Operand " << OpIdx << " */ ";
+    emitCxxPredicateListExpr(OS, getOperandExpr(InsnVarName));
     OS << ")";
   }
 };
 
 /// Generates code to check a predicate on an instruction.
 ///
 /// Typical predicates include:
 /// * The opcode of the instruction is a particular value.