[TargetLowering] fix isConstTrueVal to account for build vector truncation

[spatel]

Summary

Build vectors have magical truncation powers, so we have things like this:

v4i1 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1>
v4i16 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1>

If we don't truncate the splat node returned by getConstantSplatNode(), then we won't find truth when ZeroOrNegativeOneBooleanContent is the rule.

Note: I was hoping that ISD::isConstantSplatVector() would have worked here, but it doesn't because it has this bitsize check which I don't understand yet:

return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs) &&
       EltVT.getSizeInBits() >= SplatBitSize;

[efriedma]

I was hoping that ISD::isConstantSplatVector() would have worked here, but it doesn't

I'd rather fix this, unless you think the check is important for some reason.

[spatel]

In D32505#737448, @efriedma wrote:

I was hoping that ISD::isConstantSplatVector() would have worked here, but it doesn't

I'd rather fix this, unless you think the check is important for some reason.

BuildVectorSDNode::isConstantSplat() is broken for a truncating BV. For the bool vec cases we're seeing here, it's claiming that the splat val is a 4-bit APInt with value 15.

I'm not sure if it should just assert that the input vector has at least byte-sized elements:

while (VecWidth > 8) {

(it takes endianness as a param too)
or if it needs to take truncation into account.

If I just change that loop check to (VecWidth > 2), we crash several regression tests.
So I'd like to fix it too, but I'd rather not gate this patch on that if that's alright?

[efriedma]

Sure. LGTM.

[spatel]

Thanks, Eli! I added some FIXME notes in:
rL301403

I'll commit this, then update D31944, then see if I can make sense of our splat detection. :)

lib/CodeGen/SelectionDAG/TargetLowering.cpp

assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
          " is a target node!");
   return 1;
 }
 
 bool TargetLowering::isConstTrueVal(const SDNode *N) const {
   if (!N)
     return false;
 
-  const ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N);
-  if (!CN) {
-    const BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N);
-    if (!BV)
+  APInt CVal;
+  if (auto *CN = dyn_cast<ConstantSDNode>(N)) {
+    CVal = CN->getAPIntValue();
+  } else if (auto *BV = dyn_cast<BuildVectorSDNode>(N)) {
+    auto *CN = BV->getConstantSplatNode();
+    if (!CN)
       return false;
 
-    // Only interested in constant splats, we don't care about undef
-    // elements in identifying boolean constants and getConstantSplatNode
-    // returns NULL if all ops are undef;
-    CN = BV->getConstantSplatNode();
-    if (!CN)
-      return false;
+    // If this is a truncating build vector, truncate the splat value.
+    // Otherwise, we may fail to match the expected values below.
+    unsigned BVEltWidth = BV->getValueType(0).getScalarSizeInBits();
+    CVal = CN->getAPIntValue();
+    if (BVEltWidth < CVal.getBitWidth())
+      CVal = CVal.trunc(BVEltWidth);
+  } else {
   }
 
   switch (getBooleanContents(N->getValueType(0))) {
   case UndefinedBooleanContent:
-    return CN->getAPIntValue()[0];
+    return CVal[0];
   case ZeroOrOneBooleanContent:
-    return CN->isOne();
+    return CVal == 1;
   case ZeroOrNegativeOneBooleanContent:
-    return CN->isAllOnesValue();
+    return CVal.isAllOnesValue();
   }
 
   llvm_unreachable("Invalid boolean contents");
 }
 
 SDValue TargetLowering::getConstTrueVal(SelectionDAG &DAG, EVT VT,
                                         const SDLoc &DL) const {
   unsigned ElementWidth = VT.getScalarSizeInBits();

test/CodeGen/X86/setcc-combine.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic < %s | FileCheck %s
 
 define i32 @test_eq_1(<4 x i32> %A, <4 x i32> %B) {
 ; CHECK-LABEL: test_eq_1:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pcmpgtd %xmm0, %xmm1
-; CHECK-NEXT:    pxor {{.*}}(%rip), %xmm1
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT:    pxor %xmm1, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
 ; CHECK-NEXT:    movd %xmm0, %eax
-; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    negl %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp slt <4 x i32> %A, %B
   %sext = sext <4 x i1> %cmp to <4 x i32>
   %cmp1 = icmp eq <4 x i32> %sext, zeroinitializer
   %t0 = extractelement <4 x i1> %cmp1, i32 1
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }
; CHECK-NEXT:    retq
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }
 
 define i32 @test_ge_1(<4 x i32> %A, <4 x i32> %B) {
 ; CHECK-LABEL: test_ge_1:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pcmpgtd %xmm0, %xmm1
-; CHECK-NEXT:    pxor {{.*}}(%rip), %xmm1
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm0
+; CHECK-NEXT:    pxor %xmm1, %xmm0
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
 ; CHECK-NEXT:    movd %xmm0, %eax
-; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    negl %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp slt <4 x i32> %A, %B
   %sext = sext <4 x i1> %cmp to <4 x i32>
   %cmp1 = icmp sge <4 x i32> %sext, zeroinitializer
   %t0 = extractelement <4 x i1> %cmp1, i32 1
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }
; CHECK-NEXT:    retq
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }
 
 define i32 @test_eq_2(<4 x i32> %A, <4 x i32> %B) {
 ; CHECK-LABEL: test_eq_2:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pcmpgtd %xmm1, %xmm0
-; CHECK-NEXT:    pxor {{.*}}(%rip), %xmm0
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
+; CHECK-NEXT:    pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT:    pxor %xmm0, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
 ; CHECK-NEXT:    movd %xmm0, %eax
-; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    negl %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp slt <4 x i32> %B, %A
   %sext = sext <4 x i1> %cmp to <4 x i32>
   %cmp1 = icmp eq <4 x i32> %sext, zeroinitializer
   %t0 = extractelement <4 x i1> %cmp1, i32 1
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }
; CHECK-NEXT:    retq
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }
 
 define i32 @test_le_2(<4 x i32> %A, <4 x i32> %B) {
 ; CHECK-LABEL: test_le_2:
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    pcmpgtd %xmm1, %xmm0
-; CHECK-NEXT:    pxor {{.*}}(%rip), %xmm0
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
+; CHECK-NEXT:    pcmpeqd %xmm1, %xmm1
+; CHECK-NEXT:    pxor %xmm0, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
 ; CHECK-NEXT:    movd %xmm0, %eax
-; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    negl %eax
 ; CHECK-NEXT:    retq
   %cmp = icmp slt <4 x i32> %B, %A
   %sext = sext <4 x i1> %cmp to <4 x i32>
   %cmp1 = icmp sle <4 x i32> zeroinitializer, %sext
   %t0 = extractelement <4 x i1> %cmp1, i32 1
   %t1 = sext i1 %t0 to i32
   ret i32 %t1
 }