[AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a clobber.

[gberry]

Summary

When searching for load/store instructions to pair/merge don't treat
writes to WZR/XZR as clobbers since they don't change the value read
from WZR/XZR (which is always 0).

[junbuml]

test/CodeGen/AArch64/ldst-opt.ll

1559 ↗

(On Diff #78736)

typo: pariing

1561 ↗

(On Diff #78736)

I cannot see difference with/without this patch in this test. It appears that there is no instruction between the two stores.

[gberry]

test/CodeGen/AArch64/ldst-opt.ll

1561 ↗

(On Diff #78736)

This test is sensitive to changes in instruction scheduling. I can re-write this as a MIR test that just runs the aarch64-ldst optimization to make it more robust.

[gberry]

Fix typo and update test to MIR so it isn't effected by changes in instruction scheduling.

[junbuml]

LGTM

llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

if (MO.isRegMask())
       ModifiedRegs.setBitsNotInMask(MO.getRegMask());
 
     if (!MO.isReg())
       continue;
     unsigned Reg = MO.getReg();
     if (!Reg)
       continue;
     if (MO.isDef()) {
+      // WZR/XZR are not modified even when used as a destination register.
+      if (Reg != AArch64::WZR && Reg != AArch64::XZR)
         for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
           ModifiedRegs.set(*AI);
     } else {
       assert(MO.isUse() && "Reg operand not a def and not a use?!?");
       for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
         UsedRegs.set(*AI);
     }
   }
 }
 

llvm/trunk/test/CodeGen/MIR/AArch64/ldst-opt-zr-clobber.mir

+
+# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt  -verify-machineinstrs  -o - %s | FileCheck %s
+
+--- |
+  define i1 @no-clobber-zr(i64* %p, i64 %x) { ret i1 0 }
+...
+---
+# Check that write of xzr doesn't inhibit pairing of xzr stores since
+# it isn't actually clobbered.  Written as a MIR test to avoid
+# schedulers reordering instructions such that SUBS doesn't appear
+# between stores.
+# CHECK-LABEL: name: no-clobber-zr
+# CHECK: STPXi %xzr, %xzr, %x0, 0
+name: no-clobber-zr
+body: |
+  bb.0:
+    liveins: %x0,  %x1
+    STRXui %xzr, %x0, 0 :: (store 8 into %ir.p)
+    dead %xzr = SUBSXri killed %x1, 0, 0, implicit-def %nzcv
+    %w8 = CSINCWr %wzr, %wzr, 1, implicit killed %nzcv
+    STRXui %xzr, killed %x0, 1 :: (store 8 into %ir.p)
+    %w0 = ORRWrs %wzr, killed %w8, 0
+    RET %lr, implicit %w0
+...
+
+
+