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junbuml (Jun Bum Lim)
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Jul 31 2015, 2:27 PM (175 w, 4 d)

Recent Activity

Tue, Nov 13

junbuml added a comment to D54244: [HotColdSplitting] Refine definition of unlikelyExecuted.

Thanks for the update. Just one minor comment inlined.

Tue, Nov 13, 11:40 AM

Nov 9 2018

junbuml added inline comments to D54312: [CSP, Cloning] Update DuplicateInstructionsInSplitBetween to use DomTreeUpdater..
Nov 9 2018, 9:45 AM
junbuml added a reviewer for D54244: [HotColdSplitting] Refine definition of unlikelyExecuted: brzycki.
Nov 9 2018, 8:40 AM
junbuml added a comment to D54244: [HotColdSplitting] Refine definition of unlikelyExecuted.

Thanks Vedant for handling this. Overall I agree with this change, but I believe it's good to break this patch down into three parts and get each of them reviewed separately :

  1. Mark @llvm.trap cold.
  2. Do not treat noreturn calls as cold unless they are actually marked cold.
  3. Do not treat inline asm as an outlining barrier.

Or

  1. Mark @llvm.trap cold.
  2. Do not treat noreturn calls as cold unless they are actually marked cold, and Do not treat inline asm as an outlining barrier.
Nov 9 2018, 8:33 AM

Nov 8 2018

junbuml accepted D44627: [CallSiteSplitting] Only record conditions up to the IDom(call site)..

Thanks for revisiting this.
LGTM.

Nov 8 2018, 1:25 PM
junbuml abandoned D41782: [CallSiteSplitting]use constrained argument from single predecessors.

Thanks Florian for the update.

Nov 8 2018, 9:50 AM

Nov 7 2018

junbuml added a comment to D53887: [HotColdSplitting] Outline more than once per function.

I guess it would be good to give some stress test on this pass to see if there is any hidden bug by relaxing conditions in unlikelyExecuted(). As we treat more blocks as cold without being limited on unlikelyExecuted(), we maybe able to expose hidden issues with it.

Nov 7 2018, 12:56 PM
junbuml added a comment to D53887: [HotColdSplitting] Outline more than once per function.

IMHO the right fix is to not treat noreturn calls as cold (also as a follow-up).

Nov 7 2018, 12:52 PM

Nov 6 2018

junbuml added inline comments to D53887: [HotColdSplitting] Outline more than once per function.
Nov 6 2018, 1:10 PM
junbuml added inline comments to D53887: [HotColdSplitting] Outline more than once per function.
Nov 6 2018, 11:53 AM
junbuml added inline comments to D53887: [HotColdSplitting] Outline more than once per function.
Nov 6 2018, 11:22 AM

Nov 5 2018

junbuml added inline comments to D53887: [HotColdSplitting] Outline more than once per function.
Nov 5 2018, 1:20 PM

Oct 29 2018

junbuml added inline comments to D53824: [HotColdSplitting] Allow outlining single-block cold regions.
Oct 29 2018, 1:02 PM

Oct 25 2018

junbuml added a comment to D52671: [InstCombine] Skip merging non-free GEP.

Kindly ping one more time.

Oct 25 2018, 10:15 AM

Oct 22 2018

junbuml added a comment to D52671: [InstCombine] Skip merging non-free GEP.

Kindly ping.

Oct 22 2018, 9:09 AM

Oct 12 2018

junbuml added a comment to D52671: [InstCombine] Skip merging non-free GEP.

With the last modification I made based on Eli's comment, I didn't see any significant changes in size / performance in my spec2000 test on AArch64. Observed minor performance improvement in some internal benchmarks.

Oct 12 2018, 9:10 AM

Oct 10 2018

junbuml updated the diff for D52671: [InstCombine] Skip merging non-free GEP.

Tried to handle Eli's comment. Please take a look and let me know any comment.

Oct 10 2018, 3:16 PM

Oct 2 2018

junbuml added inline comments to D52671: [InstCombine] Skip merging non-free GEP.
Oct 2 2018, 9:28 AM

Oct 1 2018

junbuml added inline comments to D52671: [InstCombine] Skip merging non-free GEP.
Oct 1 2018, 2:34 PM
junbuml added a comment to D52671: [InstCombine] Skip merging non-free GEP.

Do you have perf/size numbers?

I didn't see any degradation in size/perf in my spec2000. Just observed minor performance improvement in some internal benchmarks.

Oct 1 2018, 1:10 PM

Sep 28 2018

junbuml added reviewers for D52671: [InstCombine] Skip merging non-free GEP: sebpop, dneilson, efriedma, davide.
Sep 28 2018, 1:52 PM
junbuml created D52671: [InstCombine] Skip merging non-free GEP.
Sep 28 2018, 1:42 PM

Sep 11 2018

junbuml accepted D51919: [CallSiteSplitting] Add debug location to created PHI nodes..

LGTM

Sep 11 2018, 9:04 AM · debug-info

Sep 6 2018

junbuml added a comment to D46193: [LSR] Skip LSR if the cost of input is cheaper than LSR's solution.

Compile it with clang -target hexagon -O3. The code you added eventually punts (FormInputLSRUseAndFormula returns false), and LSR proceeds to do its thing. I did some analysis, and the problem is with %add.ptr = getelementptr inbounds i32, i32* %2, i32 %Col.0. This is not an "address use", since it goes into another GEP. It exists in the original source, but LSR never looks at it. Your code does and that makes it exit early. Maybe you should restrict the uses you look at to the same ones that LSR starts with?

Sep 6 2018, 2:51 PM
junbuml updated the diff for D46193: [LSR] Skip LSR if the cost of input is cheaper than LSR's solution.

Sorry for the extremely long delay on this change. Now I just updated the patch. Please take a look and let me know any comment.

Sep 6 2018, 2:38 PM

Aug 17 2018

junbuml committed rL340069: Test commit.
Test commit
Aug 17 2018, 11:41 AM

May 24 2018

junbuml committed rL333198: [LICM] Preserve DT and LoopInfo specifically.
[LICM] Preserve DT and LoopInfo specifically
May 24 2018, 9:02 AM
junbuml closed D46775: [LICM] Preserve DT and LoopInfo specifically.
May 24 2018, 9:02 AM

May 23 2018

junbuml accepted D47269: [CodeGen] Use RegUnits to track register aliases in AArch64RedundantCopyElimination. (NFC).

LGTM too. DomBBUsedRegs and OptBBUsedRegs are not really used, but keeping both DefedRegs and UsedRegs seems clearer than creating extra functions in LiveRegUnits.

May 23 2018, 10:14 AM
junbuml added a comment to D46775: [LICM] Preserve DT and LoopInfo specifically.
May 23 2018, 7:43 AM

May 17 2018

junbuml added inline comments to D46775: [LICM] Preserve DT and LoopInfo specifically.
May 17 2018, 9:41 AM

May 16 2018

junbuml added inline comments to D46775: [LICM] Preserve DT and LoopInfo specifically.
May 16 2018, 2:23 PM
junbuml updated the diff for D46775: [LICM] Preserve DT and LoopInfo specifically.

Addressed Michael's comment.

May 16 2018, 2:23 PM
junbuml added a comment to D46775: [LICM] Preserve DT and LoopInfo specifically.

Thanks Daniel for the review.
I agree that ideally LICM should preserve the CFG, and this change could potentially impact the compile time. However, I think this is the safest fix at this moment without a mess of updating extra analysis passes. In current pipelines (-O3, -O2, -O1, -Oz, and -Os), I looked at -debug-pass=Executions, and didn't see any extra execution of analysis passes after this change.

May 16 2018, 11:25 AM

May 11 2018

junbuml created D46775: [LICM] Preserve DT and LoopInfo specifically.
May 11 2018, 1:58 PM

May 1 2018

junbuml added inline comments to D45110: [PostRASink]Sink spill to a block reachable to reload.
May 1 2018, 11:12 AM
junbuml updated the diff for D45110: [PostRASink]Sink spill to a block reachable to reload.

Refactors this change based on current tip. Made the check for load from FI more conservative.

May 1 2018, 11:12 AM

Apr 27 2018

junbuml committed rL331072: [PostRASink] extend the live-in check for all aliased registers.
[PostRASink] extend the live-in check for all aliased registers
Apr 27 2018, 1:02 PM
junbuml committed rL331066: [CodeGen] Use RegUnits to track register aliases (NFC).
[CodeGen] Use RegUnits to track register aliases (NFC)
Apr 27 2018, 11:49 AM
junbuml closed D45695: [CodeGen] Use RegUnits to track register aliases (NFC).
Apr 27 2018, 11:49 AM
junbuml added a comment to D45695: [CodeGen] Use RegUnits to track register aliases (NFC).

Thanks Sebastian for your review!

Apr 27 2018, 11:48 AM
junbuml added a comment to D45695: [CodeGen] Use RegUnits to track register aliases (NFC).

Kindly ping.
Matthias, please let me know if this change is still okay with you.

Apr 27 2018, 9:29 AM
junbuml created D46193: [LSR] Skip LSR if the cost of input is cheaper than LSR's solution.
Apr 27 2018, 8:39 AM

Apr 26 2018

Herald added a reviewer for D45110: [PostRASink]Sink spill to a block reachable to reload: javed.absar.

Kindly ping?

Apr 26 2018, 1:43 PM

Apr 25 2018

junbuml added inline comments to D46039: Fix compile time hang in LSR.
Apr 25 2018, 12:37 PM
junbuml added inline comments to D46039: Fix compile time hang in LSR.
Apr 25 2018, 8:41 AM
junbuml added a comment to D46039: Fix compile time hang in LSR.

Now reassociations lookup is bounded only by Depth. If there are reasonable amount of reassociations on each level ~16, the whole number would not exceed ~16^3 which is ok.

Apr 25 2018, 7:46 AM

Apr 24 2018

junbuml updated the diff for D45817: [PostRASink] extend the live-in check for all aliased registers.

Thanks Quentin for the review.

Apr 24 2018, 9:21 AM
junbuml updated the diff for D45695: [CodeGen] Use RegUnits to track register aliases (NFC).

Just a minor change in accumulateUsedDefed(). Please let me know any comment.

Apr 24 2018, 9:21 AM

Apr 19 2018

junbuml added a comment to D45695: [CodeGen] Use RegUnits to track register aliases (NFC).

Hi Matthias,
Please let me know if my change in LiveRegUnits is okay with you.
Thanks,
Jun

Apr 19 2018, 3:04 PM
junbuml added a child revision for D45695: [CodeGen] Use RegUnits to track register aliases (NFC): D45817: [PostRASink] extend the live-in check for all aliased registers.
Apr 19 2018, 7:22 AM
junbuml added a parent revision for D45817: [PostRASink] extend the live-in check for all aliased registers: D45695: [CodeGen] Use RegUnits to track register aliases (NFC).
Apr 19 2018, 7:22 AM
junbuml removed a child revision for D45817: [PostRASink] extend the live-in check for all aliased registers: D45695: [CodeGen] Use RegUnits to track register aliases (NFC).
Apr 19 2018, 7:21 AM
junbuml removed a parent revision for D45695: [CodeGen] Use RegUnits to track register aliases (NFC): D45817: [PostRASink] extend the live-in check for all aliased registers.
Apr 19 2018, 7:21 AM
junbuml added a parent revision for D45695: [CodeGen] Use RegUnits to track register aliases (NFC): D45817: [PostRASink] extend the live-in check for all aliased registers.
Apr 19 2018, 7:19 AM
junbuml added a child revision for D45817: [PostRASink] extend the live-in check for all aliased registers: D45695: [CodeGen] Use RegUnits to track register aliases (NFC).
Apr 19 2018, 7:19 AM
junbuml created D45817: [PostRASink] extend the live-in check for all aliased registers.
Apr 19 2018, 7:18 AM

Apr 18 2018

junbuml updated the diff for D45695: [CodeGen] Use RegUnits to track register aliases (NFC).

Addressed Matthias' comment by moving TargetInstrInfo::trackRegDefsUses into LiveRegUnits::accumulateUsedDefed.

Apr 18 2018, 8:08 AM

Apr 17 2018

junbuml added a comment to D45695: [CodeGen] Use RegUnits to track register aliases (NFC).

Have you seen LiveRegUnits::accumulate() glancing over the code here (and earlier) it seems to me that TII::tracksRegDefsUses() was just invented to do the same thing: figuring out which registers are free/usable over a range of instructions...

Apr 17 2018, 8:15 AM

Apr 16 2018

junbuml created D45695: [CodeGen] Use RegUnits to track register aliases (NFC).
Apr 16 2018, 10:00 AM

Apr 13 2018

junbuml committed rL330018: [PostRASink]Add register dependency check for implicit operands.
[PostRASink]Add register dependency check for implicit operands
Apr 13 2018, 7:26 AM
junbuml closed D44958: [PostRASink]Add register dependency check for implicit operands.
Apr 13 2018, 7:26 AM
junbuml added a reviewer for D45608: [CallSiteSplit] Make sure we remove nonnull if the parameter turns out to be a constant.: fhahn.
Apr 13 2018, 7:06 AM
junbuml added a comment to D45608: [CallSiteSplit] Make sure we remove nonnull if the parameter turns out to be a constant..

Thanks for handling this. Just curious if you see any issue with the non-null attribute in a constant ?

Apr 13 2018, 7:03 AM

Apr 12 2018

junbuml updated the diff for D44958: [PostRASink]Add register dependency check for implicit operands.

Addressed Francis' comment.

Apr 12 2018, 2:17 PM
junbuml added inline comments to D44958: [PostRASink]Add register dependency check for implicit operands.
Apr 12 2018, 11:23 AM
junbuml added a comment to D44958: [PostRASink]Add register dependency check for implicit operands.

Even without LiveRegUnits, I think you could replace ModifiedRegs and UsedRegs to be ModifiedRegUnits and UsedRegUnits, and use MCRegUnitIterators to check if registers alias.
I'm ok to commit this and follow-up in separate patches for the rest. Thanks!

Apr 12 2018, 7:35 AM

Apr 11 2018

junbuml added inline comments to D45524: Fix incorrect choice of callee-saved registers save/restore points.
Apr 11 2018, 10:57 AM

Apr 9 2018

junbuml added a comment to D45110: [PostRASink]Sink spill to a block reachable to reload.

My initial motivation case for this was when spilling the incoming argument register. This is somewhat related with the initial motivation of PostRASink pass because we do not sink the COPY for argument register before allocating. When RA try to spill the incoming argument register, it probably don't want to change the placement of the spill during RA, since sinking it down will extend the live range of the spilled value. So I do this after RA just like we did it for Copy in PostRASink pass.

Apr 9 2018, 11:10 AM
junbuml added inline comments to D44958: [PostRASink]Add register dependency check for implicit operands.
Apr 9 2018, 10:13 AM
junbuml updated the diff for D44958: [PostRASink]Add register dependency check for implicit operands.

Just minor update in comments.

Apr 9 2018, 10:08 AM

Apr 6 2018

junbuml added a comment to D44958: [PostRASink]Add register dependency check for implicit operands.
What do you think about using register units throughout the pass? I found them so much clearer to use when dealing with register aliases.
Apr 6 2018, 10:28 AM

Apr 4 2018

junbuml added a comment to D45110: [PostRASink]Sink spill to a block reachable to reload.

With/without this change, I collected llvm stats for spec2000/2006/2017 on AArch64. I observed +31.87% more loads from stores promoted in AArch64LoadStoreOptimizer pass, and minor improvement in shrink-wrapping in case spills are sunk from the entry.

Apr 4 2018, 8:58 AM
junbuml added a comment to D44958: [PostRASink]Add register dependency check for implicit operands.

Ping ?

Apr 4 2018, 8:58 AM
junbuml added inline comments to D45130: [CallSiteSplitting] Do not perform callsite splitting inside landing pad.
Apr 4 2018, 8:18 AM

Apr 3 2018

junbuml added a reviewer for D45110: [PostRASink]Sink spill to a block reachable to reload: rnk.
Apr 3 2018, 1:11 PM
junbuml updated the diff for D45110: [PostRASink]Sink spill to a block reachable to reload.
Apr 3 2018, 1:11 PM
junbuml committed rL329095: [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap.
[CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap
Apr 3 2018, 11:20 AM
junbuml closed D45183: [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap.
Apr 3 2018, 11:20 AM
junbuml updated the diff for D45183: [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap.

Added NoVRegs for ShrinkWrap as well.
Updated summary and title.

Apr 3 2018, 8:58 AM
junbuml added a comment to D45130: [CallSiteSplitting] Do not perform callsite splitting inside landing pad.

Thanks for handling this. Just minor comments inlined.

Apr 3 2018, 8:16 AM
junbuml added a comment to D45183: [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap.

The shrink-wrap pass would already assert here. Could you add the property to ShrinkWrap as well?

Apr 3 2018, 7:17 AM

Apr 2 2018

junbuml created D45183: [CodeGen]Add NoVRegs property on PostRASink and ShrinkWrap.
Apr 2 2018, 1:33 PM
junbuml added inline comments to D45130: [CallSiteSplitting] Do not perform callsite splitting inside landing pad.
Apr 2 2018, 8:36 AM
junbuml added inline comments to D45130: [CallSiteSplitting] Do not perform callsite splitting inside landing pad.
Apr 2 2018, 8:31 AM

Mar 30 2018

junbuml updated the summary of D45110: [PostRASink]Sink spill to a block reachable to reload.
Mar 30 2018, 2:48 PM
junbuml updated the summary of D45110: [PostRASink]Sink spill to a block reachable to reload.
Mar 30 2018, 2:48 PM
junbuml created D45110: [PostRASink]Sink spill to a block reachable to reload.
Mar 30 2018, 2:44 PM

Mar 29 2018

junbuml added a comment to D44627: [CallSiteSplitting] Only record conditions up to the IDom(call site)..

Sounds good to me.

Mar 29 2018, 8:23 AM
junbuml added inline comments to D44627: [CallSiteSplitting] Only record conditions up to the IDom(call site)..
Mar 29 2018, 8:12 AM
junbuml added a comment to D44627: [CallSiteSplitting] Only record conditions up to the IDom(call site)..

Thanks for doing this. Now, you intended it to be a NFC, right? If then, it will be good to keep the original test cases as it is. Adding more tests is definitely good.

Mar 29 2018, 8:07 AM

Mar 28 2018

junbuml committed rL328727: [PostRAMachineSink] preserve CFG.
[PostRAMachineSink] preserve CFG
Mar 28 2018, 12:59 PM
junbuml closed D44845: [PostRAMachineSink] preserve CFG.
Mar 28 2018, 12:59 PM
junbuml updated the diff for D42600: [WIP][Shrink-wrap]split restore point.

Rebased and minor changes in comments. Please let me know if the approach I'm using here make sense.

Mar 28 2018, 12:53 PM
junbuml added inline comments to D44983: [LoopUnroll] Only peel if a predicate becomes known in the loop body..
Mar 28 2018, 10:22 AM
junbuml added inline comments to D44627: [CallSiteSplitting] Only record conditions up to the IDom(call site)..
Mar 28 2018, 9:50 AM
junbuml added inline comments to D44627: [CallSiteSplitting] Only record conditions up to the IDom(call site)..
Mar 28 2018, 9:40 AM

Mar 27 2018

junbuml updated the diff for D44958: [PostRASink]Add register dependency check for implicit operands.
Mar 27 2018, 2:49 PM
junbuml created D44958: [PostRASink]Add register dependency check for implicit operands.
Mar 27 2018, 2:41 PM

Mar 23 2018

junbuml created D44845: [PostRAMachineSink] preserve CFG.
Mar 23 2018, 1:40 PM