[InstCombine] canonicalize min/max constant to select's false value

[spatel]

Summary

This is a first step towards canonicalization and improved folding/codegen for integer min/max as discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/106868.html

Here, we're just matching the simplest min/max patterns and adjusting the icmp predicate while swapping the select operands.

I've included FIXME tests in test/Transforms/InstCombine/select_meta.ll so it's easier to see how this might be extended (corresponds to the TODO comment in the code). That's also why I'm using matchSelectPattern() rather than a simpler check; once the backend is patched, we can just remove some of the restrictions to allow the obfuscated min/max patterns in the FIXME tests to be matched.

[Ayal]

lib/Transforms/InstCombine/InstCombineSelect.cpp

515–516

When the constant value of the select differs from that of the cmp, is it still considered min/max?

[spatel]

lib/Transforms/InstCombine/InstCombineSelect.cpp

515–516

Yes - if you believe ValueTracking's (matchSelectPattern) definition of min/max. Eg:

// Look through 'not' ops to find disguised signed min/max.
// (X >s C) ? ~X : ~C ==> (~X <s ~C) ? ~X : ~C ==> SMIN(~X, ~C)

I recently (rL286772) moved obfuscated patterns like that to "matchMinMax()" if you want to see the full list of patterns that we currently recognize as min/max.

[spatel]

Ping.

[jmolloy]

LGTM. Thanks in particular for the heavy testing!

lib/Transforms/InstCombine/InstCombineSelect.cpp

static bool adjustMinMax(SelectInst &Sel, ICmpInst &Cmp) {
 
   // Move the compare instruction right before the select instruction. Otherwise
   // the sext/zext value may be defined after the compare instruction uses it.
   Cmp.moveBefore(&Sel);
 
   return true;
 }
 
+/// If this is an integer min/max where the select's 'true' operand is a
+/// constant, canonicalize that constant to the 'false' operand:
+/// select (icmp Pred X, C), C, X --> select (icmp Pred' X, C), X, C
+static Instruction *
+canonicalizeMinMaxWithConstant(SelectInst &Sel, ICmpInst &Cmp,
+                               InstCombiner::BuilderTy &Builder) {
+  // TODO: We should also canonicalize min/max when the select has a different
+  // constant value than the cmp constant, but we need to fix the backend first.
+  if (!Cmp.hasOneUse() || !isa<Constant>(Cmp.getOperand(1)) ||
+      !isa<Constant>(Sel.getTrueValue()) ||
+      isa<Constant>(Sel.getFalseValue()) ||
+      Cmp.getOperand(1) != Sel.getTrueValue())
+    return nullptr;
+
+  // Canonicalize the compare predicate based on whether we have min or max.
+  Value *LHS, *RHS;
+  ICmpInst::Predicate NewPred;
+  SelectPatternResult SPR = matchSelectPattern(&Sel, LHS, RHS);
+  switch (SPR.Flavor) {
+  case SPF_SMIN: NewPred = ICmpInst::ICMP_SLT; break;
+  case SPF_UMIN: NewPred = ICmpInst::ICMP_ULT; break;
+  case SPF_SMAX: NewPred = ICmpInst::ICMP_SGT; break;
+  case SPF_UMAX: NewPred = ICmpInst::ICMP_UGT; break;
+  default: return nullptr;
+  }
+
+  // Canonicalize the constant to the right side.
+  if (isa<Constant>(LHS))
+    std::swap(LHS, RHS);
+
+  Value *NewCmp = Builder.CreateICmp(NewPred, LHS, RHS);
+  SelectInst *NewSel = SelectInst::Create(NewCmp, LHS, RHS);
+  NewSel->copyMetadata(Sel);
+
+  // We swapped the select operands, so swap the metadata too.
+  NewSel->swapProfMetadata();
+  return NewSel;
+}
+
 /// Visit a SelectInst that has an ICmpInst as its first operand.
 Instruction *InstCombiner::foldSelectInstWithICmp(SelectInst &SI,
                                                   ICmpInst *ICI) {
+  if (Instruction *NewSel = canonicalizeMinMaxWithConstant(SI, *ICI, *Builder))
+    return NewSel;
+
   bool Changed = adjustMinMax(SI, *ICI);
 
   ICmpInst::Predicate Pred = ICI->getPredicate();
   Value *CmpLHS = ICI->getOperand(0);
   Value *CmpRHS = ICI->getOperand(1);
   Value *TrueVal = SI.getTrueValue();
   Value *FalseVal = SI.getFalseValue();
 

test/Transforms/InstCombine/adjust-for-minmax.ll

 ; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp slt i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Canonicalize icmp predicate.
+; Canonicalize min/max.
 
 define i32 @smax2(i32 %n) {
 ; CHECK-LABEL: @smax2(
 ; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
 ; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp sge i32 %n, 1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Canonicalize icmp predicate.
+; Canonicalize min/max.
 
 define i32 @smin2(i32 %n) {
 ; CHECK-LABEL: @smin2(
 ; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
 ; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp sle i32 %n, -1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Swap signed pred and select ops.
+; Canonicalize min/max.
 
 define i32 @smax3(i32 %n) {
 ; CHECK-LABEL: @smax3(
-; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp sgt i32 %n, -1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Swap vector signed pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @smax3_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @smax3_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp slt <2 x i32> %n, zeroinitializer
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> zeroinitializer, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt <2 x i32> %n, zeroinitializer
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp sgt <2 x i32> %n, <i32 -1, i32 -1>
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
   ret <2 x i32> %m
 }
 
-; Swap signed pred and select ops.
+; Canonicalize min/max.
 
 define i32 @smin3(i32 %n) {
 ; CHECK-LABEL: @smin3(
-; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp slt i32 %n, 1
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Swap vector signed pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @smin3_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @smin3_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp sgt <2 x i32> %n, zeroinitializer
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> zeroinitializer, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp slt <2 x i32> %n, zeroinitializer
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp slt <2 x i32> %n, <i32 1, i32 1>
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
   ret <2 x i32> %m
 }
 
-; Swap unsigned pred and select ops.
+; Canonicalize min/max.
 
 define i32 @umax3(i32 %n) {
 ; CHECK-LABEL: @umax3(
-; CHECK-NEXT:    [[T:%.*]] = icmp ult i32 %n, 5
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 5, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ugt i32 %n, 5
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 5
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp ugt i32 %n, 4
   %m = select i1 %t, i32 %n, i32 5
   ret i32 %m
 }
 
-; Swap vector unsigned pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @umax3_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @umax3_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp ult <2 x i32> %n, <i32 5, i32 5>
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> <i32 5, i32 5>, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ugt <2 x i32> %n, <i32 5, i32 5>
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> <i32 5, i32 5>
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp ugt <2 x i32> %n, <i32 4, i32 4>
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 5, i32 5>
   ret <2 x i32> %m
 }
 
-; Swap unsigned pred and select ops.
+; Canonicalize min/max.
 
 define i32 @umin3(i32 %n) {
 ; CHECK-LABEL: @umin3(
-; CHECK-NEXT:    [[T:%.*]] = icmp ugt i32 %n, 6
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 6, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ult i32 %n, 6
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 6
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp ult i32 %n, 7
   %m = select i1 %t, i32 %n, i32 6
   ret i32 %m
 }
 
-; Swap vector unsigned pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @umin3_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @umin3_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp ugt <2 x i32> %n, <i32 6, i32 6>
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> <i32 6, i32 6>, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ult <2 x i32> %n, <i32 6, i32 6>
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> <i32 6, i32 6>
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp ult <2 x i32> %n, <i32 7, i32 7>
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 6, i32 6>
   ret <2 x i32> %m
 }
 
-; Canonicalize signed pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define i32 @smax4(i32 %n) {
 ; CHECK-LABEL: @smax4(
-; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp sge i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Canonicalize vector signed pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @smax4_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @smax4_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp slt <2 x i32> %n, zeroinitializer
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> zeroinitializer, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp sgt <2 x i32> %n, zeroinitializer
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp sge <2 x i32> %n, zeroinitializer
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
   ret <2 x i32> %m
 }
 
-; Canonicalize signed pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define i32 @smin4(i32 %n) {
 ; CHECK-LABEL: @smin4(
-; CHECK-NEXT:    [[T:%.*]] = icmp sgt i32 %n, 0
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 0, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp slt i32 %n, 0
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 0
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp sle i32 %n, 0
   %m = select i1 %t, i32 %n, i32 0
   ret i32 %m
 }
 
-; Canonicalize vector signed pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @smin4_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @smin4_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp sgt <2 x i32> %n, zeroinitializer
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> zeroinitializer, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp slt <2 x i32> %n, zeroinitializer
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp sle <2 x i32> %n, zeroinitializer
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
   ret <2 x i32> %m
 }
 
-; Canonicalize unsigned pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define i32 @umax4(i32 %n) {
 ; CHECK-LABEL: @umax4(
-; CHECK-NEXT:    [[T:%.*]] = icmp ult i32 %n, 8
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 8, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ugt i32 %n, 8
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 8
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp uge i32 %n, 8
   %m = select i1 %t, i32 %n, i32 8
   ret i32 %m
 }
 
-; Canonicalize vector unsigned pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @umax4_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @umax4_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp ult <2 x i32> %n, <i32 8, i32 8>
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> <i32 8, i32 8>, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ugt <2 x i32> %n, <i32 8, i32 8>
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> <i32 8, i32 8>
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp uge <2 x i32> %n, <i32 8, i32 8>
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 8, i32 8>
   ret <2 x i32> %m
 }
 
-; Canonicalize unsigned pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define i32 @umin4(i32 %n) {
 ; CHECK-LABEL: @umin4(
-; CHECK-NEXT:    [[T:%.*]] = icmp ugt i32 %n, 9
-; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 9, i32 %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ult i32 %n, 9
+; CHECK-NEXT:    [[M:%.*]] = select i1 [[T]], i32 %n, i32 9
 ; CHECK-NEXT:    ret i32 [[M]]
 ;
   %t = icmp ule i32 %n, 9
   %m = select i1 %t, i32 %n, i32 9
   ret i32 %m
 }
 
-; Canonicalize vector unsigned pred and swap pred and select ops.
+; Canonicalize min/max.
 
 define <2 x i32> @umin4_vec(<2 x i32> %n) {
 ; CHECK-LABEL: @umin4_vec(
-; CHECK-NEXT:    [[T:%.*]] = icmp ugt <2 x i32> %n, <i32 9, i32 9>
-; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> <i32 9, i32 9>, <2 x i32> %n
+; CHECK-NEXT:    [[T:%.*]] = icmp ult <2 x i32> %n, <i32 9, i32 9>
+; CHECK-NEXT:    [[M:%.*]] = select <2 x i1> [[T]], <2 x i32> %n, <2 x i32> <i32 9, i32 9>
 ; CHECK-NEXT:    ret <2 x i32> [[M]]
 ;
   %t = icmp ule <2 x i32> %n, <i32 9, i32 9>
   %m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 9, i32 9>
   ret <2 x i32> %m
 }
 
 define i64 @smax_sext(i32 %a) {
 ; CHECK-LABEL: @smax_sext(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[A_EXT]], 0
-; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[CMP]], i64 0, i64 [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[A_EXT]], 0
+; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 0
 ; CHECK-NEXT:    ret i64 [[MAX]]
 ;
   %a_ext = sext i32 %a to i64
   %cmp = icmp sgt i32 %a, -1
   %max = select i1 %cmp, i64 %a_ext, i64 0
   ret i64 %max
 }
 
 define <2 x i64> @smax_sext_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @smax_sext_vec(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext <2 x i32> %a to <2 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i64> [[A_EXT]], zeroinitializer
-; CHECK-NEXT:    [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x i64> zeroinitializer, <2 x i64> [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i64> [[A_EXT]], zeroinitializer
+; CHECK-NEXT:    [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i64> [[MAX]]
 ;
   %a_ext = sext <2 x i32> %a to <2 x i64>
   %cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
   %max = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> zeroinitializer
   ret <2 x i64> %max
 }
 
 define i64 @smin_sext(i32 %a) {
 ; CHECK-LABEL: @smin_sext(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[A_EXT]], 0
-; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 0, i64 [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i64 [[A_EXT]], 0
+; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 0
 ; CHECK-NEXT:    ret i64 [[MIN]]
 ;
   %a_ext = sext i32 %a to i64
   %cmp = icmp slt i32 %a, 1
   %min = select i1 %cmp, i64 %a_ext, i64 0
   ret i64 %min
 }
 
 define <2 x i64>@smin_sext_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @smin_sext_vec(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext <2 x i32> %a to <2 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i64> [[A_EXT]], zeroinitializer
-; CHECK-NEXT:    [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> zeroinitializer, <2 x i64> [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i64> [[A_EXT]], zeroinitializer
+; CHECK-NEXT:    [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> zeroinitializer
 ; CHECK-NEXT:    ret <2 x i64> [[MIN]]
 ;
   %a_ext = sext <2 x i32> %a to <2 x i64>
   %cmp = icmp slt <2 x i32> %a, <i32 1, i32 1>
   %min = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> zeroinitializer
   ret <2 x i64> %min
 }
 
 define i64 @umax_sext(i32 %a) {
 ; CHECK-LABEL: @umax_sext(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 3
-; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[CMP]], i64 3, i64 [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 3
+; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 3
 ; CHECK-NEXT:    ret i64 [[MAX]]
 ;
   %a_ext = sext i32 %a to i64
   %cmp = icmp ugt i32 %a, 2
   %max = select i1 %cmp, i64 %a_ext, i64 3
   ret i64 %max
 }
 
 define <2 x i64> @umax_sext_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @umax_sext_vec(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext <2 x i32> %a to <2 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 3, i64 3>
-; CHECK-NEXT:    [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x i64> <i64 3, i64 3>, <2 x i64> [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 3, i64 3>
+; CHECK-NEXT:    [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
 ; CHECK-NEXT:    ret <2 x i64> [[MAX]]
 ;
   %a_ext = sext <2 x i32> %a to <2 x i64>
   %cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
   %max = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 3, i64 3>
   ret <2 x i64> %max
 }
 
 define i64 @umin_sext(i32 %a) {
 ; CHECK-LABEL: @umin_sext(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 2, i64 [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 2
+; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 2
 ; CHECK-NEXT:    ret i64 [[MIN]]
 ;
   %a_ext = sext i32 %a to i64
   %cmp = icmp ult i32 %a, 3
   %min = select i1 %cmp, i64 %a_ext, i64 2
   ret i64 %min
 }
 
 define <2 x i64> @umin_sext_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @umin_sext_vec(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext <2 x i32> %a to <2 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 2, i64 2>
-; CHECK-NEXT:    [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> <i64 2, i64 2>, <2 x i64> [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 2, i64 2>
+; CHECK-NEXT:    [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
 ; CHECK-NEXT:    ret <2 x i64> [[MIN]]
 ;
   %a_ext = sext <2 x i32> %a to <2 x i64>
   %cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
   %min = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 2, i64 2>
   ret <2 x i64> %min
 }
 
;
   %cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
   %min = select <2 x i1> %cmp, <2 x i64> <i64 3, i64 3>, <2 x i64> %a_ext
   ret <2 x i64> %min
 }
 
 define i64 @umax_zext(i32 %a) {
 ; CHECK-LABEL: @umax_zext(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = zext i32 %a to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 3
-; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[CMP]], i64 3, i64 [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 3
+; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 3
 ; CHECK-NEXT:    ret i64 [[MAX]]
 ;
   %a_ext = zext i32 %a to i64
   %cmp = icmp ugt i32 %a, 2
   %max = select i1 %cmp, i64 %a_ext, i64 3
   ret i64 %max
 }
 
 define <2 x i64> @umax_zext_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @umax_zext_vec(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = zext <2 x i32> %a to <2 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 3, i64 3>
-; CHECK-NEXT:    [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x i64> <i64 3, i64 3>, <2 x i64> [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 3, i64 3>
+; CHECK-NEXT:    [[MAX:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
 ; CHECK-NEXT:    ret <2 x i64> [[MAX]]
 ;
   %a_ext = zext <2 x i32> %a to <2 x i64>
   %cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
   %max = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 3, i64 3>
   ret <2 x i64> %max
 }
 
 define i64 @umin_zext(i32 %a) {
 ; CHECK-LABEL: @umin_zext(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = zext i32 %a to i64
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 2, i64 [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 2
+; CHECK-NEXT:    [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 2
 ; CHECK-NEXT:    ret i64 [[MIN]]
 ;
   %a_ext = zext i32 %a to i64
   %cmp = icmp ult i32 %a, 3
   %min = select i1 %cmp, i64 %a_ext, i64 2
   ret i64 %min
 }
 
 define <2 x i64> @umin_zext_vec(<2 x i32> %a) {
 ; CHECK-LABEL: @umin_zext_vec(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = zext <2 x i32> %a to <2 x i64>
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 2, i64 2>
-; CHECK-NEXT:    [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> <i64 2, i64 2>, <2 x i64> [[A_EXT]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 2, i64 2>
+; CHECK-NEXT:    [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
 ; CHECK-NEXT:    ret <2 x i64> [[MIN]]
 ;
   %a_ext = zext <2 x i32> %a to <2 x i64>
   %cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
   %min = select <2 x i1> %cmp, <2 x i64> %a_ext, <2 x i64> <i64 2, i64 2>
   ret <2 x i64> %min
 }
 

test/Transforms/InstCombine/div-shift.ll

;
   %1 = shl i32 4, %y
   %2 = zext i32 %1 to i64
   %3 = udiv i64 %x, %2
   ret i64 %3
 }
 
 define i32 @t4(i32 %x, i32 %y) {
 ; CHECK-LABEL: @t4(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 %y, 5
-; CHECK-NEXT:    [[DOTV:%.*]] = select i1 [[TMP1]], i32 5, i32 %y
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 %y, 5
+; CHECK-NEXT:    [[DOTV:%.*]] = select i1 [[TMP1]], i32 %y, i32 5
 ; CHECK-NEXT:    [[TMP2:%.*]] = lshr i32 %x, [[DOTV]]
 ; CHECK-NEXT:    ret i32 [[TMP2]]
 ;
   %1 = shl i32 1, %y
   %2 = icmp ult i32 %1, 32
   %3 = select i1 %2, i32 32, i32 %1
   %4 = udiv i32 %x, %3
   ret i32 %4

test/Transforms/InstCombine/minmax-fold.ll

;
   %t4 = bitcast <2 x i64> %b to <4 x float>
   %t5 = select <4 x i1> %t2, <4 x float> %t3, <4 x float> %t4
   ret <4 x float> %t5
 }
 
 ; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11)
 define i32 @test68(i32 %x) {
 ; CHECK-LABEL: @test68(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 %x, 11
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 11, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 %x, 11
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 11
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %cmp = icmp slt i32 11, %x
   %cond = select i1 %cmp, i32 11, i32 %x
   %cmp3 = icmp slt i32 92, %cond
   %retval = select i1 %cmp3, i32 92, i32 %cond
   ret i32 %retval
 }
 
 define <2 x i32> @test68vec(<2 x i32> %x) {
 ; CHECK-LABEL: @test68vec(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> %x, <i32 11, i32 11>
-; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> <i32 11, i32 11>, <2 x i32> %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i32> %x, <i32 11, i32 11>
+; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> %x, <2 x i32> <i32 11, i32 11>
 ; CHECK-NEXT:    ret <2 x i32> [[COND]]
 ;
   %cmp = icmp slt <2 x i32> <i32 11, i32 11>, %x
   %cond = select <2 x i1> %cmp, <2 x i32> <i32 11, i32 11>, <2 x i32> %x
   %cmp3 = icmp slt <2 x i32> <i32 92, i32 92>, %cond
   %retval = select <2 x i1> %cmp3, <2 x i32> <i32 92, i32 92>, <2 x i32> %cond
   ret <2 x i32> %retval
 }
 
 ; MIN(MIN(X, 24), 83) -> MIN(X, 24)
 define i32 @test69(i32 %x) {
 ; CHECK-LABEL: @test69(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i32 %x, 24
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 24, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 %x, 24
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 24
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %cmp = icmp ult i32 24, %x
   %cond = select i1 %cmp, i32 24, i32 %x
   %cmp3 = icmp ult i32 83, %cond
   %retval = select i1 %cmp3, i32 83, i32 %cond
   ret i32 %retval
 }
 
 ; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75)
 define i32 @test70(i32 %x) {
 ; CHECK-LABEL: @test70(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 %x, 75
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 75, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %x, 75
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 75
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %cmp = icmp slt i32 %x, 75
   %cond = select i1 %cmp, i32 75, i32 %x
   %cmp3 = icmp slt i32 %cond, 36
   %retval = select i1 %cmp3, i32 36, i32 %cond
   ret i32 %retval
 }
 
 ; MAX(MAX(X, 68), 47) -> MAX(X, 68)
 define i32 @test71(i32 %x) {
 ; CHECK-LABEL: @test71(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 %x, 68
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 68, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 %x, 68
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 68
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %cmp = icmp ult i32 %x, 68
   %cond = select i1 %cmp, i32 68, i32 %x
   %cmp3 = icmp ult i32 %cond, 47
   %retval = select i1 %cmp3, i32 47, i32 %cond
   ret i32 %retval
 }
 
 ; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
 define i32 @test72(i32 %x) {
 ; CHECK-LABEL: @test72(
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp sgt i32 %x, 11
-; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[CMP31]], i32 11, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 %x, 11
+; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 11
 ; CHECK-NEXT:    ret i32 [[RETVAL]]
 ;
   %cmp = icmp sgt i32 %x, 92
   %cond = select i1 %cmp, i32 92, i32 %x
   %cmp3 = icmp sgt i32 %cond, 11
   %retval = select i1 %cmp3, i32 11, i32 %cond
   ret i32 %retval
 }
 
-; FIXME - vector neglect: FoldOrOfICmps()
+; FIXME - vector neglect: FoldAndOfICmps() / FoldOrOfICmps()
 
 define <2 x i32> @test72vec(<2 x i32> %x) {
 ; CHECK-LABEL: @test72vec(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> %x, <i32 92, i32 92>
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp sgt <2 x i32> %x, <i32 11, i32 11>
-; CHECK-NEXT:    [[CMP3:%.*]] = or <2 x i1> [[CMP]], [[CMP31:%.*]]
-; CHECK-NEXT:    [[RETVAL:%.*]] = select <2 x i1> [[CMP3]], <2 x i32> <i32 11, i32 11>, <2 x i32> %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt <2 x i32> %x, <i32 92, i32 92>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt <2 x i32> %x, <i32 11, i32 11>
+; CHECK-NEXT:    [[TMP3:%.*]] = and <2 x i1> [[TMP1]], [[TMP2]]
+; CHECK-NEXT:    [[RETVAL:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> %x, <2 x i32> <i32 11, i32 11>
 ; CHECK-NEXT:    ret <2 x i32> [[RETVAL]]
 ;
   %cmp = icmp sgt <2 x i32> %x, <i32 92, i32 92>
   %cond = select <2 x i1> %cmp, <2 x i32> <i32 92, i32 92>, <2 x i32> %x
   %cmp3 = icmp sgt <2 x i32> %cond, <i32 11, i32 11>
   %retval = select <2 x i1> %cmp3, <2 x i32> <i32 11, i32 11>, <2 x i32> %cond
   ret <2 x i32> %retval
 }
 
 ; MIN(MIN(X, 83), 24) -> MIN(X, 24)
 define i32 @test73(i32 %x) {
 ; CHECK-LABEL: @test73(
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp ugt i32 %x, 24
-; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[CMP31]], i32 24, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 %x, 24
+; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 24
 ; CHECK-NEXT:    ret i32 [[RETVAL]]
 ;
   %cmp = icmp ugt i32 %x, 83
   %cond = select i1 %cmp, i32 83, i32 %x
   %cmp3 = icmp ugt i32 %cond, 24
   %retval = select i1 %cmp3, i32 24, i32 %cond
   ret i32 %retval
 }
 
 ; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
 define i32 @test74(i32 %x) {
 ; CHECK-LABEL: @test74(
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp slt i32 %x, 75
-; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[CMP31]], i32 75, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %x, 75
+; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 75
 ; CHECK-NEXT:    ret i32 [[RETVAL]]
 ;
   %cmp = icmp slt i32 %x, 36
   %cond = select i1 %cmp, i32 36, i32 %x
   %cmp3 = icmp slt i32 %cond, 75
   %retval = select i1 %cmp3, i32 75, i32 %cond
   ret i32 %retval
 }
 
 ; MAX(MAX(X, 47), 68) -> MAX(X, 68)
 define i32 @test75(i32 %x) {
 ; CHECK-LABEL: @test75(
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp ult i32 %x, 68
-; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[CMP31]], i32 68, i32 %x
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 %x, 68
+; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 68
 ; CHECK-NEXT:    ret i32 [[RETVAL]]
 ;
   %cmp = icmp ult i32 %x, 47
   %cond = select i1 %cmp, i32 47, i32 %x
   %cmp3 = icmp ult i32 %cond, 68
   %retval = select i1 %cmp3, i32 68, i32 %cond
   ret i32 %retval
 }
 

test/Transforms/InstCombine/pr27236.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -instcombine < %s | FileCheck %s
 
 define float @test1(i32 %scale) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 %scale, 1
-; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 1, i32 %scale
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %scale, 1
+; CHECK-NEXT:    [[TMP2:%.*]] = select i1 [[TMP1]], i32 %scale, i32 1
 ; CHECK-NEXT:    [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
 ; CHECK-NEXT:    [[TMP4:%.*]] = icmp sgt i32 [[TMP2]], 0
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[TMP4]], float [[TMP3]], float 0.000000e+00
 ; CHECK-NEXT:    ret float [[SEL]]
 ;
   %tmp1 = icmp sgt i32 1, %scale
   %tmp2 = select i1 %tmp1, i32 1, i32 %scale
   %tmp3 = sitofp i32 %tmp2 to float
   %tmp4 = icmp sgt i32 %tmp2, 0
   %sel = select i1 %tmp4, float %tmp3, float 0.000000e+00
   ret float %sel
 }
 

test/Transforms/InstCombine/select_meta.ll

-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py and enhanced to include metadata checking.
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; and enhanced to include metadata checking.
+
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 define i32 @foo(i32) local_unnamed_addr #0  {
 ; CHECK-LABEL: @foo(
 ; CHECK-NEXT:    [[TMP2:%.*]] = icmp sgt i32 %0, 2
 ; CHECK-NEXT:    [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof ![[MD1:[0-9]+]]
 ; CHECK-NEXT:    [[TMP3:%.*]] = add i32 [[DOTV]], %0
 ; CHECK-NEXT:    ret i32 [[TMP3]]

 ;
   %3 = icmp sgt i32 %0, 2
   %4 = add nsw i32 %0, %1
   %5 = sub nsw i32 %0, %1
   select i1 %3, i32 %4, i32 %5, !prof !1
   ret i32 %6
 }
 
-; condition swapped
 define i64 @test43(i32 %a) nounwind {
 ; CHECK-LABEL: @test43(
 ; CHECK-NEXT:    [[A_EXT:%.*]] = sext i32 %a to i64
-; CHECK-NEXT:    [[IS_A_NONNEGATIVE:%.*]] = icmp slt i64 [[A_EXT]], 0
-; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[IS_A_NONNEGATIVE]], i64 0, i64 [[A_EXT]], !prof ![[MD3:[0-9]+]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i64 [[A_EXT]], 0
+; CHECK-NEXT:    [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0, !prof ![[MD1]]
 ; CHECK-NEXT:    ret i64 [[MAX]]
 ;
   %a_ext = sext i32 %a to i64
   %is_a_nonnegative = icmp sgt i32 %a, -1
   %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0, !prof !1
   ret i64 %max
 }
 

 ;
   %cmp = icmp sgt i32 %x, %y
   %cond = select i1 %cmp, i32 %x, i32 %y, !prof !1
   %cmp5 = icmp sgt i32 %cond, %x
   %retval = select i1 %cmp5, i32 %cond, i32 %x, !prof !2
   ret i32 %retval
 }
 
+; Swap predicate / metadata order
+; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75)
 define i32 @test70(i32 %x) {
 ; CHECK-LABEL: @test70(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 %x, 75
-; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 75, i32 %x, !prof ![[MD1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %x, 75
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[MD3:[0-9]+]]
 ; CHECK-NEXT:    ret i32 [[COND]]
 ;
   %cmp = icmp slt i32 %x, 75
   %cond = select i1 %cmp, i32 75, i32 %x, !prof !1
   %cmp3 = icmp slt i32 %cond, 36
   %retval = select i1 %cmp3, i32 36, i32 %cond, !prof !2
   ret i32 %retval
 }
 
-
+; Swap predicate / metadata order
 ; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
 define i32 @test72(i32 %x) {
 ; CHECK-LABEL: @test72(
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp sgt i32 %x, 11
-; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[CMP31]], i32 11, i32 %x, !prof ![[MD2:[0-9]+]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp slt i32 %x, 11
+; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 11, !prof ![[MD4:[0-9]+]]
 ; CHECK-NEXT:    ret i32 [[RETVAL]]
 ;
   %cmp = icmp sgt i32 %x, 92
   %cond = select i1 %cmp, i32 92, i32 %x, !prof !1
   %cmp3 = icmp sgt i32 %cond, 11
   %retval = select i1 %cmp3, i32 11, i32 %cond, !prof !2
   ret i32 %retval
 }
 
+; Swap predicate / metadata order
 ; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
 define i32 @test74(i32 %x) {
 ; CHECK-LABEL: @test74(
-; CHECK-NEXT:    [[CMP31:%.*]] = icmp slt i32 %x, 75
-; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[CMP31]], i32 75, i32 %x, !prof ![[MD2]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %x, 75
+; CHECK-NEXT:    [[RETVAL:%.*]] = select i1 [[TMP1]], i32 %x, i32 75, !prof ![[MD4]]
 ; CHECK-NEXT:    ret i32 [[RETVAL]]
 ;
   %cmp = icmp slt i32 %x, 36
   %cond = select i1 %cmp, i32 36, i32 %x, !prof !1
   %cmp3 = icmp slt i32 %cond, 75
   %retval = select i1 %cmp3, i32 75, i32 %cond, !prof !2
   ret i32 %retval
 }
 
+; FIXME:
+; The compare should change, but the metadata remains the same because the select operands are not swapped.
+define i32 @smin1(i32 %x) {
+; CHECK-LABEL: @smin1(
+; CHECK-NEXT:    [[NOT_X:%.*]] = xor i32 %x, -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 [[NOT_X]], i32 -1, !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %not_x = xor i32 %x, -1
+  %cmp = icmp sgt i32 %x, 0
+  %sel = select i1 %cmp, i32 %not_x, i32 -1, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, and the metadata is swapped because the select operands are swapped.
+define i32 @smin2(i32 %x) {
+; CHECK-LABEL: @smin2(
+; CHECK-NEXT:    [[NOT_X:%.*]] = xor i32 %x, -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 -1, i32 [[NOT_X]], !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %not_x = xor i32 %x, -1
+  %cmp = icmp slt i32 %x, 0
+  %sel = select i1 %cmp, i32 -1, i32 %not_x, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, but the metadata remains the same because the select operands are not swapped.
+define i32 @smax1(i32 %x) {
+; CHECK-LABEL: @smax1(
+; CHECK-NEXT:    [[NOT_X:%.*]] = xor i32 %x, -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 [[NOT_X]], i32 -1, !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %not_x = xor i32 %x, -1
+  %cmp = icmp slt i32 %x, 0
+  %sel = select i1 %cmp, i32 %not_x, i32 -1, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, and the metadata is swapped because the select operands are swapped.
+define i32 @smax2(i32 %x) {
+; CHECK-LABEL: @smax2(
+; CHECK-NEXT:    [[NOT_X:%.*]] = xor i32 %x, -1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 -1, i32 [[NOT_X]], !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %not_x = xor i32 %x, -1
+  %cmp = icmp sgt i32 %x, 0
+  %sel = select i1 %cmp, i32 -1, i32 %not_x, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, but the metadata remains the same because the select operands are not swapped.
+define i32 @umin1(i32 %x) {
+; CHECK-LABEL: @umin1(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 %x, -1
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 -2147483648, !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %cmp = icmp sgt i32 %x, -1
+  %sel = select i1 %cmp, i32 %x, i32 -2147483648, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, and the metadata is swapped because the select operands are swapped.
+define i32 @umin2(i32 %x) {
+; CHECK-LABEL: @umin2(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 2147483647, i32 %x, !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %cmp = icmp slt i32 %x, 0
+  %sel = select i1 %cmp, i32 2147483647, i32 %x, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, but the metadata remains the same because the select operands are not swapped.
+define i32 @umax1(i32 %x) {
+; CHECK-LABEL: @umax1(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 %x, i32 2147483647, !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %cmp = icmp slt i32 %x, 0
+  %sel = select i1 %cmp, i32 %x, i32 2147483647, !prof !1
+  ret i32 %sel
+}
+
+; FIXME:
+; The compare should change, and the metadata is swapped because the select operands are swapped.
+define i32 @umax2(i32 %x) {
+; CHECK-LABEL: @umax2(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 %x, -1
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i32 -2147483648, i32 %x, !prof ![[MD1]]
+; CHECK-NEXT:    ret i32 [[SEL]]
+;
+  %cmp = icmp sgt i32 %x, -1
+  %sel = select i1 %cmp, i32 -2147483648, i32 %x, !prof !1
+  ret i32 %sel
+}
+
 !1 = !{!"branch_weights", i32 2, i32 10}
 !2 = !{!"branch_weights", i32 3, i32 10}
 
 ; CHECK-DAG: ![[MD1]] = !{!"branch_weights", i32 2, i32 10}
-; CHECK-DAG: ![[MD2]] = !{!"branch_weights", i32 3, i32 10}
 ; CHECK-DAG: ![[MD3]] = !{!"branch_weights", i32 10, i32 2}
+; CHECK-DAG: ![[MD4]] = !{!"branch_weights", i32 10, i32 3}
 

test/Transforms/InstCombine/sext.ll

 ;
   %c1 = sext i1 %x to i32
   %c2 = sub i32 0, %c1
   ret i32 %c2
 }
 
 define i32 @test18(i16 %x) {
 ; CHECK-LABEL: @test18(
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i16 %x, 0
-; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i16 0, i16 %x
-; CHECK-NEXT:    [[TMP1:%.*]] = zext i16 [[SEL]] to i32
-; CHECK-NEXT:    ret i32 [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i16 %x, 0
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[TMP1]], i16 %x, i16 0
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i16 [[SEL]] to i32
+; CHECK-NEXT:    ret i32 [[TMP2]]
 ;
   %cmp = icmp slt i16 %x, 0
   %sel = select i1 %cmp, i16 0, i16 %x
   %ext = sext i16 %sel to i32
   ret i32 %ext
 }