AMDGPU : Add a function to enable and disable IEEEBit for SC and shader respectively.

[wdng]

Summary

Add a function to enable and disable IEEEBit for SC and shader respectively.

[kzhuravl]

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

551–552

Can we change this to ProgInfo.IEEEMode = STM.enableIEEEBit(MF)?

[kzhuravl]

lib/Target/AMDGPU/AMDGPUSubtarget.h

252

I think this is a property of a function, and moving this function to SIMachineFunctionInfo would be better

[• tstellarAMD]

lib/Target/AMDGPU/AMDGPUSubtarget.h

252

My original thought was that it would be useful to have this function here in case we added a subtarget feature for setting/unsetting the ieee bit.

[kzhuravl]

lib/Target/AMDGPU/AMDGPUSubtarget.h

252

Ah, ok. That makes sense then.

[wdng]

Address issues based on feedback.

[wdng]

Add lit tests using the graphics calling conventions and check that IEEEBit is 0.

[kzhuravl]

LGTM

[wdng]

Thanks a lot, Tom and Konstantin!

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

   // register.
   ProgInfo.FloatMode = getFPMode(MF);
 
-  ProgInfo.IEEEMode = 0;
+  ProgInfo.IEEEMode = STM.enableIEEEBit(MF);
 
   // Make clamp modifier on NaN input returns 0.
   ProgInfo.DX10Clamp = 1;

lib/Target/AMDGPU/AMDGPUSubtarget.h

     return DumpCode;
   }
 
+  bool enableIEEEBit(const MachineFunction &MF) const {
+    return AMDGPU::isCompute(MF.getFunction()->getCallingConv());
+  }
+
   /// Return the amount of LDS that can be used that will not restrict the
   /// occupancy lower than WaveCount.
   unsigned getMaxLocalMemSizeWithWaveCount(unsigned WaveCount) const;

test/CodeGen/AMDGPU/default-fp-mode.ll

 
 ; GCN-LABEL: {{^}}test_default_si:
 ; GCN: FloatMode: 192
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_default_si(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 
 ; GCN-LABEL: {{^}}test_default_vi:
 ; GCN: FloatMode: 192
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 
 ; GCN-LABEL: {{^}}test_f64_denormals:
 ; GCN: FloatMode: 192
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 
 ; GCN-LABEL: {{^}}test_f32_denormals:
 ; GCNL: FloatMode: 48
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 
 ; GCN-LABEL: {{^}}test_f32_f64_denormals:
 ; GCN: FloatMode: 240
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 
 ; GCN-LABEL: {{^}}test_no_denormals
 ; GCN: FloatMode: 0
-; GCN: IeeeMode: 0
+; GCN: IeeeMode: 1
 define void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

test/CodeGen/AMDGPU/hsa-fp-mode.ll

 ; GCN-LABEL: {{^}}test_default_ci:
 ; GCN: float_mode = 192
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_default_ci(float addrspace(1)* %out0, double addrspace(1)* %out1) #0 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 ; GCN-LABEL: {{^}}test_default_vi:
 ; GCN: float_mode = 192
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_default_vi(float addrspace(1)* %out0, double addrspace(1)* %out1) #1 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 ; GCN-LABEL: {{^}}test_f64_denormals:
 ; GCN: float_mode = 192
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #2 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 ; GCN-LABEL: {{^}}test_f32_denormals:
 ; GCN: float_mode = 48
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_f32_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #3 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 ; GCN-LABEL: {{^}}test_f32_f64_denormals:
 ; GCN: float_mode = 240
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_f32_f64_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #4 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1

 ; GCN-LABEL: {{^}}test_no_denormals:
 ; GCN: float_mode = 0
 ; GCN: enable_dx10_clamp = 1
-; GCN: enable_ieee_mode = 0
+; GCN: enable_ieee_mode = 1
 define void @test_no_denormals(float addrspace(1)* %out0, double addrspace(1)* %out1) #5 {
   store float 0.0, float addrspace(1)* %out0
   store double 0.0, double addrspace(1)* %out1