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[x86][inline-asm][AVX512][llvm][PART-2] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions.
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Authored by mharoush on Sep 29 2016, 12:50 AM.

Details

Summary

Extending inline assembly support, compatible with GCC as folowing:
"k" constraint hints the compiler to select any of AVX512 k0-k7 registers.
"Yk" constraint is a subset of "k" excluding k0 which is not allowd to be used as a mask.

This patch is complimented by the following review:
D25063

Diff Detail

Repository
rL LLVM

Event Timeline

mharoush updated this revision to Diff 72955.Sep 29 2016, 12:50 AM
mharoush retitled this revision from to [x86][inline-asm][AVX512] [x86][inliine-asm][AVX512][llvm] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions.
mharoush updated this object.
mharoush set the repository for this revision to rL LLVM.
mharoush retitled this revision from [x86][inline-asm][AVX512] [x86][inliine-asm][AVX512][llvm] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions to [x86][inline-asm][AVX512] [x86][llvm][PART-2] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions.Sep 29 2016, 1:00 AM
mharoush updated this object.
mharoush retitled this revision from [x86][inline-asm][AVX512] [x86][llvm][PART-2] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions to [x86][inline-asm][AVX512][llvm][PART-2] Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions..Sep 29 2016, 1:05 AM
mharoush updated this object.
mharoush added reviewers: delena, myatsina.
mharoush added a subscriber: cfe-commits.
mharoush added a reviewer: rnk.Oct 5 2016, 4:51 AM
rnk edited edge metadata.Oct 5 2016, 2:46 PM

Looks good functionally with some surface level nits

lib/Target/X86/X86ISelLowering.cpp
31979

Let's check size 2 after size 1, it seems more logical, and is 1 is probably the common case.

32025

Typo on "Impliment". Also the comment could be reworded.

32321

Seems like a good place to use a switch on VT

32429

"register"

32431

Maybe do a switch?

mharoush updated this revision to Diff 74986.Oct 18 2016, 6:06 AM
mharoush edited edge metadata.

fixed Reids comments

mharoush updated this revision to Diff 75005.Oct 18 2016, 7:57 AM

Added default case, minor ws style.

rnk accepted this revision.Oct 19 2016, 9:21 AM
rnk edited edge metadata.

lgtm

lib/Target/X86/X86ISelLowering.cpp
32031

Use LLVM_FALLTHROUGH here to avoid warnings in some compilers.

This revision is now accepted and ready to land.Oct 19 2016, 9:21 AM
mharoush updated this revision to Diff 75278.Oct 20 2016, 3:22 AM
mharoush edited edge metadata.
mharoush removed rL LLVM as the repository for this revision.

Added LLVM_FALLTHROUGH

This revision was automatically updated to reflect the committed changes.