[ELF/AArch64] Support some of R_AARCH64_MOVW_UABS_* relocations

[evgeny777]

Summary

This patch adds following relocs

R_AARCH64_MOVW_UABS_G3
R_AARCH64_MOVW_UABS_G2_NC
R_AARCH64_MOVW_UABS_G1_NC
R_AARCH64_MOVW_UABS_G0_NC

[ruiu]

LGTM, assuming you ran the test with GNU ld and confirmed that you got the same result.

ELF/Target.cpp

1360

The new cases should be moved here rather than below to sort cases by label.

ELF/Target.cpp

case R_AARCH64_LDST8_ABS_LO12_NC:
     or32le(Loc, (Val & 0xFFF) << 10);
     break;
   case R_AARCH64_LDST32_ABS_LO12_NC:
     or32le(Loc, (Val & 0xFFC) << 8);
     break;
   case R_AARCH64_LDST64_ABS_LO12_NC:
     or32le(Loc, (Val & 0xFF8) << 7);
     break;
   case R_AARCH64_TSTBR14:
     checkInt<16>(Val, Type);
     or32le(Loc, (Val & 0xFFFC) << 3);
     break;
   case R_AARCH64_TLSLE_ADD_TPREL_HI12:
     checkInt<24>(Val, Type);
     updateAArch64Add(Loc, Val >> 12);
     break;
   case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
   case R_AARCH64_TLSDESC_ADD_LO12_NC:
     updateAArch64Add(Loc, Val);
     break;
+  case R_AARCH64_MOVW_UABS_G0_NC:
+    or32le(Loc, (Val & 0xFFFF) << 5);
+    break;
+  case R_AARCH64_MOVW_UABS_G1_NC:
+    or32le(Loc, (Val & 0xFFFF0000) >> 11);
+    break;
+  case R_AARCH64_MOVW_UABS_G2_NC:
+    or32le(Loc, (Val & 0xFFFF00000000) >> 27);
+    break;
+  case R_AARCH64_MOVW_UABS_G3:
+    or32le(Loc, (Val & 0xFFFF000000000000) >> 43);
+    break;
   default:
     fatal("unrecognized reloc " + Twine(Type));
   }
 }
 
 void AArch64TargetInfo::relaxTlsGdToLe(uint8_t *Loc, uint32_t Type,
                                        uint64_t Val) const {
   // TLSDESC Global-Dynamic relocation are in the form:

test/ELF/Inputs/uabs_label.s

+# Sample label to test R_AARCH64_MOVW_UABS relocations
+
+.globl uabs_label
+uabs_label = 0xF000E000D000C

test/ELF/aarch64-relocs.s

 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t
-# RUN: ld.lld %t -o %t2
+# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/uabs_label.s -o %t2.o
+# RUN: ld.lld %t %t2.o -o %t2
 # RUN: llvm-objdump -d %t2 | FileCheck %s
 # REQUIRES: aarch64
 
 .section .R_AARCH64_ADR_PREL_LO21,"ax",@progbits
 .globl _start
 _start:
   adr x1,msg
 msg:  .asciz  "Hello, world\n"
foo16:
   .size mystr, 3
 
 # S = 0x11054, A = 0x4
 # R = ((S + A) & 0x0FFC) << 9 = 0xb000
 # 0xb000 | 0x7d400271 = 0x7d40b271
 # CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
 # CHECK-NEXT: ldst16:
 # CHECK-NEXT:   11054:       71 b2 40 7d     ldr     h17, [x19, #88]
+
+.section .R_AARCH64_MOVW_UABS,"ax",@progbits
+movz1:
+   movk x12, #:abs_g0_nc:uabs_label
+   movk x13, #:abs_g1_nc:uabs_label
+   movk x14, #:abs_g2_nc:uabs_label
+   movz x15, #:abs_g3:uabs_label
+   movk x16, #:abs_g3:uabs_label
+
+## 4222124650659840 == (0xF << 48)
+# CHECK: Disassembly of section .R_AARCH64_MOVW_UABS:
+# CHECK-NEXT: movz1:
+# CHECK-NEXT: 8c 01 80 f2   movk  x12, #12
+# CHECK-NEXT: ad 01 a0 f2   movk  x13, #13, lsl #16
+# CHECK-NEXT: ce 01 c0 f2   movk  x14, #14, lsl #32
+# CHECK-NEXT: ef 01 e0 d2   mov x15, #4222124650659840
+# CHECK-NEXT: f0 01 e0 f2   movk  x16, #15, lsl #48