[SPIRV] Fix bug in emitting GLSL ext inst names

[sudonatalie]

Summary

Lookup extended instruction numbers in the given instruction set so that
correct names are now emitted for GLSL.std.450 instructions as well as
OpenCL.std.

Add a single test to verify correct abs intrinsic names are emitted when
targetting logical SPIR-V.

Depends on D156424, D156049

[Keenuts]

Thanks, LGTM (not an owner)
(I'm assuming OpenCL intrinsic generation was already tested before this change)

[sudonatalie]

In D159227#4630549, @Keenuts wrote:

Thanks, LGTM (not an owner)
(I'm assuming OpenCL intrinsic generation was already tested before this change)

Yes: https://github.com/llvm/llvm-project/blob/main/llvm/test/CodeGen/SPIRV/llvm-intrinsics/abs.ll

[sudonatalie]

Ping @mpaszkowski

Can you take a look at this change as well? Since this patch doesn't have a review from a committer it isn't officially accepted to land yet.

llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp

if (SetName == getExtInstSetName(Set))
       return Set;
   }
   llvm_unreachable("UNKNOWN_EXT_INST_SET");
 }
 
 std::string getExtInstName(SPIRV::InstructionSet::InstructionSet Set,
                            uint32_t InstructionNumber) {
   const SPIRV::ExtendedBuiltin *Lookup =
-      SPIRV::lookupExtendedBuiltinBySetAndNumber(
-          SPIRV::InstructionSet::OpenCL_std, InstructionNumber);
+      SPIRV::lookupExtendedBuiltinBySetAndNumber(Set, InstructionNumber);
 
   if (!Lookup)
     return "UNKNOWN_EXT_INST";
 
   return Lookup->Name.str();
 }
 } // namespace llvm

llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs.ll

+; RUN: llc -O0 -mtriple=spirv-unknown-linux %s -o - | FileCheck %s
+
+; CHECK: OpExtInstImport "GLSL.std.450"
+
+define void @main() #1 {
+entry:
+  %i = alloca i32, align 4
+  %absi = alloca i32, align 4
+  %f = alloca float, align 4
+  %absf = alloca float, align 4
+  %0 = load i32, ptr %i, align 4
+
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] SAbs %[[#]]
+  %elt.abs = call i32 @llvm.abs.i32(i32 %0, i1 false)
+
+  store i32 %elt.abs, ptr %absi, align 4
+  %1 = load float, ptr %f, align 4
+
+; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] FAbs %[[#]]
+  %elt.abs1 = call float @llvm.fabs.f32(float %1)
+
+  store float %elt.abs1, ptr %absf, align 4
+  ret void
+}
+
+declare i32 @llvm.abs.i32(i32, i1 immarg) #2
+declare float @llvm.fabs.f32(float) #2