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Differential D157019

[RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types
ClosedPublic

Authored by nitinjohnraj on Aug 3 2023, 11:06 AM.

Details

Reviewers
craig.topper
arsenm
Commits
rGcd61e8de06c5: [RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types
Summary

Legalize G_ADD, G_SUB, G_(S/U)ADD(O/E). We test for (s7, s48, s64, s96)
on rv32 and (s15, s72, s128, s192) on rv64.

Diff Detail

Event Timeline

nitinjohnraj created this revision.Aug 3 2023, 11:06 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 3 2023, 11:06 AM
Herald added subscribers: jobnoorman, luke, VincentWu and 28 others. · View Herald Transcript
nitinjohnraj requested review of this revision.Aug 3 2023, 11:06 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 3 2023, 11:06 AM
Herald added subscribers: llvm-commits, wangpc, eopXD and 2 others. · View Herald Transcript
Harbormaster completed remote builds in B250130: Diff 546947.Aug 3 2023, 11:07 AM
craig.topper accepted this revision.Aug 3 2023, 11:32 AM

LGTM

This revision is now accepted and ready to land.Aug 3 2023, 11:32 AM
This revision was landed with ongoing or failed builds.Aug 7 2023, 4:57 PM
Closed by commit rGcd61e8de06c5: [RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types (authored by nitinjohnraj). · Explain Why
This revision was automatically updated to reflect the committed changes.
nitinjohnraj added a commit: rGcd61e8de06c5: [RISCV][GlobalISel] Legalize add/sub for wide and non-pow2 types.

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
GISel/
7 lines
test/
CodeGen/
RISCV/
GlobalISel/
legalizer/
rv32/
119 lines
119 lines
rv64/
119 lines
119 lines

Diff 547995

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Show All 24 LinesRISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
using namespace TargetOpcode; using namespace TargetOpcode;
getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR}) getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR})
.legalFor({XLenLLT}) .legalFor({XLenLLT})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
getActionDefinitionsBuilder(
{G_UADDE, G_UADDO, G_USUBE, G_USUBO, G_SADDE, G_SADDO, G_SSUBE, G_SSUBO})
.legalFor({{XLenLLT, XLenLLT}})
.clampScalar(0, XLenLLT, XLenLLT)
.clampScalar(1, XLenLLT, XLenLLT)
.widenScalarToNextPow2(0);
getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL}) getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
.legalFor({{XLenLLT, XLenLLT}}) .legalFor({{XLenLLT, XLenLLT}})
.widenScalarToNextPow2(0) .widenScalarToNextPow2(0)
.clampScalar(1, XLenLLT, XLenLLT) .clampScalar(1, XLenLLT, XLenLLT)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
// Extensions // Extensions
auto ExtLegalFunc = [=](const LegalityQuery &Query) { auto ExtLegalFunc = [=](const LegalityQuery &Query) {
▲ Show 20 Lines • Show All 42 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: add_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_ADD %2, %3
%5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32)
PseudoRET implicit $x10
...
---
name: add_i8 name: add_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i8 ; CHECK-LABEL: name: add_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s32) ; CHECK-NEXT: $x10 = COPY [[ADD]](s32)
Show All 40 Lines bb.0.entry:
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s32) = G_ADD %0, %1 %2:_(s32) = G_ADD %0, %1
$x10 = COPY %2(s32) $x10 = COPY %2(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
---
name: add_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i48
; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %xhi, %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %xlo, %ylo, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
%y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_ADD %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
%zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
$x10 = COPY %zhi(s32)
$x11 = COPY %zlo(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: add_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i64
; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %lo1:_(s32) = COPY $x11
; CHECK-NEXT: %hi2:_(s32) = COPY $x12
; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %lo1, %lo2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%hi1:_(s32) = COPY $x10
%lo1:_(s32) = COPY $x11
%hi2:_(s32) = COPY $x12
%lo2:_(s32) = COPY $x13
%x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
%x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
%y:_(s64) = G_ADD %x1, %x2
%hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
$x10 = COPY %hiy(s32)
$x11 = COPY %loy(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: add_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i96
; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
; CHECK-NEXT: %lo1:_(s32) = COPY $x12
; CHECK-NEXT: %hi2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
; CHECK-NEXT: %lo2:_(s32) = COPY $x15
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDE1]], [[C1]]
; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE %lo1, %lo2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
; CHECK-NEXT: $x12 = COPY [[UADDE2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%hi1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
%lo1:_(s32) = COPY $x12
%hi2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
%lo2:_(s32) = COPY $x15
%x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
%x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
%y:_(s96) = G_ADD %x1, %x2
%hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
$x10 = COPY %hi(s32)
$x11 = COPY %mid(s32)
$x12 = COPY %lo(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: sub_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_SUB %2, %3
%5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32)
PseudoRET implicit $x10
...
---
name: sub_i8 name: sub_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i8 ; CHECK-LABEL: name: sub_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]] ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s32) ; CHECK-NEXT: $x10 = COPY [[SUB]](s32)
Show All 40 Lines bb.0.entry:
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s32) = G_SUB %0, %1 %2:_(s32) = G_SUB %0, %1
$x10 = COPY %2(s32) $x10 = COPY %2(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
---
name: sub_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i48
; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %xhi, %yhi
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %xlo, %ylo, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
%y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_SUB %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
%zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
$x10 = COPY %zhi(s32)
$x11 = COPY %zlo(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: sub_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i64
; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %lo1:_(s32) = COPY $x11
; CHECK-NEXT: %hi2:_(s32) = COPY $x12
; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %lo1, %lo2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%hi1:_(s32) = COPY $x10
%lo1:_(s32) = COPY $x11
%hi2:_(s32) = COPY $x12
%lo2:_(s32) = COPY $x13
%x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
%x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
%y:_(s64) = G_SUB %x1, %x2
%hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
$x10 = COPY %hiy(s32)
$x11 = COPY %loy(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: sub_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i96
; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
; CHECK-NEXT: %lo1:_(s32) = COPY $x12
; CHECK-NEXT: %hi2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
; CHECK-NEXT: %lo2:_(s32) = COPY $x15
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[USUBE1]], [[C1]]
; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE %lo1, %lo2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
; CHECK-NEXT: $x12 = COPY [[USUBE2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%hi1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
%lo1:_(s32) = COPY $x12
%hi2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
%lo2:_(s32) = COPY $x15
%x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
%x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
%y:_(s96) = G_SUB %x1, %x2
%hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
$x10 = COPY %hi(s32)
$x11 = COPY %mid(s32)
$x12 = COPY %lo(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir

Show All 16 Lines bb.0.entry:
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_ADD %2, %3 %4:_(s8) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: add_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_ADD %2, %3
%5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64)
PseudoRET implicit $x10
...
---
name: add_i16 name: add_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: add_i16 ; CHECK-LABEL: name: add_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[ADD]](s64) ; CHECK-NEXT: $x10 = COPY [[ADD]](s64)
Show All 40 Lines bb.0.entry:
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s64) = G_ADD %0, %1 %2:_(s64) = G_ADD %0, %1
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
---
name: add_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i72
; CHECK: %x00:_(s64) = COPY $x10
; CHECK-NEXT: %x01:_(s64) = COPY $x11
; CHECK-NEXT: %y00:_(s64) = COPY $x12
; CHECK-NEXT: %y01:_(s64) = COPY $x13
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %x00, %y00
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s64) = G_UADDE %x01, %y01, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%x00:_(s64) = COPY $x10
%x01:_(s64) = COPY $x11
%y00:_(s64) = COPY $x12
%y01:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01
%y0:_(s128) = G_MERGE_VALUES %y00(s64), %y01
%x:_(s72) = G_TRUNC %x0(s128)
%y:_(s72) = G_TRUNC %y0(s128)
%z:_(s72) = G_ADD %x, %y
%z0:_(s128) = G_ANYEXT %z(s72)
%z00:_(s64), %z01:_(s64) = G_UNMERGE_VALUES %z0(s128)
$x10 = COPY %z00(s64)
$x11 = COPY %z01(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: add_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i128
; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %lo1:_(s64) = COPY $x11
; CHECK-NEXT: %hi2:_(s64) = COPY $x12
; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s64) = G_UADDE %lo1, %lo2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%hi1:_(s64) = COPY $x10
%lo1:_(s64) = COPY $x11
%hi2:_(s64) = COPY $x12
%lo2:_(s64) = COPY $x13
%x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
%x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
%y:_(s128) = G_ADD %x1, %x2
%hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
$x10 = COPY %hiy(s64)
$x11 = COPY %loy(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: add_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i192
; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
; CHECK-NEXT: %lo1:_(s64) = COPY $x12
; CHECK-NEXT: %hi2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
; CHECK-NEXT: %lo2:_(s64) = COPY $x15
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s64) = G_UADDE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UADDE1]], [[C1]]
; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s64) = G_UADDE %lo1, %lo2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s64)
; CHECK-NEXT: $x12 = COPY [[UADDE2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%hi1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
%lo1:_(s64) = COPY $x12
%hi2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
%lo2:_(s64) = COPY $x15
%x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
%x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
%y:_(s192) = G_ADD %x1, %x2
%hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
$x10 = COPY %hi(s64)
$x11 = COPY %mid(s64)
$x12 = COPY %lo(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir

Show All 16 Lines bb.0.entry:
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_SUB %2, %3 %4:_(s8) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: sub_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_SUB %2, %3
%5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64)
PseudoRET implicit $x10
...
---
name: sub_i16 name: sub_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: sub_i16 ; CHECK-LABEL: name: sub_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]] ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[SUB]](s64) ; CHECK-NEXT: $x10 = COPY [[SUB]](s64)
Show All 40 Lines bb.0.entry:
; CHECK-NEXT: PseudoRET implicit $x10 ; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s64) = G_SUB %0, %1 %2:_(s64) = G_SUB %0, %1
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
---
name: sub_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i72
; CHECK: %x00:_(s64) = COPY $x10
; CHECK-NEXT: %x01:_(s64) = COPY $x11
; CHECK-NEXT: %y00:_(s64) = COPY $x12
; CHECK-NEXT: %y01:_(s64) = COPY $x13
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %x00, %y00
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s64) = G_USUBE %x01, %y01, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%x00:_(s64) = COPY $x10
%x01:_(s64) = COPY $x11
%y00:_(s64) = COPY $x12
%y01:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01
%y0:_(s128) = G_MERGE_VALUES %y00(s64), %y01
%x:_(s72) = G_TRUNC %x0(s128)
%y:_(s72) = G_TRUNC %y0(s128)
%z:_(s72) = G_SUB %x, %y
%z0:_(s128) = G_ANYEXT %z(s72)
%z00:_(s64), %z01:_(s64) = G_UNMERGE_VALUES %z0(s128)
$x10 = COPY %z00(s64)
$x11 = COPY %z01(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: sub_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i128
; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %lo1:_(s64) = COPY $x11
; CHECK-NEXT: %hi2:_(s64) = COPY $x12
; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s64) = G_USUBE %lo1, %lo2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%hi1:_(s64) = COPY $x10
%lo1:_(s64) = COPY $x11
%hi2:_(s64) = COPY $x12
%lo2:_(s64) = COPY $x13
%x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
%x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
%y:_(s128) = G_SUB %x1, %x2
%hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
$x10 = COPY %hiy(s64)
$x11 = COPY %loy(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: sub_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i192
; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
; CHECK-NEXT: %lo1:_(s64) = COPY $x12
; CHECK-NEXT: %hi2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
; CHECK-NEXT: %lo2:_(s64) = COPY $x15
; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %hi1, %hi2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s64) = G_USUBE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[USUBE1]], [[C1]]
; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s64) = G_USUBE %lo1, %lo2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s64)
; CHECK-NEXT: $x12 = COPY [[USUBE2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
%hi1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
%lo1:_(s64) = COPY $x12
%hi2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
%lo2:_(s64) = COPY $x15
%x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
%x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
%y:_(s192) = G_SUB %x1, %x2
%hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
$x10 = COPY %hi(s64)
$x11 = COPY %mid(s64)
$x12 = COPY %lo(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...