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Differential D157017

[RISCV][GlobalISel] Legalize logical instructions for nonpow 2 types
ClosedPublic

Authored by nitinjohnraj on Aug 3 2023, 11:02 AM.

Details

Reviewers
craig.topper
arsenm
Commits
rG3bcfd6e96203: [RISCV][GlobalISel] Legalize logical instructions for nonpow 2 types
Summary

Legalize G_AND, G_OR, G_XOR for (s7, s48) on rv32 and (s15, s72) on rv64

Diff Detail

Event Timeline

nitinjohnraj created this revision.Aug 3 2023, 11:02 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 3 2023, 11:02 AM
Herald added subscribers: jobnoorman, luke, VincentWu and 28 others. · View Herald Transcript
nitinjohnraj requested review of this revision.Aug 3 2023, 11:02 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 3 2023, 11:02 AM
Herald added subscribers: llvm-commits, wangpc, eopXD and 2 others. · View Herald Transcript
Harbormaster completed remote builds in B250128: Diff 546945.Aug 3 2023, 11:03 AM
craig.topper accepted this revision.Aug 3 2023, 11:26 AM

LGTM

This revision is now accepted and ready to land.Aug 3 2023, 11:26 AM
This revision was landed with ongoing or failed builds.Aug 7 2023, 4:25 PM
Closed by commit rG3bcfd6e96203: [RISCV][GlobalISel] Legalize logical instructions for nonpow 2 types (authored by nitinjohnraj). · Explain Why
This revision was automatically updated to reflect the committed changes.
nitinjohnraj added a commit: rG3bcfd6e96203: [RISCV][GlobalISel] Legalize logical instructions for nonpow 2 types.

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
GISel/
1 line
test/
CodeGen/
RISCV/
GlobalISel/
legalizer/
rv32/
50 lines
50 lines
50 lines
rv64/
50 lines
50 lines
50 lines

Diff 546945

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Show All 21 Lines
RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) { RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
const unsigned XLen = ST.getXLen(); const unsigned XLen = ST.getXLen();
const LLT XLenLLT = LLT::scalar(XLen); const LLT XLenLLT = LLT::scalar(XLen);
using namespace TargetOpcode; using namespace TargetOpcode;
getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR}) getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR})
.legalFor({XLenLLT}) .legalFor({XLenLLT})
.widenScalarToNextPow2(0)
.clampScalar(0, XLenLLT, XLenLLT); .clampScalar(0, XLenLLT, XLenLLT);
// Extensions // Extensions
auto ExtLegalFunc = [=](const LegalityQuery &Query) { auto ExtLegalFunc = [=](const LegalityQuery &Query) {
unsigned DstSize = Query.Types[0].getSizeInBits(); unsigned DstSize = Query.Types[0].getSizeInBits();
// Make sure that we have something that will fit in a register, and // Make sure that we have something that will fit in a register, and
// make sure it's a power of 2. // make sure it's a power of 2.
Show All 36 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: and_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_AND %2, %3
%5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32)
PseudoRET implicit $x10
...
---
name: and_i8 name: and_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i8 ; CHECK-LABEL: name: and_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s32) ; CHECK-NEXT: $x10 = COPY [[AND]](s32)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines bb.0.entry:
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s32) = G_AND %0, %1 %2:_(s32) = G_AND %0, %1
$x10 = COPY %2(s32) $x10 = COPY %2(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i48
; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, %yhi
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, %ylo
; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
%y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_AND %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
%zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
$x10 = COPY %zhi(s32)
$x11 = COPY %zlo(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: and_i64 name: and_i64
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i64 ; CHECK-LABEL: name: and_i64
; CHECK: %hi1:_(s32) = COPY $x10 ; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %lo1:_(s32) = COPY $x11 ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
; CHECK-NEXT: %hi2:_(s32) = COPY $x12 ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
; CHECK-NEXT: %lo2:_(s32) = COPY $x13 ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: or_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_OR %2, %3
%5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32)
PseudoRET implicit $x10
...
---
name: or_i8 name: or_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i8 ; CHECK-LABEL: name: or_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]] ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s32) ; CHECK-NEXT: $x10 = COPY [[OR]](s32)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines bb.0.entry:
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s32) = G_OR %0, %1 %2:_(s32) = G_OR %0, %1
$x10 = COPY %2(s32) $x10 = COPY %2(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i48
; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %xhi, %yhi
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %xlo, %ylo
; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
%y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_OR %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
%zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
$x10 = COPY %zhi(s32)
$x11 = COPY %zlo(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: or_i64 name: or_i64
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i64 ; CHECK-LABEL: name: or_i64
; CHECK: %hi1:_(s32) = COPY $x10 ; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %lo1:_(s32) = COPY $x11 ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
; CHECK-NEXT: %hi2:_(s32) = COPY $x12 ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
; CHECK-NEXT: %lo2:_(s32) = COPY $x13 ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \ # RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
# RUN: | FileCheck %s # RUN: | FileCheck %s
--- ---
name: xor_i7
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i7
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11
%2:_(s7) = G_TRUNC %0(s32)
%3:_(s7) = G_TRUNC %1(s32)
%4:_(s7) = G_XOR %2, %3
%5:_(s32) = G_ANYEXT %4(s7)
$x10 = COPY %5(s32)
PseudoRET implicit $x10
...
---
name: xor_i8 name: xor_i8
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i8 ; CHECK-LABEL: name: xor_i8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]] ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s32) ; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines bb.0.entry:
%0:_(s32) = COPY $x10 %0:_(s32) = COPY $x10
%1:_(s32) = COPY $x11 %1:_(s32) = COPY $x11
%2:_(s32) = G_XOR %0, %1 %2:_(s32) = G_XOR %0, %1
$x10 = COPY %2(s32) $x10 = COPY %2(s32)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i48
; CHECK: %xhi:_(s32) = COPY $x10
; CHECK-NEXT: %xlo:_(s32) = COPY $x11
; CHECK-NEXT: %yhi:_(s32) = COPY $x12
; CHECK-NEXT: %ylo:_(s32) = COPY $x13
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %xhi, %yhi
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %xlo, %ylo
; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%xhi:_(s32) = COPY $x10
%xlo:_(s32) = COPY $x11
%yhi:_(s32) = COPY $x12
%ylo:_(s32) = COPY $x13
%x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
%y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_XOR %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
%zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
$x10 = COPY %zhi(s32)
$x11 = COPY %zlo(s32)
PseudoRET implicit $x10, implicit $x11
...
---
name: xor_i64 name: xor_i64
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i64 ; CHECK-LABEL: name: xor_i64
; CHECK: %hi1:_(s32) = COPY $x10 ; CHECK: %hi1:_(s32) = COPY $x10
; CHECK-NEXT: %lo1:_(s32) = COPY $x11 ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
; CHECK-NEXT: %hi2:_(s32) = COPY $x12 ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
; CHECK-NEXT: %lo2:_(s32) = COPY $x13 ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir

Show All 16 Lines bb.0.entry:
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_AND %2, %3 %4:_(s8) = G_AND %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_AND %2, %3
%5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64)
PseudoRET implicit $x10
...
---
name: and_i16 name: and_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i16 ; CHECK-LABEL: name: and_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]] ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[AND]](s64) ; CHECK-NEXT: $x10 = COPY [[AND]](s64)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines bb.0.entry:
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s64) = G_AND %0, %1 %2:_(s64) = G_AND %0, %1
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: and_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i72
; CHECK: %x00:_(s64) = COPY $x10
; CHECK-NEXT: %x01:_(s64) = COPY $x11
; CHECK-NEXT: %y00:_(s64) = COPY $x12
; CHECK-NEXT: %y01:_(s64) = COPY $x13
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %x00, %y00
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %x01, %y01
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%x00:_(s64) = COPY $x10
%x01:_(s64) = COPY $x11
%y00:_(s64) = COPY $x12
%y01:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01
%y0:_(s128) = G_MERGE_VALUES %y00(s64), %y01
%x:_(s72) = G_TRUNC %x0(s128)
%y:_(s72) = G_TRUNC %y0(s128)
%z:_(s72) = G_AND %x, %y
%z0:_(s128) = G_ANYEXT %z(s72)
%z00:_(s64), %z01:_(s64) = G_UNMERGE_VALUES %z0(s128)
$x10 = COPY %z00(s64)
$x11 = COPY %z01(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: and_i128 name: and_i128
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: and_i128 ; CHECK-LABEL: name: and_i128
; CHECK: %hi1:_(s64) = COPY $x10 ; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %lo1:_(s64) = COPY $x11 ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
; CHECK-NEXT: %hi2:_(s64) = COPY $x12 ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
; CHECK-NEXT: %lo2:_(s64) = COPY $x13 ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir

Show All 16 Lines bb.0.entry:
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_OR %2, %3 %4:_(s8) = G_OR %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_OR %2, %3
%5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64)
PseudoRET implicit $x10
...
---
name: or_i16 name: or_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i16 ; CHECK-LABEL: name: or_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]] ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[OR]](s64) ; CHECK-NEXT: $x10 = COPY [[OR]](s64)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines bb.0.entry:
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s64) = G_OR %0, %1 %2:_(s64) = G_OR %0, %1
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: or_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i72
; CHECK: %x00:_(s64) = COPY $x10
; CHECK-NEXT: %x01:_(s64) = COPY $x11
; CHECK-NEXT: %y00:_(s64) = COPY $x12
; CHECK-NEXT: %y01:_(s64) = COPY $x13
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x00, %y00
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR %x01, %y01
; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: $x11 = COPY [[OR1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%x00:_(s64) = COPY $x10
%x01:_(s64) = COPY $x11
%y00:_(s64) = COPY $x12
%y01:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01
%y0:_(s128) = G_MERGE_VALUES %y00(s64), %y01
%x:_(s72) = G_TRUNC %x0(s128)
%y:_(s72) = G_TRUNC %y0(s128)
%z:_(s72) = G_OR %x, %y
%z0:_(s128) = G_ANYEXT %z(s72)
%z00:_(s64), %z01:_(s64) = G_UNMERGE_VALUES %z0(s128)
$x10 = COPY %z00(s64)
$x11 = COPY %z01(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: or_i128 name: or_i128
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: or_i128 ; CHECK-LABEL: name: or_i128
; CHECK: %hi1:_(s64) = COPY $x10 ; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %lo1:_(s64) = COPY $x11 ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
; CHECK-NEXT: %hi2:_(s64) = COPY $x12 ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
; CHECK-NEXT: %lo2:_(s64) = COPY $x13 ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir

Show All 16 Lines bb.0.entry:
%3:_(s8) = G_TRUNC %1(s64) %3:_(s8) = G_TRUNC %1(s64)
%4:_(s8) = G_XOR %2, %3 %4:_(s8) = G_XOR %2, %3
%5:_(s64) = G_ANYEXT %4(s8) %5:_(s64) = G_ANYEXT %4(s8)
$x10 = COPY %5(s64) $x10 = COPY %5(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i15
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i15
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11
%2:_(s15) = G_TRUNC %0(s64)
%3:_(s15) = G_TRUNC %1(s64)
%4:_(s15) = G_XOR %2, %3
%5:_(s64) = G_ANYEXT %4(s15)
$x10 = COPY %5(s64)
PseudoRET implicit $x10
...
---
name: xor_i16 name: xor_i16
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i16 ; CHECK-LABEL: name: xor_i16
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]] ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY]], [[COPY1]]
; CHECK-NEXT: $x10 = COPY [[XOR]](s64) ; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines bb.0.entry:
%0:_(s64) = COPY $x10 %0:_(s64) = COPY $x10
%1:_(s64) = COPY $x11 %1:_(s64) = COPY $x11
%2:_(s64) = G_XOR %0, %1 %2:_(s64) = G_XOR %0, %1
$x10 = COPY %2(s64) $x10 = COPY %2(s64)
PseudoRET implicit $x10 PseudoRET implicit $x10
... ...
--- ---
name: xor_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i72
; CHECK: %x00:_(s64) = COPY $x10
; CHECK-NEXT: %x01:_(s64) = COPY $x11
; CHECK-NEXT: %y00:_(s64) = COPY $x12
; CHECK-NEXT: %y01:_(s64) = COPY $x13
; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %x00, %y00
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR %x01, %y01
; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
%x00:_(s64) = COPY $x10
%x01:_(s64) = COPY $x11
%y00:_(s64) = COPY $x12
%y01:_(s64) = COPY $x13
%x0:_(s128) = G_MERGE_VALUES %x00(s64), %x01
%y0:_(s128) = G_MERGE_VALUES %y00(s64), %y01
%x:_(s72) = G_TRUNC %x0(s128)
%y:_(s72) = G_TRUNC %y0(s128)
%z:_(s72) = G_XOR %x, %y
%z0:_(s128) = G_ANYEXT %z(s72)
%z00:_(s64), %z01:_(s64) = G_UNMERGE_VALUES %z0(s128)
$x10 = COPY %z00(s64)
$x11 = COPY %z01(s64)
PseudoRET implicit $x10, implicit $x11
...
---
name: xor_i128 name: xor_i128
body: | body: |
bb.0.entry: bb.0.entry:
; CHECK-LABEL: name: xor_i128 ; CHECK-LABEL: name: xor_i128
; CHECK: %hi1:_(s64) = COPY $x10 ; CHECK: %hi1:_(s64) = COPY $x10
; CHECK-NEXT: %lo1:_(s64) = COPY $x11 ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
; CHECK-NEXT: %hi2:_(s64) = COPY $x12 ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
; CHECK-NEXT: %lo2:_(s64) = COPY $x13 ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
▲ Show 20 Lines • Show All 52 Lines • Show Last 20 Lines