[mlir][LLVM] Convert access group metadata to using attributes instead of ops

[zero9178]

Summary

Using MLIR attributes instead of metadata has many advantages:

• No indirection: Attributes can simply refer to each other seemlessly without having to use the indirection of SymbolRefAttr. This also gives us correctness by construction in a lot of places as well
• Multithreading safe: The Attribute infrastructure gives us thread-safety for free. Creating operations and inserting them into a block is not thread-safe. This is a major use case for e.g. the inliner in MLIR which runs in parallel
• Easier to create: There is no need for a builder or a metadata region

This patch therefore does exactly that. It leverages the new distinct attributes to create distinct access groups in a deterministic and threadsafe manner.

[gysit]

mlir/lib/Target/LLVMIR/LoopAnnotationImporter.h

35–38

nit: node

mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp

248

nit: accessGroupAttr

[zero9178]

Address review comments

[zero9178]

Reword doc, don't forget about LLVMIRIntrinsicGen

[zero9178]

Fix test

[gysit]

Thanks LGTM!

[zero9178]

clang-format

mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td

let parameters = (ins
     OptionalParameter<"LoopUnrollAndJamAttr">:$unrollAndJam,
     OptionalParameter<"LoopLICMAttr">:$licm,
     OptionalParameter<"LoopDistributeAttr">:$distribute,
     OptionalParameter<"LoopPipelineAttr">:$pipeline,
     OptionalParameter<"LoopPeeledAttr">:$peeled,
     OptionalParameter<"LoopUnswitchAttr">:$unswitch,
     OptionalParameter<"BoolAttr">:$mustProgress,
     OptionalParameter<"BoolAttr">:$isVectorized,
-    OptionalArrayRefParameter<"SymbolRefAttr">:$parallelAccesses,
+    OptionalArrayRefParameter<"AccessGroupAttr">:$parallelAccesses,
     OptionalParameter<"FusedLoc">:$startLoc,
     OptionalParameter<"FusedLoc">:$endLoc
   );
 
   let assemblyFormat = "`<` struct(params) `>`";
 }
 
 //===----------------------------------------------------------------------===//

 }
 
 def LLVM_AliasScopeArrayAttr
     : TypedArrayAttrBase<LLVM_AliasScopeAttr,
                          LLVM_AliasScopeAttr.summary # " array"> {
   let constBuilderCall = ?;
 }
 
+//===----------------------------------------------------------------------===//
+// AccessGroupAttr
+//===----------------------------------------------------------------------===//
+
+def LLVM_AccessGroupAttr : LLVM_Attr<"AccessGroup", "access_group"> {
+
+  let parameters = (ins "DistinctAttr":$id);
+
+  let builders = [
+    AttrBuilder<(ins), [{
+      return $_get($_ctxt, DistinctAttr::create(UnitAttr::get($_ctxt)));
+    }]>
+  ];
+
+  let summary = "LLVM dialect access group metadata";
+
+  let description = [{
+    Defines an access group metadata that can be set on any instruction
+    that potentially accesses memory via the `AccessGroupOpInterface` or on
+    branch instructions in the loop latch block via the `parallelAccesses`
+    parameter of `LoopAnnotationAttr`.
+
+    See the following link for more details:
+    https://llvm.org/docs/LangRef.html#llvm-access-group-metadata
+  }];
+
+  let assemblyFormat = "`<` struct(params) `>`";
+}
+
+def LLVM_AccessGroupArrayAttr
+    : TypedArrayAttrBase<LLVM_AccessGroupAttr,
+                         LLVM_AccessGroupAttr.summary # " array"> {
+  let constBuilderCall = ?;
+}
+
 #endif // LLVMIR_ATTRDEFS

mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td

 // and alias analysis interfaces. The "aliasAttrs" list contains the arguments
 // required by the access group and alias analysis interfaces. Derived
 // operations should append the "aliasAttrs" to their argument list.
 class LLVM_MemAccessOpBase<string mnemonic, list<Trait> traits = []> :
     LLVM_Op<mnemonic, !listconcat([
       DeclareOpInterfaceMethods<AccessGroupOpInterface>,
       DeclareOpInterfaceMethods<AliasAnalysisOpInterface>], traits)>,
     LLVM_MemOpPatterns {
-  dag aliasAttrs = (ins OptionalAttr<SymbolRefArrayAttr>:$access_groups,
+  dag aliasAttrs = (ins OptionalAttr<LLVM_AccessGroupArrayAttr>:$access_groups,
                     OptionalAttr<LLVM_AliasScopeArrayAttr>:$alias_scopes,
                     OptionalAttr<LLVM_AliasScopeArrayAttr>:$noalias_scopes,
                     OptionalAttr<SymbolRefArrayAttr>:$tbaa);
 }
 
 // Base class for LLVM intrinsics operation. It is similar to LLVM_Op, but
 // provides the "llvmBuilder" field for constructing the intrinsic.
 // The builder relies on the contents of "overloadedResults" and
: LLVM_OpBase<dialect, opName, !listconcat(
             [DeclareOpInterfaceMethods<AliasAnalysisOpInterface>], []),
         !if(!gt(requiresFastmath, 0),
             [DeclareOpInterfaceMethods<FastmathFlagsInterface>], []),
         traits)>,
       LLVM_MemOpPatterns,
       Results<!if(!gt(numResults, 0), (outs LLVM_Type:$res), (outs))> {
   dag aliasAttrs = !con(
         !if(!gt(requiresAccessGroup, 0),
-            (ins OptionalAttr<SymbolRefArrayAttr>:$access_groups),
+            (ins OptionalAttr<LLVM_AccessGroupArrayAttr>:$access_groups),
             (ins )),
         !if(!gt(requiresAliasAnalysis, 0),
             (ins OptionalAttr<LLVM_AliasScopeArrayAttr>:$alias_scopes,
                  OptionalAttr<LLVM_AliasScopeArrayAttr>:$noalias_scopes,
                  OptionalAttr<SymbolRefArrayAttr>:$tbaa),
             (ins )));
   string resultPattern = !if(!gt(numResults, 1),
                              LLVM_IntrPatterns.structResult,

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

let builders = [
     OpBuilder<(ins "Block *":$dest), [{
       build($_builder, $_state, ValueRange(), dest);
     }]>,
     OpBuilder<(ins "ValueRange":$operands, "Block *":$dest), [{
       build($_builder, $_state, operands, /*loop_annotation=*/{}, dest);
     }]>,
     LLVM_TerminatorPassthroughOpBuilder
   ];
-  let hasVerifier = 1;
 }
 def LLVM_CondBrOp : LLVM_TerminatorOp<"cond_br",
     [AttrSizedOperandSegments, DeclareOpInterfaceMethods<BranchOpInterface>,
      Pure]> {
   let arguments = (ins I1:$condition,
                    Variadic<LLVM_Type>:$trueDestOperands,
                    Variadic<LLVM_Type>:$falseDestOperands,
                    OptionalAttr<ElementsAttr>:$branch_weights,
[{
             falseOperands);
   }]>,
   OpBuilder<(ins "Value":$condition, "ValueRange":$trueOperands, "ValueRange":$falseOperands,
     "ElementsAttr":$branchWeights, "Block *":$trueDest, "Block *":$falseDest),
   [{
       build($_builder, $_state, condition, trueOperands, falseOperands, branchWeights,
       {}, trueDest, falseDest);
   }]>, LLVM_TerminatorPassthroughOpBuilder];
-  let hasVerifier = 1;
 }
 
 //===----------------------------------------------------------------------===//
 // ReturnOp
 //===----------------------------------------------------------------------===//
 
 def LLVM_ReturnOp : LLVM_TerminatorOp<"return", [Pure, ReturnLike]> {
   let arguments = (ins Optional<LLVM_Type>:$arg);
OpBuilder<(ins "StringRef":$symName,
         CArg<"bool", "true">:$createBodyBlock,
         CArg<"ArrayRef<NamedAttribute>", "{}">:$attributes)>
   ];
 
   let hasCustomAssemblyFormat = 1;
   let hasRegionVerifier = 1;
 }
 
-def LLVM_AccessGroupMetadataOp : LLVM_Op<"access_group", [
-  HasParent<"MetadataOp">, Symbol
-]> {
-  let arguments = (ins
-    SymbolNameAttr:$sym_name
-  );
-  let summary = "LLVM dialect access group metadata.";
-  let description = [{
-    Defines an access group metadata that can be attached to any instruction
-    that potentially accesses memory. The access group may be attached to a
-    memory accessing instruction via the `llvm.access.group` metadata and
-    a branch instruction in the loop latch block via the
-    `llvm.loop.parallel_accesses` metadata.
-
-    See the following link for more details:
-    https://llvm.org/docs/LangRef.html#llvm-access-group-metadata
-  }];
-  let assemblyFormat = "$sym_name attr-dict";
-}
-
 def LLVM_TBAARootMetadataOp : LLVM_Op<"tbaa_root", [
   HasParent<"MetadataOp">, Symbol
 ]> {
   let arguments = (ins
     SymbolNameAttr:$sym_name,
     StrAttr:$identity
   );
   let summary = "LLVM dialect TBAA root node metadata.";

mlir/include/mlir/Target/LLVMIR/ModuleImport.h

public:
   LogicalResult convertMetadata();
 
   /// Returns the MLIR symbol reference mapped to the given LLVM TBAA
   /// metadata `node`.
   SymbolRefAttr lookupTBAAAttr(const llvm::MDNode *node) const {
     return tbaaMapping.lookup(node);
   }
 
-  /// Returns the symbol references pointing to the access group operations that
-  /// map to the access group nodes starting from the access group metadata
-  /// `node`. Returns failure, if any of the symbol references cannot be found.
-  FailureOr<SmallVector<SymbolRefAttr>>
+  /// Returns the access group attributes that map to the access group nodes
+  /// starting from the access group metadata `node`. Returns failure, if any of
+  /// the attributes cannot be found.
+  FailureOr<SmallVector<AccessGroupAttr>>
   lookupAccessGroupAttrs(const llvm::MDNode *node) const;
 
   /// Returns the loop annotation attribute that corresponds to the given LLVM
   /// loop metadata `node`.
   LoopAnnotationAttr translateLoopAnnotationAttr(const llvm::MDNode *node,
                                                  Location loc) const;
 
   /// Returns the alias scope attributes that map to the alias scope nodes

mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h

private:
   /// Converts individual components.
   LogicalResult convertOperation(Operation &op, llvm::IRBuilderBase &builder);
   LogicalResult convertFunctionSignatures();
   LogicalResult convertFunctions();
   LogicalResult convertComdats();
   LogicalResult convertGlobals();
   LogicalResult convertOneFunction(LLVMFuncOp func);
 
-  /// Process access_group LLVM Metadata operations and create LLVM
-  /// metadata nodes.
-  LogicalResult createAccessGroupMetadata();
-
   /// Process alias.scope LLVM Metadata operations and create LLVM
   /// metadata nodes for them and their domains.
   LogicalResult createAliasScopeMetadata();
 
   /// Returns the LLVM metadata corresponding to a symbol reference to an mlir
   /// LLVM dialect TBAATagOp operation.
   llvm::MDNode *getTBAANode(Operation *op, SymbolRefAttr tagRef) const;
 

mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp

Type AllocaOp::getResultPtrElementType() {
   return getElemType().has_value() ? *getElemType()
                                    : getResult().getType().getElementType();
 }
 
 //===----------------------------------------------------------------------===//
 // LLVM::BrOp
 //===----------------------------------------------------------------------===//
 
-/// Check if the `loopAttr` references correct symbols.
-static LogicalResult verifyLoopAnnotationAttr(LoopAnnotationAttr loopAttr,
-                                              Operation *op) {
-  if (!loopAttr)
-    return success();
-  // If the `llvm.loop` attribute is present, enforce the following structure,
-  // which the module translation can assume.
-  ArrayRef<SymbolRefAttr> parallelAccesses = loopAttr.getParallelAccesses();
-  if (parallelAccesses.empty())
-    return success();
-  for (SymbolRefAttr accessGroupRef : parallelAccesses) {
-    StringAttr metadataName = accessGroupRef.getRootReference();
-    auto metadataOp = SymbolTable::lookupNearestSymbolFrom<LLVM::MetadataOp>(
-        op->getParentOp(), metadataName);
-    if (!metadataOp)
-      return op->emitOpError() << "expected '" << accessGroupRef
-                               << "' to reference a metadata op";
-    StringAttr accessGroupName = accessGroupRef.getLeafReference();
-    Operation *accessGroupOp =
-        SymbolTable::lookupNearestSymbolFrom(metadataOp, accessGroupName);
-    if (!accessGroupOp)
-      return op->emitOpError() << "expected '" << accessGroupRef
-                               << "' to reference an access_group op";
-  }
-  return success();
-}
-
 SuccessorOperands BrOp::getSuccessorOperands(unsigned index) {
   assert(index == 0 && "invalid successor index");
   return SuccessorOperands(getDestOperandsMutable());
 }
 
-LogicalResult BrOp::verify() {
-  return verifyLoopAnnotationAttr(getLoopAnnotationAttr(), *this);
-}
-
 //===----------------------------------------------------------------------===//
 // LLVM::CondBrOp
 //===----------------------------------------------------------------------===//
 
 SuccessorOperands CondBrOp::getSuccessorOperands(unsigned index) {
   assert(index < getNumSuccessors() && "invalid successor index");
   return SuccessorOperands(index == 0 ? getTrueDestOperandsMutable()
                                       : getFalseDestOperandsMutable());
 }
 
-LogicalResult CondBrOp::verify() {
-  return verifyLoopAnnotationAttr(getLoopAnnotationAttr(), *this);
-}
-
 void CondBrOp::build(OpBuilder &builder, OperationState &result,
                      Value condition, Block *trueDest, ValueRange trueOperands,
                      Block *falseDest, ValueRange falseOperands,
                      std::optional<std::pair<uint32_t, uint32_t>> weights) {
   ElementsAttr weightsAttr;
   if (weights)
     weightsAttr =
         builder.getI32VectorAttr({static_cast<int32_t>(weights->first),

 //===----------------------------------------------------------------------===//
 
 namespace {
 struct LLVMOpAsmDialectInterface : public OpAsmDialectInterface {
   using OpAsmDialectInterface::OpAsmDialectInterface;
 
   AliasResult getAlias(Attribute attr, raw_ostream &os) const override {
     return TypeSwitch<Attribute, AliasResult>(attr)
-        .Case<AliasScopeAttr, AliasScopeDomainAttr, DIBasicTypeAttr,
-              DICompileUnitAttr, DICompositeTypeAttr, DIDerivedTypeAttr,
-              DIFileAttr, DILabelAttr, DILexicalBlockAttr,
+        .Case<AccessGroupAttr, AliasScopeAttr, AliasScopeDomainAttr,
+              DIBasicTypeAttr, DICompileUnitAttr, DICompositeTypeAttr,
+              DIDerivedTypeAttr, DIFileAttr, DILabelAttr, DILexicalBlockAttr,
               DILexicalBlockFileAttr, DILocalVariableAttr, DINamespaceAttr,
               DINullTypeAttr, DISubprogramAttr, DISubroutineTypeAttr,
               LoopAnnotationAttr, LoopVectorizeAttr, LoopInterleaveAttr,
               LoopUnrollAttr, LoopUnrollAndJamAttr, LoopLICMAttr,
               LoopDistributeAttr, LoopPipelineAttr, LoopPeeledAttr,
               LoopUnswitchAttr>([&](auto attr) {
           os << decltype(attr)::getMnemonic();
           return AliasResult::OverridableAlias;

mlir/lib/Dialect/LLVMIR/IR/LLVMInterfaces.cpp

 }
 
 //===----------------------------------------------------------------------===//
 // AccessGroupOpInterface
 //===----------------------------------------------------------------------===//
 
 LogicalResult mlir::LLVM::detail::verifyAccessGroupOpInterface(Operation *op) {
   auto iface = cast<AccessGroupOpInterface>(op);
-  if (failed(verifySymbolRefsPointTo<LLVM::AccessGroupMetadataOp>(
-          iface, "access groups", iface.getAccessGroupsOrNull())))
-    return failure();
+  ArrayAttr accessGroups = iface.getAccessGroupsOrNull();
+  if (!accessGroups)
+    return success();
+  for (Attribute iter : accessGroups)
+    if (!isa<AccessGroupAttr>(iter))
+      return op->emitOpError("expected op to return array of ")
+             << AccessGroupAttr::getMnemonic() << " attributes";
   return success();
 }
 
 //===----------------------------------------------------------------------===//
 // AliasAnalysisOpInterface
 //===----------------------------------------------------------------------===//
 
 LogicalResult

mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp

 
 /// Looks up all the symbol references pointing to the access group operations
 /// that map to the access group nodes starting from the access group metadata
 /// `node`, and attaches all of them to the imported operation if the lookups
 /// succeed. Returns failure otherwise.
 static LogicalResult setAccessGroupsAttr(const llvm::MDNode *node,
                                          Operation *op,
                                          LLVM::ModuleImport &moduleImport) {
-  FailureOr<SmallVector<SymbolRefAttr>> accessGroups =
+  FailureOr<SmallVector<AccessGroupAttr>> accessGroups =
       moduleImport.lookupAccessGroupAttrs(node);
   if (failed(accessGroups))
     return failure();
 
   auto iface = dyn_cast<AccessGroupOpInterface>(op);
   if (!iface)
     return failure();
 
   iface.setAccessGroups(ArrayAttr::get(
-      iface.getContext(),
-      SmallVector<Attribute>{accessGroups->begin(), accessGroups->end()}));
+      iface.getContext(), llvm::to_vector_of<Attribute>(*accessGroups)));
   return success();
 }
 
 /// Converts the given loop metadata node to an MLIR loop annotation attribute
 /// and attaches it to the imported operation if the translation succeeds.
 /// Returns failure otherwise.
 static LogicalResult setLoopAttr(const llvm::MDNode *node, Operation *op,
                                  LLVM::ModuleImport &moduleImport) {

mlir/lib/Target/LLVMIR/LoopAnnotationImporter.h

 class LoopAnnotationImporter {
 public:
   LoopAnnotationImporter(ModuleImport &moduleImport, OpBuilder &builder)
       : moduleImport(moduleImport), builder(builder) {}
   LoopAnnotationAttr translateLoopAnnotation(const llvm::MDNode *node,
                                              Location loc);
 
   /// Converts all LLVM access groups starting from node to MLIR access group
-  /// operations mested in the region of metadataOp. It stores a mapping from
-  /// every nested access group nod to the symbol pointing to the translated
-  /// operation. Returns success if all conversions succeed and failure
-  /// otherwise.
-  LogicalResult translateAccessGroup(const llvm::MDNode *node, Location loc,
-                                     MetadataOp metadataOp);
-
-  /// Returns the symbol references pointing to the access group operations that
-  /// map to the access group nodes starting from the access group metadata
-  /// node. Returns failure, if any of the symbol references cannot be found.
-  FailureOr<SmallVector<SymbolRefAttr>>
+  /// attributes. It stores a mapping from every nested access group node to the
+  /// translated attribute. Returns success if all conversions succeed and
+  /// failure otherwise.
+  LogicalResult translateAccessGroup(const llvm::MDNode *node, Location loc);
+
+  /// Returns the access group attribute that map to the access group nodes
+  /// starting from the access group metadata node. Returns failure, if any of
+  /// the attributes cannot be found.
+  FailureOr<SmallVector<AccessGroupAttr>>
   lookupAccessGroupAttrs(const llvm::MDNode *node) const;
 
   /// The ModuleImport owning this instance.
   ModuleImport &moduleImport;
 
 private:
   /// Returns the LLVM metadata corresponding to a llvm loop metadata attribute.
   LoopAnnotationAttr lookupLoopMetadata(const llvm::MDNode *node) const {
     return loopMetadataMapping.lookup(node);
   }
 
   void mapLoopMetadata(const llvm::MDNode *metadata, LoopAnnotationAttr attr) {
     auto result = loopMetadataMapping.try_emplace(metadata, attr);
     (void)result;
     assert(result.second &&
            "attempting to map loop options that was already mapped");
   }
 
   OpBuilder &builder;
   DenseMap<const llvm::MDNode *, LoopAnnotationAttr> loopMetadataMapping;
-  /// Mapping between original LLVM access group metadata nodes and the symbol
-  /// references pointing to the imported MLIR access group operations.
-  DenseMap<const llvm::MDNode *, SymbolRefAttr> accessGroupMapping;
+  /// Mapping between original LLVM access group metadata nodes and the imported
+  /// MLIR access group attributes.
+  DenseMap<const llvm::MDNode *, AccessGroupAttr> accessGroupMapping;
 };
 
 } // namespace detail
 } // namespace LLVM
 } // namespace mlir
 
 #endif // MLIR_LIB_TARGET_LLVMIR_LOOPANNOTATIONIMPORTER_H_

mlir/lib/Target/LLVMIR/LoopAnnotationImporter.cpp

struct LoopMetadataConversion {
   FailureOr<LoopInterleaveAttr> convertInterleaveAttr();
   FailureOr<LoopUnrollAttr> convertUnrollAttr();
   FailureOr<LoopUnrollAndJamAttr> convertUnrollAndJamAttr();
   FailureOr<LoopLICMAttr> convertLICMAttr();
   FailureOr<LoopDistributeAttr> convertDistributeAttr();
   FailureOr<LoopPipelineAttr> convertPipelineAttr();
   FailureOr<LoopPeeledAttr> convertPeeledAttr();
   FailureOr<LoopUnswitchAttr> convertUnswitchAttr();
-  FailureOr<SmallVector<SymbolRefAttr>> convertParallelAccesses();
+  FailureOr<SmallVector<AccessGroupAttr>> convertParallelAccesses();
   FusedLoc convertStartLoc();
   FailureOr<FusedLoc> convertEndLoc();
 
   llvm::SmallVector<llvm::DILocation *, 2> locations;
   llvm::StringMap<const llvm::MDNode *> propertyMap;
   const llvm::MDNode *node;
   Location loc;
   LoopAnnotationImporter &loopAnnotationImporter;

 }
 
 FailureOr<LoopUnswitchAttr> LoopMetadataConversion::convertUnswitchAttr() {
   FailureOr<BoolAttr> partialDisable =
       lookupUnitNode("llvm.loop.unswitch.partial.disable");
   return createIfNonNull<LoopUnswitchAttr>(ctx, partialDisable);
 }
 
-FailureOr<SmallVector<SymbolRefAttr>>
+FailureOr<SmallVector<AccessGroupAttr>>
 LoopMetadataConversion::convertParallelAccesses() {
   FailureOr<SmallVector<llvm::MDNode *>> nodes =
       lookupMDNodes("llvm.loop.parallel_accesses");
   if (failed(nodes))
     return failure();
-  SmallVector<SymbolRefAttr> refs;
+  SmallVector<AccessGroupAttr> refs;
   for (llvm::MDNode *node : *nodes) {
-    FailureOr<SmallVector<SymbolRefAttr>> accessGroups =
+    FailureOr<SmallVector<AccessGroupAttr>> accessGroups =
         loopAnnotationImporter.lookupAccessGroupAttrs(node);
     if (failed(accessGroups)) {
       emitWarning(loc) << "could not lookup access group";
       continue;
     }
     llvm::append_range(refs, *accessGroups);
   }
   return refs;
LoopAnnotationAttr LoopMetadataConversion::convert() {
   FailureOr<LoopLICMAttr> licmAttr = convertLICMAttr();
   FailureOr<LoopDistributeAttr> distributeAttr = convertDistributeAttr();
   FailureOr<LoopPipelineAttr> pipelineAttr = convertPipelineAttr();
   FailureOr<LoopPeeledAttr> peeledAttr = convertPeeledAttr();
   FailureOr<LoopUnswitchAttr> unswitchAttr = convertUnswitchAttr();
   FailureOr<BoolAttr> mustProgress = lookupUnitNode("llvm.loop.mustprogress");
   FailureOr<BoolAttr> isVectorized =
       lookupIntNodeAsBoolAttr("llvm.loop.isvectorized");
-  FailureOr<SmallVector<SymbolRefAttr>> parallelAccesses =
+  FailureOr<SmallVector<AccessGroupAttr>> parallelAccesses =
       convertParallelAccesses();
 
   // Drop the metadata if there are parts that cannot be imported.
   if (!propertyMap.empty()) {
     for (auto name : propertyMap.keys())
       emitWarning(loc) << "unknown loop annotation " << name;
     return {};
   }
if (it != loopMetadataMapping.end())
     return it->getSecond();
 
   LoopAnnotationAttr attr = LoopMetadataConversion(node, loc, *this).convert();
 
   mapLoopMetadata(node, attr);
   return attr;
 }
 
-LogicalResult LoopAnnotationImporter::translateAccessGroup(
-    const llvm::MDNode *node, Location loc, MetadataOp metadataOp) {
+LogicalResult
+LoopAnnotationImporter::translateAccessGroup(const llvm::MDNode *node,
+                                             Location loc) {
   SmallVector<const llvm::MDNode *> accessGroups;
   if (!node->getNumOperands())
     accessGroups.push_back(node);
   for (const llvm::MDOperand &operand : node->operands()) {
     auto *childNode = dyn_cast<llvm::MDNode>(operand);
     if (!childNode)
       return failure();
     accessGroups.push_back(cast<llvm::MDNode>(operand.get()));
   }
 
   // Convert all entries of the access group list to access group operations.
   for (const llvm::MDNode *accessGroup : accessGroups) {
     if (accessGroupMapping.count(accessGroup))
       continue;
     // Verify the access group node is distinct and empty.
     if (accessGroup->getNumOperands() != 0 || !accessGroup->isDistinct())
       return emitWarning(loc)
              << "expected an access group node to be empty and distinct";
 
-    OpBuilder::InsertionGuard guard(builder);
-    builder.setInsertionPointToEnd(&metadataOp.getBody().back());
-    auto groupOp = builder.create<AccessGroupMetadataOp>(
-        loc, llvm::formatv("group_{0}", accessGroupMapping.size()).str());
-    // Add a mapping from the access group node to the symbol reference pointing
-    // to the newly created operation.
-    accessGroupMapping[accessGroup] = SymbolRefAttr::get(
-        builder.getContext(), metadataOp.getSymName(),
-        FlatSymbolRefAttr::get(builder.getContext(), groupOp.getSymName()));
+    // Add a mapping from the access group node to the newly created attribute.
+    accessGroupMapping[accessGroup] = builder.getAttr<AccessGroupAttr>();
   }
   return success();
 }
 
-FailureOr<SmallVector<SymbolRefAttr>>
+FailureOr<SmallVector<AccessGroupAttr>>
 LoopAnnotationImporter::lookupAccessGroupAttrs(const llvm::MDNode *node) const {
   // An access group node is either a single access group or an access group
   // list.
-  SmallVector<SymbolRefAttr> accessGroups;
+  SmallVector<AccessGroupAttr> accessGroups;
   if (!node->getNumOperands())
     accessGroups.push_back(accessGroupMapping.lookup(node));
   for (const llvm::MDOperand &operand : node->operands()) {
     auto *node = cast<llvm::MDNode>(operand.get());
     accessGroups.push_back(accessGroupMapping.lookup(node));
   }
   // Exit if one of the access group node lookups failed.
   if (llvm::is_contained(accessGroups, nullptr))
     return failure();
   return accessGroups;
 }

mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.h

 namespace LLVM {
 namespace detail {
 
 /// A helper class that converts LoopAnnotationAttrs and AccessGroupMetadataOps
 /// into a corresponding llvm::MDNodes.
 class LoopAnnotationTranslation {
 public:
   LoopAnnotationTranslation(ModuleTranslation &moduleTranslation,
-                            Operation *mlirModule, llvm::Module &llvmModule)
-      : moduleTranslation(moduleTranslation), mlirModule(mlirModule),
-        llvmModule(llvmModule) {}
+                            llvm::Module &llvmModule)
+      : moduleTranslation(moduleTranslation), llvmModule(llvmModule) {}
 
   llvm::MDNode *translateLoopAnnotation(LoopAnnotationAttr attr, Operation *op);
 
-  /// Traverses the global access group metadata operation in the `mlirModule`
-  /// and creates corresponding LLVM metadata nodes.
-  LogicalResult createAccessGroupMetadata();
-
-  /// Returns the LLVM metadata corresponding to a symbol reference to an mlir
-  /// LLVM dialect access group operation.
-  llvm::MDNode *getAccessGroup(Operation *op,
-                               SymbolRefAttr accessGroupRef) const;
+  /// Returns the LLVM metadata corresponding to an mlir LLVM dialect access
+  /// group attribute.
+  llvm::MDNode *getAccessGroup(AccessGroupAttr accessGroupAttr);
 
-  /// Returns the LLVM metadata corresponding to the access group operations
+  /// Returns the LLVM metadata corresponding to the access group attribute
   /// referenced by the AccessGroupOpInterface or null if there are none.
-  llvm::MDNode *getAccessGroups(AccessGroupOpInterface op) const;
+  llvm::MDNode *getAccessGroups(AccessGroupOpInterface op);
 
   /// The ModuleTranslation owning this instance.
   ModuleTranslation &moduleTranslation;
 
 private:
   /// Returns the LLVM metadata corresponding to a llvm loop metadata attribute.
   llvm::MDNode *lookupLoopMetadata(Attribute options) const {
     return loopMetadataMapping.lookup(options);
   }
 
   void mapLoopMetadata(Attribute options, llvm::MDNode *metadata) {
     auto result = loopMetadataMapping.try_emplace(options, metadata);
     (void)result;
     assert(result.second &&
            "attempting to map loop options that was already mapped");
   }
 
   /// Mapping from an attribute describing loop metadata to its LLVM metadata.
   /// The metadata is attached to Latch block branches with this attribute.
   DenseMap<Attribute, llvm::MDNode *> loopMetadataMapping;
 
-  /// Mapping from an access group metadata operation to its LLVM metadata.
+  /// Mapping from an access group attribute to its LLVM metadata.
   /// This map is populated on module entry and is used to annotate loops (as
   /// identified via their branches) and contained memory accesses.
-  DenseMap<Operation *, llvm::MDNode *> accessGroupMetadataMapping;
+  DenseMap<AccessGroupAttr, llvm::MDNode *> accessGroupMetadataMapping;
 
-  Operation *mlirModule;
   llvm::Module &llvmModule;
 };
 
 } // namespace detail
 } // namespace LLVM
 } // namespace mlir
 
 #endif // MLIR_LIB_TARGET_LLVMIR_LOOPANNOTATIONTRANSLATION_H_

mlir/lib/Target/LLVMIR/LoopAnnotationTranslation.cpp

if (auto options = attr.getDistribute())
     convertLoopOptions(options);
   if (auto options = attr.getPipeline())
     convertLoopOptions(options);
   if (auto options = attr.getPeeled())
     convertLoopOptions(options);
   if (auto options = attr.getUnswitch())
     convertLoopOptions(options);
 
-  ArrayRef<SymbolRefAttr> parallelAccessGroups = attr.getParallelAccesses();
+  ArrayRef<AccessGroupAttr> parallelAccessGroups = attr.getParallelAccesses();
   if (!parallelAccessGroups.empty()) {
     SmallVector<llvm::Metadata *> parallelAccess;
     parallelAccess.push_back(
         llvm::MDString::get(ctx, "llvm.loop.parallel_accesses"));
-    for (SymbolRefAttr accessGroupRef : parallelAccessGroups)
+    for (AccessGroupAttr accessGroupAttr : parallelAccessGroups)
       parallelAccess.push_back(
-          loopAnnotationTranslation.getAccessGroup(op, accessGroupRef));
+          loopAnnotationTranslation.getAccessGroup(accessGroupAttr));
     metadataNodes.push_back(llvm::MDNode::get(ctx, parallelAccess));
   }
 
   // Create loop options and set the first operand to itself.
   llvm::MDNode *loopMD = llvm::MDNode::get(ctx, metadataNodes);
   loopMD->replaceOperandWith(0, loopMD);
 
   return loopMD;
loopMD =
       LoopAnnotationConversion(attr, op, *this, this->llvmModule.getContext())
           .convert();
   // Store a map from this Attribute to the LLVM metadata in case we
   // encounter it again.
   mapLoopMetadata(attr, loopMD);
   return loopMD;
 }
 
-LogicalResult LoopAnnotationTranslation::createAccessGroupMetadata() {
-  mlirModule->walk([&](LLVM::MetadataOp metadatas) {
-    metadatas.walk([&](LLVM::AccessGroupMetadataOp op) {
-      llvm::MDNode *accessGroup =
-          llvm::MDNode::getDistinct(llvmModule.getContext(), {});
-      accessGroupMetadataMapping.insert({op, accessGroup});
-    });
-  });
-  return success();
-}
-
 llvm::MDNode *
-LoopAnnotationTranslation::getAccessGroup(Operation *op,
-                                          SymbolRefAttr accessGroupRef) const {
-  auto metadataName = accessGroupRef.getRootReference();
-  auto accessGroupName = accessGroupRef.getLeafReference();
-  auto metadataOp = SymbolTable::lookupNearestSymbolFrom<LLVM::MetadataOp>(
-      op->getParentOp(), metadataName);
-  auto *accessGroupOp =
-      SymbolTable::lookupNearestSymbolFrom(metadataOp, accessGroupName);
-  return accessGroupMetadataMapping.lookup(accessGroupOp);
+LoopAnnotationTranslation::getAccessGroup(AccessGroupAttr accessGroupAttr) {
+  auto [result, inserted] =
+      accessGroupMetadataMapping.insert({accessGroupAttr, nullptr});
+  if (inserted)
+    result->second = llvm::MDNode::getDistinct(llvmModule.getContext(), {});
+  return result->second;
 }
 
 llvm::MDNode *
-LoopAnnotationTranslation::getAccessGroups(AccessGroupOpInterface op) const {
-  ArrayAttr accessGroupRefs = op.getAccessGroupsOrNull();
-  if (!accessGroupRefs || accessGroupRefs.empty())
+LoopAnnotationTranslation::getAccessGroups(AccessGroupOpInterface op) {
+  ArrayAttr accessGroups = op.getAccessGroupsOrNull();
+  if (!accessGroups || accessGroups.empty())
     return nullptr;
 
   SmallVector<llvm::Metadata *> groupMDs;
-  for (SymbolRefAttr groupRef : accessGroupRefs.getAsRange<SymbolRefAttr>())
-    groupMDs.push_back(getAccessGroup(op, groupRef));
+  for (AccessGroupAttr group : accessGroups.getAsRange<AccessGroupAttr>())
+    groupMDs.push_back(getAccessGroup(group));
   if (groupMDs.size() == 1)
     return llvm::cast<llvm::MDNode>(groupMDs.front());
   return llvm::MDNode::get(llvmModule.getContext(), groupMDs);
 }

mlir/lib/Target/LLVMIR/ModuleImport.cpp

LogicalResult ModuleImport::processTBAAMetadata(const llvm::MDNode *node) {
   }
 
   return success();
 }
 
 LogicalResult
 ModuleImport::processAccessGroupMetadata(const llvm::MDNode *node) {
   Location loc = mlirModule.getLoc();
-  if (failed(loopAnnotationImporter->translateAccessGroup(
-          node, loc, getGlobalMetadataOp())))
+  if (failed(loopAnnotationImporter->translateAccessGroup(node, loc)))
     return emitError(loc) << "unsupported access group node: "
                           << diagMD(node, llvmModule.get());
   return success();
 }
 
 LogicalResult
 ModuleImport::processAliasScopeMetadata(const llvm::MDNode *node) {
   Location loc = mlirModule.getLoc();
if (Operation *op = lookupOperation(&inst)) {
         Location loc = debugImporter->translateLoc(inst.getDebugLoc());
         emitWarning(loc) << "dropped instruction: " << diag(inst);
       }
     }
   }
   return success();
 }
 
-FailureOr<SmallVector<SymbolRefAttr>>
+FailureOr<SmallVector<AccessGroupAttr>>
 ModuleImport::lookupAccessGroupAttrs(const llvm::MDNode *node) const {
   return loopAnnotationImporter->lookupAccessGroupAttrs(node);
 }
 
 LoopAnnotationAttr
 ModuleImport::translateLoopAnnotationAttr(const llvm::MDNode *node,
                                           Location loc) const {
   return loopAnnotationImporter->translateLoopAnnotation(node, loc);

mlir/lib/Target/LLVMIR/ModuleTranslation.cpp

 }
 
 ModuleTranslation::ModuleTranslation(Operation *module,
                                      std::unique_ptr<llvm::Module> llvmModule)
     : mlirModule(module), llvmModule(std::move(llvmModule)),
       debugTranslation(
           std::make_unique<DebugTranslation>(module, *this->llvmModule)),
       loopAnnotationTranslation(std::make_unique<LoopAnnotationTranslation>(
-          *this, module, *this->llvmModule)),
+          *this, *this->llvmModule)),
       typeTranslator(this->llvmModule->getContext()),
       iface(module->getContext()) {
   assert(satisfiesLLVMModule(mlirModule) &&
          "mlirModule should honor LLVM's module semantics.");
 }
 
 ModuleTranslation::~ModuleTranslation() {
   if (ompBuilder)
for (auto selectorOp : comdatOp.getOps<ComdatSelectorOp>()) {
       llvm::Comdat *comdat = module->getOrInsertComdat(selectorOp.getSymName());
       comdat->setSelectionKind(convertComdatToLLVM(selectorOp.getComdat()));
       comdatMapping.try_emplace(selectorOp, comdat);
     }
   }
   return success();
 }
 
-LogicalResult ModuleTranslation::createAccessGroupMetadata() {
-  return loopAnnotationTranslation->createAccessGroupMetadata();
-}
-
 void ModuleTranslation::setAccessGroupsMetadata(AccessGroupOpInterface op,
                                                 llvm::Instruction *inst) {
   if (llvm::MDNode *node = loopAnnotationTranslation->getAccessGroups(op))
     inst->setMetadata(llvm::LLVMContext::MD_access_group, node);
 }
 
 LogicalResult ModuleTranslation::createAliasScopeMetadata() {
   DenseMap<Attribute, llvm::MDNode *> aliasScopeDomainMetadataMapping;
mlir::translateModuleToLLVMIR(Operation *module, llvm::LLVMContext &llvmContext,
 
   ModuleTranslation translator(module, std::move(llvmModule));
   if (failed(translator.convertComdats()))
     return nullptr;
   if (failed(translator.convertFunctionSignatures()))
     return nullptr;
   if (failed(translator.convertGlobals()))
     return nullptr;
-  if (failed(translator.createAccessGroupMetadata()))
-    return nullptr;
   if (failed(translator.createAliasScopeMetadata()))
     return nullptr;
   if (failed(translator.createTBAAMetadata()))
     return nullptr;
   if (failed(translator.convertFunctions()))
     return nullptr;
 
   // Convert other top-level operations if possible.

mlir/test/Dialect/LLVMIR/inlining.mlir

 // CHECK: llvm.intr.stackrestore %[[STACK]]
 func.func @test_inline(%ptr : !llvm.ptr) -> i32 {
   %0 = call @inner_func_inlinable(%ptr) : (!llvm.ptr) -> i32
   return %0 : i32
 }
 
 // -----
 
-llvm.metadata @metadata {
-  llvm.access_group @group
-  llvm.return
-}
+#group = #llvm.access_group<id = distinct[0]<>>
 
 llvm.func @inlinee(%ptr : !llvm.ptr) -> i32 {
-  %0 = llvm.load %ptr { access_groups = [@metadata::@group] } : !llvm.ptr -> i32
+  %0 = llvm.load %ptr { access_groups = [#group] } : !llvm.ptr -> i32
   llvm.return %0 : i32
 }
 
 // CHECK-LABEL: func @test_not_inline
 llvm.func @test_not_inline(%ptr : !llvm.ptr) -> i32 {
   // CHECK-NEXT: llvm.call @inlinee
   %0 = llvm.call @inlinee(%ptr) : (!llvm.ptr) -> (i32)
   llvm.return %0 : i32
 }
 
 // -----
 
-llvm.metadata @metadata {
-  llvm.access_group @group
-  llvm.return
-}
+#group = #llvm.access_group<id = distinct[0]<>>
 
 func.func private @with_mem_attr(%ptr : !llvm.ptr) {
   %0 = llvm.mlir.constant(42 : i32) : i32
   // Do not inline load/store operations that carry attributes requiring
   // handling while inlining, until this is supported by the inliner.
-  llvm.store %0, %ptr { access_groups = [@metadata::@group] }: i32, !llvm.ptr
+  llvm.store %0, %ptr { access_groups = [#group] }: i32, !llvm.ptr
   return
 }
 
 // CHECK-LABEL: func.func @test_not_inline
 // CHECK-NEXT: call @with_mem_attr
 // CHECK-NEXT: return
 func.func @test_not_inline(%ptr : !llvm.ptr) {
   call @with_mem_attr(%ptr) : (!llvm.ptr) -> ()

mlir/test/Dialect/LLVMIR/invalid.mlir

 // -----
 
 // expected-error@below {{expected array type for 'appending' linkage}}
 llvm.mlir.global appending @non_array_type_global_appending_linkage() : i32
 
 // -----
 
 module {
-  llvm.func @loopOptions() {
-      // expected-error@below {{expected '@func1' to reference a metadata op}}
-      llvm.br ^bb4 {loop_annotation = #llvm.loop_annotation<parallelAccesses = @func1>}
-    ^bb4:
-      llvm.return
-  }
-  llvm.func @func1() {
-    llvm.return
-  }
-}
-
-// -----
-
-module {
-  llvm.func @loopOptions() {
-      // expected-error@below {{expected '@metadata' to reference an access_group op}}
-      llvm.br ^bb4 {loop_annotation = #llvm.loop_annotation<parallelAccesses = @metadata>}
-    ^bb4:
-      llvm.return
-  }
-  llvm.metadata @metadata {
-  }
-}
-
-// -----
-
-module {
   llvm.func @accessGroups(%arg0 : !llvm.ptr) {
-      // expected-error@below {{expected '@func1' to specify a fully qualified reference}}
+      // expected-error@below {{attribute 'access_groups' failed to satisfy constraint: LLVM dialect access group metadata array}}
       %0 = llvm.load %arg0 { "access_groups" = [@func1] } : !llvm.ptr -> i32
       llvm.return
   }
   llvm.func @func1() {
     llvm.return
   }
 }
 
 // -----
 
 module {
-  llvm.func @accessGroups(%arg0 : i32, %arg1 : !llvm.ptr) {
-      // expected-error@below {{expected '@accessGroups::@group1' to reference a metadata op}}
-      llvm.store %arg0, %arg1 { "access_groups" = [@accessGroups::@group1] } : i32, !llvm.ptr
-      llvm.return
-  }
-  llvm.metadata @metadata {
-  }
-}
-
-// -----
-
-module {
-  llvm.func @accessGroups(%arg0 : !llvm.ptr, %arg1 : f32) {
-      // expected-error@below {{expected '@metadata::@group1' to be a valid reference}}
-      %0 = llvm.atomicrmw fadd %arg0, %arg1 monotonic { "access_groups" = [@metadata::@group1] } : !llvm.ptr, f32
-      llvm.return
-  }
-  llvm.metadata @metadata {
-  }
-}
-
-// -----
-
-module {
   llvm.func @accessGroups(%arg0 : !llvm.ptr, %arg1 : i32, %arg2 : i32) {
-      // expected-error@below {{expected '@metadata::@scope' to resolve to a llvm.access_group}}
+      // expected-error@below {{attribute 'access_groups' failed to satisfy constraint: LLVM dialect access group metadata array}}
       %0 = llvm.cmpxchg %arg0, %arg1, %arg2 acq_rel monotonic { "access_groups" = [@metadata::@scope] } : !llvm.ptr, i32
       llvm.return
   }
   llvm.metadata @metadata {
     llvm.func @scope()
   }
 }
 

mlir/test/Dialect/LLVMIR/loop-metadata.mlir

 #pipeline = #llvm.loop_pipeline<disable = true, initiationinterval = 1 : i32>
 
 // CHECK-DAG: #[[PEELED:.*]] = #llvm.loop_peeled<count = 8 : i32>
 #peeled = #llvm.loop_peeled<count = 8 : i32>
 
 // CHECK-DAG: #[[UNSWITCH:.*]] = #llvm.loop_unswitch<partialDisable = true>
 #unswitch = #llvm.loop_unswitch<partialDisable = true>
 
+// CHECK-DAG: #[[GROUP1:.*]] = #llvm.access_group<id = {{.*}}>
+// CHECK-DAG: #[[GROUP2:.*]] = #llvm.access_group<id = {{.*}}>
+#group1 = #llvm.access_group<id = distinct[0]<>>
+#group2 = #llvm.access_group<id = distinct[1]<>>
+
 // CHECK: #[[LOOP_ANNOT:.*]] = #llvm.loop_annotation<
 // CHECK-DAG: disableNonforced = false
 // CHECK-DAG: mustProgress = true
 // CHECK-DAG: unroll = #[[UNROLL]]
 // CHECK-DAG: unrollAndJam = #[[UNROLL_AND_JAM]]
 // CHECK-DAG: licm = #[[LICM]]
 // CHECK-DAG: distribute = #[[DISTRIBUTE]]
 // CHECK-DAG: pipeline = #[[PIPELINE]]
 // CHECK-DAG: peeled = #[[PEELED]]
 // CHECK-DAG: unswitch = #[[UNSWITCH]]
 // CHECK-DAG: isVectorized = false
-// CHECK-DAG: parallelAccesses = @metadata::@group1, @metadata::@group2>
+// CHECK-DAG: parallelAccesses = #[[GROUP1]], #[[GROUP2]]>
 #loopMD = #llvm.loop_annotation<disableNonforced = false,
         mustProgress = true,
         vectorize = #vectorize,
         interleave = #interleave,
         unroll = #unroll,
         unrollAndJam = #unrollAndJam,
         licm = #licm,
         distribute = #distribute,
         pipeline = #pipeline,
         peeled = #peeled,
         unswitch = #unswitch,
         isVectorized = false,
-        parallelAccesses = @metadata::@group1, @metadata::@group2>
+        parallelAccesses = #group1, #group2>
 
 // CHECK: llvm.func @loop_annotation
 llvm.func @loop_annotation() {
   // CHECK: llvm.br ^bb1 {llvm.loop = #[[LOOP_ANNOT]]
   llvm.br ^bb1 {llvm.loop = #loopMD}
 ^bb1:
   llvm.return
 }
 
-llvm.metadata @metadata {
-  llvm.access_group @group1
-  llvm.access_group @group2
-}
-
 // -----
 
 #di_file = #llvm.di_file<"metadata-loop.ll" in "/">
 
 // CHECK: #[[START_LOC:.*]] = loc("loop-metadata.mlir":42:4)
 #loc1 = loc("loop-metadata.mlir":42:4)
 // CHECK: #[[END_LOC:.*]] = loc("loop-metadata.mlir":52:4)
 #loc2 = loc("loop-metadata.mlir":52:4)

mlir/test/Dialect/LLVMIR/tbaa-invalid.mlir

 module {
   llvm.func @tbaa(%arg0: !llvm.ptr) {
     %0 = llvm.mlir.constant(1 : i8) : i8
     // expected-error@below {{expected '@metadata::@group1' to resolve to a llvm.tbaa_tag}}
     llvm.store %0, %arg0 {tbaa = [@metadata::@group1]} : i8, !llvm.ptr
     llvm.return
   }
   llvm.metadata @metadata {
-    llvm.access_group @group1
+    llvm.func @group1()
   }
 }
 
 // -----
 
 module {
   llvm.func @tbaa(%arg0: !llvm.ptr) {
     %0 = llvm.mlir.constant(1 : i8) : i8

mlir/test/Target/LLVMIR/Import/metadata-loop.ll

 ; RUN: mlir-translate -import-llvm -split-input-file %s | FileCheck %s
 
-; CHECK: llvm.metadata @__llvm_global_metadata {
-; CHECK:   llvm.access_group @[[$GROUP0:.*]]
-; CHECK:   llvm.access_group @[[$GROUP1:.*]]
-; CHECK:   llvm.access_group @[[$GROUP2:.*]]
-; CHECK:   llvm.access_group @[[$GROUP3:.*]]
-; CHECK: }
+; CHECK-DAG: #[[$GROUP0:.*]] = #llvm.access_group<id = {{.*}}>
+; CHECK-DAG: #[[$GROUP1:.*]] = #llvm.access_group<id = {{.*}}>
+; CHECK-DAG: #[[$GROUP2:.*]] = #llvm.access_group<id = {{.*}}>
+; CHECK-DAG: #[[$GROUP3:.*]] = #llvm.access_group<id = {{.*}}>
 
 ; CHECK-LABEL: llvm.func @access_group
 define void @access_group(ptr %arg1) {
-  ; CHECK:  access_groups = [@__llvm_global_metadata::@[[$GROUP0]], @__llvm_global_metadata::@[[$GROUP1]]]
+  ; CHECK:  access_groups = [#[[$GROUP0]], #[[$GROUP1]]]
   %1 = load i32, ptr %arg1, !llvm.access.group !0
-  ; CHECK:  access_groups = [@__llvm_global_metadata::@[[$GROUP2]], @__llvm_global_metadata::@[[$GROUP0]]]
+  ; CHECK:  access_groups = [#[[$GROUP2]], #[[$GROUP0]]]
   %2 = load i32, ptr %arg1, !llvm.access.group !1
-  ; CHECK:  access_groups = [@__llvm_global_metadata::@[[$GROUP3]]]
+  ; CHECK:  access_groups = [#[[$GROUP3]]]
   %3 = load i32, ptr %arg1, !llvm.access.group !2
   ret void
 }
 
 !0 = !{!3, !4}
 !1 = !{!5, !3}
 !2 = distinct !{}
 !3 = distinct !{}
end:
   ret void
 }
 
 !1 = distinct !{!1, !2}
 !2 = !{!"llvm.loop.unswitch.partial.disable"}
 
 ; // -----
 
-; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<parallelAccesses = @__llvm_global_metadata::@[[GROUP0:.*]]>
-
-; CHECK: llvm.metadata @__llvm_global_metadata {
-; CHECK:   llvm.access_group @[[GROUP0]]
+; CHECK: #[[GROUP0:.*]] = #llvm.access_group<id = {{.*}}>
+; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<parallelAccesses = #[[GROUP0]]>
 
 ; CHECK-LABEL: @parallel_accesses
 define void @parallel_accesses(ptr %arg) {
 entry:
   %0 = load i32, ptr %arg, !llvm.access.group !0
 ; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
   br label %end, !llvm.loop !1
 end:
   ret void
 }
 
 !0 = distinct !{}
 !1 = distinct !{!1, !2}
 !2 = !{!"llvm.loop.parallel_accesses", !0}
 
 ; // -----
 
-; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<parallelAccesses = @__llvm_global_metadata::@[[GROUP0:.*]], @__llvm_global_metadata::@[[GROUP1:.*]]>
-
-; CHECK: llvm.metadata @__llvm_global_metadata {
-; CHECK:   llvm.access_group @[[GROUP0]]
-; CHECK:   llvm.access_group @[[GROUP1]]
+; CHECK: #[[GROUP0:.*]] = #llvm.access_group<id = {{.*}}>
+; CHECK: #[[GROUP1:.*]] = #llvm.access_group<id = {{.*}}>
+; CHECK: #[[$ANNOT_ATTR:.*]] = #llvm.loop_annotation<parallelAccesses = #[[GROUP0]], #[[GROUP1]]>
 
 ; CHECK-LABEL: @multiple_parallel_accesses
 define void @multiple_parallel_accesses(ptr %arg) {
 entry:
   %0 = load i32, ptr %arg, !llvm.access.group !0
   %1 = load i32, ptr %arg, !llvm.access.group !3
 ; CHECK: llvm.br ^{{.*}} {loop_annotation = #[[$ANNOT_ATTR]]}
   br label %end, !llvm.loop !1
 end:
   ret void
 }
 
 !0 = distinct !{}
 !1 = distinct !{!1, !2}
 !2 = !{!"llvm.loop.parallel_accesses", !0, !3}
 !3 = distinct !{}
 
 ; // -----
 
 ; Verify the unused access group is not imported.
-; CHECK:   llvm.metadata @__llvm_global_metadata {
-; CHECK-COUNT1: llvm.access_group
+; CHECK-COUNT1: #llvm.access_group
 
 ; CHECK-LABEL: @unused_parallel_access
 define void @unused_parallel_access(ptr %arg) {
 entry:
   %0 = load i32, ptr %arg, !llvm.access.group !0
   br label %end, !llvm.loop !1
 end:
   ret void

mlir/test/Target/LLVMIR/loop-metadata.mlir

 
 // CHECK: ![[LOOP_NODE]] = distinct !{![[LOOP_NODE]], !{{[0-9]+}}}
 // CHECK-DAG: ![[VEC_NODE0:[0-9]+]] = !{!"llvm.loop.unswitch.partial.disable"}
 
 // -----
 
 llvm.func @foo(%arg0: i32)
 
+#group1 = #llvm.access_group<id = distinct[0]<>>
+#group2 = #llvm.access_group<id = distinct[1]<>>
+
 // CHECK-LABEL: @loopOptions
 llvm.func @loopOptions(%arg1 : i32, %arg2 : i32) {
     %0 = llvm.mlir.constant(0 : i32) : i32
     %4 = llvm.alloca %arg1 x i32 : (i32) -> (!llvm.ptr)
     llvm.br ^bb3(%0 : i32)
   ^bb3(%1: i32):
     %2 = llvm.icmp "slt" %1, %arg1 : i32
     // CHECK: br i1 {{.*}} !llvm.loop ![[LOOP_NODE:[0-9]+]]
     llvm.cond_br %2, ^bb4, ^bb5 {loop_annotation = #llvm.loop_annotation<
           licm = <disable = true>,
           interleave = <count = 1>,
           unroll = <disable = true>, pipeline = <disable = true, initiationinterval = 2>,
-          parallelAccesses = @metadata::@group1, @metadata::@group2>}
+          parallelAccesses = #group1, #group2>}
   ^bb4:
     %3 = llvm.add %1, %arg2  : i32
     // CHECK: = load i32, ptr %{{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE:[0-9]+]]
-    %5 = llvm.load %4 {access_groups = [@metadata::@group1, @metadata::@group2]} : !llvm.ptr -> i32
+    %5 = llvm.load %4 {access_groups = [#group1, #group2]} : !llvm.ptr -> i32
     // CHECK: store i32 %{{.*}}, ptr %{{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE]]
-    llvm.store %5, %4 {access_groups = [@metadata::@group1, @metadata::@group2]} : i32, !llvm.ptr
+    llvm.store %5, %4 {access_groups = [#group1, #group2]} : i32, !llvm.ptr
     // CHECK: = atomicrmw add ptr %{{.*}}, i32 %{{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE]]
-    %6 = llvm.atomicrmw add %4, %5 monotonic {access_groups = [@metadata::@group1, @metadata::@group2]} : !llvm.ptr, i32
+    %6 = llvm.atomicrmw add %4, %5 monotonic {access_groups = [#group1, #group2]} : !llvm.ptr, i32
     // CHECK: = cmpxchg ptr %{{.*}}, i32 %{{.*}}, i32 %{{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE]]
-    %7 = llvm.cmpxchg %4, %5, %6 acq_rel monotonic {access_groups = [@metadata::@group1, @metadata::@group2]} : !llvm.ptr, i32
+    %7 = llvm.cmpxchg %4, %5, %6 acq_rel monotonic {access_groups = [#group1, #group2]} : !llvm.ptr, i32
     %9 = llvm.mlir.constant(42 : i8) : i8
     // CHECK: llvm.memcpy{{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE]]
-    "llvm.intr.memcpy"(%4, %4, %0) <{isVolatile = false}> {access_groups = [@metadata::@group1, @metadata::@group2]} : (!llvm.ptr, !llvm.ptr, i32) -> ()
+    "llvm.intr.memcpy"(%4, %4, %0) <{isVolatile = false}> {access_groups = [#group1, #group2]} : (!llvm.ptr, !llvm.ptr, i32) -> ()
     // CHECK: llvm.memset{{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE]]
-    "llvm.intr.memset"(%4, %9, %0) <{isVolatile = false}> {access_groups = [@metadata::@group1, @metadata::@group2]} : (!llvm.ptr, i8, i32) -> ()
+    "llvm.intr.memset"(%4, %9, %0) <{isVolatile = false}> {access_groups = [#group1, #group2]} : (!llvm.ptr, i8, i32) -> ()
     // CHECK: call void @foo({{.*}} !llvm.access.group ![[ACCESS_GROUPS_NODE]]
-    llvm.call @foo(%arg1) {access_groups = [@metadata::@group1, @metadata::@group2]} : (i32) -> ()
+    llvm.call @foo(%arg1) {access_groups = [#group1, #group2]} : (i32) -> ()
     // CHECK: br label {{.*}} !llvm.loop ![[LOOP_NODE]]
     llvm.br ^bb3(%3 : i32) {loop_annotation = #llvm.loop_annotation<
           licm = <disable = true>,
           interleave = <count = 1>,
           unroll = <disable = true>, pipeline = <disable = true, initiationinterval = 2>,
-          parallelAccesses = @metadata::@group1, @metadata::@group2>}
+          parallelAccesses = #group1, #group2>}
 
   ^bb5:
     llvm.return
 }
 
-llvm.metadata @metadata {
-  llvm.access_group @group1
-  llvm.access_group @group2
-}
-
 // CHECK: ![[LOOP_NODE]] = distinct !{![[LOOP_NODE]], !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
 // CHECK-DAG: ![[PA_NODE:[0-9]+]] = !{!"llvm.loop.parallel_accesses", ![[GROUP_NODE1:[0-9]+]], ![[GROUP_NODE2:[0-9]+]]}
 // CHECK-DAG: ![[GROUP_NODE1:[0-9]+]] = distinct !{}
 // CHECK-DAG: ![[GROUP_NODE2:[0-9]+]] = distinct !{}
 // CHECK-DAG: ![[UNROLL_DISABLE_NODE:[0-9]+]] = !{!"llvm.loop.unroll.disable"}
 // CHECK-DAG: ![[LICM_DISABLE_NODE:[0-9]+]] = !{!"llvm.licm.disable"}
 // CHECK-DAG: ![[INTERLEAVE_NODE:[0-9]+]] = !{!"llvm.loop.interleave.count", i32 1}
 // CHECK-DAG: ![[PIPELINE_DISABLE_NODE:[0-9]+]] = !{!"llvm.loop.pipeline.disable", i1 true}

mlir/test/mlir-tblgen/llvm-intrinsics.td

 // GROUPS: [NoMemoryEffect]
 // It has a result.
 // GROUPS: 1,
 // It implements the access group interface.
 // GROUPS: 1,
 // It does not implement the alias analysis interface.
 // GROUPS: 0>
 // It has an access group attribute.
-// GROUPS: OptionalAttr<SymbolRefArrayAttr>:$access_groups
+// GROUPS: OptionalAttr<LLVM_AccessGroupArrayAttr>:$access_groups
 
 //---------------------------------------------------------------------------//
 
 // This checks that we can define an op that takes in alias analysis metadata.
 //
 // RUN: cat %S/../../../llvm/include/llvm/IR/Intrinsics.td \
 // RUN: | grep -v "llvm/IR/Intrinsics" \
 // RUN: | mlir-tblgen -gen-llvmir-intrinsics -I %S/../../../llvm/include/ --llvmir-intrinsics-filter=ptrmask --llvmir-intrinsics-alias-analysis-regexp=ptrmask \

mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp

if (intr.isCommutative())
     traits.push_back("Commutative");
   if (!intr.hasSideEffects())
     traits.push_back("NoMemoryEffect");
 
   // Prepare strings for operands.
   llvm::SmallVector<llvm::StringRef, 8> operands(intr.getNumOperands(),
                                                  "LLVM_Type");
   if (requiresAccessGroup)
-    operands.push_back("OptionalAttr<SymbolRefArrayAttr>:$access_groups");
+    operands.push_back(
+        "OptionalAttr<LLVM_AccessGroupArrayAttr>:$access_groups");
   if (requiresAliasAnalysis) {
     operands.push_back("OptionalAttr<LLVM_AliasScopeArrayAttr>:$alias_scopes");
     operands.push_back(
         "OptionalAttr<LLVM_AliasScopeArrayAttr>:$noalias_scopes");
     operands.push_back("OptionalAttr<SymbolRefArrayAttr>:$tbaa");
   }
 
   // Emit the definition.