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[RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with other testcases ClosedPublic Authored by Jim on Jul 6 2023, 8:35 PM.
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Event TimelineThis revision is now accepted and ready to land.Jul 6 2023, 8:47 PM This revision was landed with ongoing or failed builds.Jul 6 2023, 10:04 PM Closed by commit rG43927542d836: [RISCV] Rename prefix `fixed-vector` to `fixed-vectors` to be the same with… (authored by Jim). · Explain Why This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 537986 llvm/test/CodeGen/RISCV/rvv/fixed-vector-deinterleave-load.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-fpext-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-fptrunc-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-interleave-store.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-inttoptr-ptrtoint.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-segN-load.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-segN-store.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-extract-subvector.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-reverse.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-transpose.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-vslide1down.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-vslide1up.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-asm.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store-negative.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp-mask.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vector-trunc-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-deinterleave-load.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-inttoptr-ptrtoint.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-load.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-segN-store.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-extract-subvector.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-transpose.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-negative.ll
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store.ll
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