For SHL, the demanded bits are currently improved for the first operand
by also considering second operand. As we use the second operand to
restrict the range for the first operand, we can also use it to restrict
the range of the second operand.
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I don't really get what you're trying to do here, but this looks clearly incorrect to me. Shift operands aren't symmetrical, and the shift amount generally has to be fully demanded.
llvm/test/Analysis/DemandedBits/shl.ll | ||
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7 | This is saying that shift amounts 0x4 and 0xfffffff4 behave the same way in this operation, which is clearly not the case: The latter would return poison. |
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Yeah I realized I was thinking backwards about it. Put up D154717 to handle the motivating issue directly.
This is saying that shift amounts 0x4 and 0xfffffff4 behave the same way in this operation, which is clearly not the case: The latter would return poison.