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Differential D154482

[AMDGPU] Flush vmcnt in preheader for loops with loads
Changes PlannedPublic

Authored by kerbowa on Jul 5 2023, 1:40 AM.

Details

Reviewers
bsaleil
rochauha
foad
nhaehnle
Summary

Expand hoisting waitcnt by flushing vmcnt in the preheader of all loops which use values loaded outside of the loop and contain VMEM loads.

Diff Detail

Event Timeline

kerbowa created this revision.Jul 5 2023, 1:40 AM
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kerbowa requested review of this revision.Jul 5 2023, 1:40 AM
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kerbowa planned changes to this revision.Jul 5 2023, 1:41 AM

This patch is meant to discuss and explore the idea of swapping the default to assume that in the average case, it is profitable to hoist waitcnt to the preheader of loops. It's mutually exclusive with D154480. Needs a round of performance testing to confirm it actually is profitable in the aggregate.

An improvement would probably be needed where there is verification that the waitcnt being hoisted is actually improving the placement of waitcnt in the loop.

E.g. in cases like below, we don't want to do any hoisting.

v0 = load(...)
loop {
  v1 = load(...)
  ...
  use(v1)
  use(v0)
}
Harbormaster completed remote builds in B243152: Diff 537256.Jul 5 2023, 2:50 AM

Revision Contents

Diff 537256

llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Show First 20 Lines • Show All 1,751 Lines • ▼ Show 20 Lines return SIInstrInfo::isVMEM(MI) ||
(SIInstrInfo::isFLAT(MI) && mayAccessVMEMThroughFlat(MI)); (SIInstrInfo::isFLAT(MI) && mayAccessVMEMThroughFlat(MI));
} }
// Return true if it is better to flush the vmcnt counter in the preheader of // Return true if it is better to flush the vmcnt counter in the preheader of
// the given loop. We currently decide to flush in two situations: // the given loop. We currently decide to flush in two situations:
// 1. The loop contains vmem store(s), no vmem load and at least one use of a // 1. The loop contains vmem store(s), no vmem load and at least one use of a
// vgpr containing a value that is loaded outside of the loop. (Only on // vgpr containing a value that is loaded outside of the loop. (Only on
// targets with no vscnt counter). // targets with no vscnt counter).
// 2. The loop contains vmem load(s), but the loaded values are not used in the // 2. The loop contains vmem load(s), and at least one use of a vgpr containing
// loop, and at least one use of a vgpr containing a value that is loaded // a value that is loaded outside of the loop.
// outside of the loop.
bool SIInsertWaitcnts::shouldFlushVmCnt(MachineLoop *ML, bool SIInsertWaitcnts::shouldFlushVmCnt(MachineLoop *ML,
WaitcntBrackets &Brackets) { WaitcntBrackets &Brackets) {
bool HasVMemLoad = false; bool HasVMemLoad = false;
bool HasVMemStore = false; bool HasVMemStore = false;
bool UsesVgprLoadedOutside = false; bool UsesVgprLoadedOutside = false;
DenseSet<Register> VgprUse;
DenseSet<Register> VgprDef;
for (MachineBasicBlock *MBB : ML->blocks()) { for (MachineBasicBlock *MBB : ML->blocks()) {
for (MachineInstr &MI : *MBB) { for (MachineInstr &MI : *MBB) {
if (isVMEMOrFlatVMEM(MI)) { if (isVMEMOrFlatVMEM(MI)) {
if (MI.mayLoad()) if (MI.mayLoad()) {
// Early exit if the loop contains a vmem load and uses a value loaded
// outside the loop.
if (UsesVgprLoadedOutside)
return true;
HasVMemLoad = true; HasVMemLoad = true;
}
if (MI.mayStore()) if (MI.mayStore())
HasVMemStore = true; HasVMemStore = true;
} }
for (unsigned I = 0; I < MI.getNumOperands(); I++) { for (unsigned I = 0; I < MI.getNumOperands(); I++) {
MachineOperand &Op = MI.getOperand(I); MachineOperand &Op = MI.getOperand(I);
if (!Op.isReg() || !TRI->isVectorRegister(*MRI, Op.getReg())) if (!Op.isReg() || !TRI->isVectorRegister(*MRI, Op.getReg()))
continue; continue;
RegInterval Interval = Brackets.getRegInterval(&MI, TII, MRI, TRI, I); RegInterval Interval = Brackets.getRegInterval(&MI, TII, MRI, TRI, I);
// Vgpr use // Vgpr use
if (Op.isUse()) { if (Op.isUse()) {
for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) { for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) {
// If we find a register that is loaded inside the loop, 1. and 2.
// are invalidated and we can exit.
if (VgprDef.contains(RegNo))
return false;
VgprUse.insert(RegNo);
// If at least one of Op's registers is in the score brackets, the // If at least one of Op's registers is in the score brackets, the
// value is likely loaded outside of the loop. // value is likely loaded outside of the loop.
if (Brackets.getRegScore(RegNo, VM_CNT) > Brackets.getScoreLB(VM_CNT)) { if (Brackets.getRegScore(RegNo, VM_CNT) >
Brackets.getScoreLB(VM_CNT)) {
// Early exit if the loop contains a vmem load and uses a value
// loaded outside the loop.
if (HasVMemLoad)
return true;
UsesVgprLoadedOutside = true; UsesVgprLoadedOutside = true;
break; break;
} }
} }
} }
// VMem load vgpr def
else if (isVMEMOrFlatVMEM(MI) && MI.mayLoad() && Op.isDef())
for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) {
// If we find a register that is loaded inside the loop, 1. and 2.
// are invalidated and we can exit.
if (VgprUse.contains(RegNo))
return false;
VgprDef.insert(RegNo);
} }
} }
} }
} return !ST->hasVscnt() && HasVMemStore && !HasVMemLoad &&
if (!ST->hasVscnt() && HasVMemStore && !HasVMemLoad && UsesVgprLoadedOutside) UsesVgprLoadedOutside;
return true;
return HasVMemLoad && UsesVgprLoadedOutside;
} }
bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) { bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
ST = &MF.getSubtarget<GCNSubtarget>(); ST = &MF.getSubtarget<GCNSubtarget>();
TII = ST->getInstrInfo(); TII = ST->getInstrInfo();
TRI = &TII->getRegisterInfo(); TRI = &TII->getRegisterInfo();
MRI = &MF.getRegInfo(); MRI = &MF.getRegInfo();
IV = AMDGPU::getIsaVersion(ST->getCPU()); IV = AMDGPU::getIsaVersion(ST->getCPU());
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llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll

Show First 20 Lines • Show All 1,253 Lines • ▼ Show 20 Lines
} }
define double @global_atomic_fadd_f64_rtn_pat(ptr addrspace(1) %ptr, double %data) #1 { define double @global_atomic_fadd_f64_rtn_pat(ptr addrspace(1) %ptr, double %data) #1 {
; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat: ; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off ; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB44_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB44_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc ; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
} }
define double @global_atomic_fadd_f64_rtn_pat_system(ptr addrspace(1) %ptr, double %data) #1 { define double @global_atomic_fadd_f64_rtn_pat_system(ptr addrspace(1) %ptr, double %data) #1 {
; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat_system: ; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat_system:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off ; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB46_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB46_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc ; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat(ptr %ptr) #1 { define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat: ; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: s_mov_b64 s[2:3], 0 ; GFX90A-NEXT: s_mov_b64 s[2:3], 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB50_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB50_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0 ; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_system(ptr %ptr) #1 { define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_system(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_system: ; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_system:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: s_mov_b64 s[2:3], 0 ; GFX90A-NEXT: s_mov_b64 s[2:3], 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB52_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB52_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0 ; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
Show All 24 Lines
} }
define double @flat_atomic_fadd_f64_rtn_pat(ptr %ptr) #1 { define double @flat_atomic_fadd_f64_rtn_pat(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat: ; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB53_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB53_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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} }
define double @flat_atomic_fadd_f64_rtn_pat_system(ptr %ptr) #1 { define double @flat_atomic_fadd_f64_rtn_pat_system(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat_system: ; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat_system:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB55_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB55_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_agent_safe(ptr %ptr) { define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_agent_safe(ptr %ptr) {
; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_agent_safe: ; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_agent_safe:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: s_mov_b64 s[2:3], 0 ; GFX90A-NEXT: s_mov_b64 s[2:3], 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB58_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB58_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0 ; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
; GFX90A-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3] ; GFX90A-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX90A-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GFX90A-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
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llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX908 %s ; RUN: llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX908 %s
; RUN: llc -march=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefix=GFX90A %s ; RUN: llc -march=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefix=GFX90A %s
; RUN: llc -march=amdgcn -mcpu=gfx940 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX940 %s ; RUN: llc -march=amdgcn -mcpu=gfx940 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX940 %s
; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX1100 %s ; RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX1100 %s
define float @syncscope_system(ptr %addr, float %val) #0 { define float @syncscope_system(ptr %addr, float %val) #0 {
; GFX908-LABEL: syncscope_system: ; GFX908-LABEL: syncscope_system:
; GFX908: ; %bb.0: ; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: flat_load_dword v3, v[0:1] ; GFX908-NEXT: flat_load_dword v3, v[0:1]
; GFX908-NEXT: s_mov_b64 s[4:5], 0 ; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: s_waitcnt vmcnt(0)
; GFX908-NEXT: .LBB0_1: ; %atomicrmw.start ; GFX908-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt lgkmcnt(0)
; GFX908-NEXT: v_mov_b32_e32 v4, v3 ; GFX908-NEXT: v_mov_b32_e32 v4, v3
; GFX908-NEXT: v_add_f32_e32 v3, v4, v2 ; GFX908-NEXT: v_add_f32_e32 v3, v4, v2
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX908-NEXT: flat_atomic_cmpswap v3, v[0:1], v[3:4] glc ; GFX908-NEXT: flat_atomic_cmpswap v3, v[0:1], v[3:4] glc
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX908-NEXT: buffer_wbinvl1_vol ; GFX908-NEXT: buffer_wbinvl1_vol
; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4 ; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5] ; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5] ; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB0_1 ; GFX908-NEXT: s_cbranch_execnz .LBB0_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX908-NEXT: v_mov_b32_e32 v0, v3 ; GFX908-NEXT: v_mov_b32_e32 v0, v3
; GFX908-NEXT: s_setpc_b64 s[30:31] ; GFX908-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX90A-LABEL: syncscope_system: ; GFX90A-LABEL: syncscope_system:
; GFX90A: ; %bb.0: ; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_load_dword v3, v[0:1] ; GFX90A-NEXT: flat_load_dword v3, v[0:1]
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB0_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_mov_b32_e32 v5, v3 ; GFX90A-NEXT: v_mov_b32_e32 v5, v3
; GFX90A-NEXT: v_add_f32_e32 v4, v5, v2 ; GFX90A-NEXT: v_add_f32_e32 v4, v5, v2
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap v3, v[0:1], v[4:5] glc ; GFX90A-NEXT: flat_atomic_cmpswap v3, v[0:1], v[4:5] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
Show All 17 Lines
; GFX940-NEXT: s_setpc_b64 s[30:31] ; GFX940-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX1100-LABEL: syncscope_system: ; GFX1100-LABEL: syncscope_system:
; GFX1100: ; %bb.0: ; GFX1100: ; %bb.0:
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0
; GFX1100-NEXT: flat_load_b32 v3, v[0:1] ; GFX1100-NEXT: flat_load_b32 v3, v[0:1]
; GFX1100-NEXT: s_mov_b32 s0, 0 ; GFX1100-NEXT: s_mov_b32 s0, 0
; GFX1100-NEXT: s_waitcnt vmcnt(0)
; GFX1100-NEXT: .LBB0_1: ; %atomicrmw.start ; GFX1100-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-NEXT: v_mov_b32_e32 v4, v3 ; GFX1100-NEXT: v_mov_b32_e32 v4, v3
; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-NEXT: v_add_f32_e32 v3, v4, v2 ; GFX1100-NEXT: v_add_f32_e32 v3, v4, v2
; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0
; GFX1100-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] glc ; GFX1100-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] glc
; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX1100-NEXT: buffer_gl0_inv ; GFX1100-NEXT: buffer_gl0_inv
Show All 12 Lines
} }
define float @syncscope_workgroup_rtn(ptr %addr, float %val) #0 { define float @syncscope_workgroup_rtn(ptr %addr, float %val) #0 {
; GFX908-LABEL: syncscope_workgroup_rtn: ; GFX908-LABEL: syncscope_workgroup_rtn:
; GFX908: ; %bb.0: ; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: flat_load_dword v3, v[0:1] ; GFX908-NEXT: flat_load_dword v3, v[0:1]
; GFX908-NEXT: s_mov_b64 s[4:5], 0 ; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: s_waitcnt vmcnt(0)
; GFX908-NEXT: .LBB1_1: ; %atomicrmw.start ; GFX908-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt lgkmcnt(0)
; GFX908-NEXT: v_mov_b32_e32 v4, v3 ; GFX908-NEXT: v_mov_b32_e32 v4, v3
; GFX908-NEXT: v_add_f32_e32 v3, v4, v2 ; GFX908-NEXT: v_add_f32_e32 v3, v4, v2
; GFX908-NEXT: s_waitcnt lgkmcnt(0) ; GFX908-NEXT: s_waitcnt lgkmcnt(0)
; GFX908-NEXT: flat_atomic_cmpswap v3, v[0:1], v[3:4] glc ; GFX908-NEXT: flat_atomic_cmpswap v3, v[0:1], v[3:4] glc
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4 ; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5] ; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5] ; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
▲ Show 20 Lines • Show All 198 Lines • ▼ Show 20 Lines
} }
define float @no_unsafe(ptr %addr, float %val) { define float @no_unsafe(ptr %addr, float %val) {
; GFX908-LABEL: no_unsafe: ; GFX908-LABEL: no_unsafe:
; GFX908: ; %bb.0: ; GFX908: ; %bb.0:
; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX908-NEXT: flat_load_dword v3, v[0:1] ; GFX908-NEXT: flat_load_dword v3, v[0:1]
; GFX908-NEXT: s_mov_b64 s[4:5], 0 ; GFX908-NEXT: s_mov_b64 s[4:5], 0
; GFX908-NEXT: s_waitcnt vmcnt(0)
; GFX908-NEXT: .LBB3_1: ; %atomicrmw.start ; GFX908-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX908-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt lgkmcnt(0)
; GFX908-NEXT: v_mov_b32_e32 v4, v3 ; GFX908-NEXT: v_mov_b32_e32 v4, v3
; GFX908-NEXT: v_add_f32_e32 v3, v4, v2 ; GFX908-NEXT: v_add_f32_e32 v3, v4, v2
; GFX908-NEXT: s_waitcnt lgkmcnt(0) ; GFX908-NEXT: s_waitcnt lgkmcnt(0)
; GFX908-NEXT: flat_atomic_cmpswap v3, v[0:1], v[3:4] glc ; GFX908-NEXT: flat_atomic_cmpswap v3, v[0:1], v[3:4] glc
; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX908-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4 ; GFX908-NEXT: v_cmp_eq_u32_e32 vcc, v3, v4
; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5] ; GFX908-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5] ; GFX908-NEXT: s_andn2_b64 exec, exec, s[4:5]
; GFX908-NEXT: s_cbranch_execnz .LBB3_1 ; GFX908-NEXT: s_cbranch_execnz .LBB3_1
; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX908-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX908-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX908-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX908-NEXT: v_mov_b32_e32 v0, v3 ; GFX908-NEXT: v_mov_b32_e32 v0, v3
; GFX908-NEXT: s_setpc_b64 s[30:31] ; GFX908-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX90A-LABEL: no_unsafe: ; GFX90A-LABEL: no_unsafe:
; GFX90A: ; %bb.0: ; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_load_dword v3, v[0:1] ; GFX90A-NEXT: flat_load_dword v3, v[0:1]
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB3_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_mov_b32_e32 v5, v3 ; GFX90A-NEXT: v_mov_b32_e32 v5, v3
; GFX90A-NEXT: v_add_f32_e32 v4, v5, v2 ; GFX90A-NEXT: v_add_f32_e32 v4, v5, v2
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap v3, v[0:1], v[4:5] glc ; GFX90A-NEXT: flat_atomic_cmpswap v3, v[0:1], v[4:5] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 ; GFX90A-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5
; GFX90A-NEXT: s_or_b64 s[4:5], vcc, s[4:5] ; GFX90A-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; GFX90A-NEXT: s_andn2_b64 exec, exec, s[4:5] ; GFX90A-NEXT: s_andn2_b64 exec, exec, s[4:5]
Show All 11 Lines
; GFX940-NEXT: s_setpc_b64 s[30:31] ; GFX940-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX1100-LABEL: no_unsafe: ; GFX1100-LABEL: no_unsafe:
; GFX1100: ; %bb.0: ; GFX1100: ; %bb.0:
; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0
; GFX1100-NEXT: flat_load_b32 v3, v[0:1] ; GFX1100-NEXT: flat_load_b32 v3, v[0:1]
; GFX1100-NEXT: s_mov_b32 s0, 0 ; GFX1100-NEXT: s_mov_b32 s0, 0
; GFX1100-NEXT: s_waitcnt vmcnt(0)
; GFX1100-NEXT: .LBB3_1: ; %atomicrmw.start ; GFX1100-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX1100-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt lgkmcnt(0)
; GFX1100-NEXT: v_mov_b32_e32 v4, v3 ; GFX1100-NEXT: v_mov_b32_e32 v4, v3
; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX1100-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX1100-NEXT: v_add_f32_e32 v3, v4, v2 ; GFX1100-NEXT: v_add_f32_e32 v3, v4, v2
; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX1100-NEXT: s_waitcnt_vscnt null, 0x0
; GFX1100-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] glc ; GFX1100-NEXT: flat_atomic_cmpswap_b32 v3, v[0:1], v[3:4] glc
; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX1100-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX1100-NEXT: buffer_gl0_inv ; GFX1100-NEXT: buffer_gl0_inv
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llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll

Show All 28 Lines
} }
define i32 @atomic_nand_i32_global(ptr addrspace(1) %ptr) nounwind { define i32 @atomic_nand_i32_global(ptr addrspace(1) %ptr) nounwind {
; GCN-LABEL: atomic_nand_i32_global: ; GCN-LABEL: atomic_nand_i32_global:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: global_load_dword v2, v[0:1], off ; GCN-NEXT: global_load_dword v2, v[0:1], off
; GCN-NEXT: s_mov_b64 s[4:5], 0 ; GCN-NEXT: s_mov_b64 s[4:5], 0
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: .LBB1_1: ; %atomicrmw.start ; GCN-NEXT: .LBB1_1: ; %atomicrmw.start
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v3, v2 ; GCN-NEXT: v_mov_b32_e32 v3, v2
; GCN-NEXT: v_not_b32_e32 v2, v3 ; GCN-NEXT: v_not_b32_e32 v2, v3
; GCN-NEXT: v_or_b32_e32 v2, -5, v2 ; GCN-NEXT: v_or_b32_e32 v2, -5, v2
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off glc ; GCN-NEXT: global_atomic_cmpswap v2, v[0:1], v[2:3], off glc
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_wbinvl1_vol ; GCN-NEXT: buffer_wbinvl1_vol
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
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} }
define i32 @atomic_nand_i32_flat(ptr %ptr) nounwind { define i32 @atomic_nand_i32_flat(ptr %ptr) nounwind {
; GCN-LABEL: atomic_nand_i32_flat: ; GCN-LABEL: atomic_nand_i32_flat:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: flat_load_dword v2, v[0:1] ; GCN-NEXT: flat_load_dword v2, v[0:1]
; GCN-NEXT: s_mov_b64 s[4:5], 0 ; GCN-NEXT: s_mov_b64 s[4:5], 0
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: .LBB2_1: ; %atomicrmw.start ; GCN-NEXT: .LBB2_1: ; %atomicrmw.start
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v3, v2 ; GCN-NEXT: v_mov_b32_e32 v3, v2
; GCN-NEXT: v_not_b32_e32 v2, v3 ; GCN-NEXT: v_not_b32_e32 v2, v3
; GCN-NEXT: v_or_b32_e32 v2, -5, v2 ; GCN-NEXT: v_or_b32_e32 v2, -5, v2
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GCN-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN-NEXT: buffer_wbinvl1_vol ; GCN-NEXT: buffer_wbinvl1_vol
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3
Show All 10 Lines

llvm/test/CodeGen/AMDGPU/flat_atomics_i64_min_max_system.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN1 %s ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN1 %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN2 %s ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN2 %s
define amdgpu_kernel void @atomic_max_i64_offset(ptr %out, i64 %in) { define amdgpu_kernel void @atomic_max_i64_offset(ptr %out, i64 %in) {
; GCN1-LABEL: atomic_max_i64_offset: ; GCN1-LABEL: atomic_max_i64_offset:
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB0_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB0_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 14 Lines
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB0_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB0_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s2, s4, 32 ; GCN1-NEXT: s_add_u32 s2, s4, 32
; GCN1-NEXT: s_addc_u32 s3, s5, 0 ; GCN1-NEXT: s_addc_u32 s3, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB1_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB1_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v5, s3 ; GCN1-NEXT: v_mov_b32_e32 v5, s3
; GCN1-NEXT: v_mov_b32_e32 v4, s2 ; GCN1-NEXT: v_mov_b32_e32 v4, s2
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s2, s4, 32 ; GCN2-NEXT: s_add_u32 s2, s4, 32
; GCN2-NEXT: s_addc_u32 s3, s5, 0 ; GCN2-NEXT: s_addc_u32 s3, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB1_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB1_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v5, s3 ; GCN2-NEXT: v_mov_b32_e32 v5, s3
; GCN2-NEXT: v_mov_b32_e32 v4, s2 ; GCN2-NEXT: v_mov_b32_e32 v4, s2
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 29 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB2_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB2_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB2_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB2_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 24 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB3_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB3_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 21 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB3_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB3_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 24 Lines
; GCN1-LABEL: atomic_max_i64: ; GCN1-LABEL: atomic_max_i64:
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB4_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB4_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 12 Lines
; GCN2-LABEL: atomic_max_i64: ; GCN2-LABEL: atomic_max_i64:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB4_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB4_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB5_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB5_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v4, s4 ; GCN1-NEXT: v_mov_b32_e32 v4, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s5 ; GCN1-NEXT: v_mov_b32_e32 v5, s5
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 17 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB5_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB5_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v4, s4 ; GCN2-NEXT: v_mov_b32_e32 v4, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s5 ; GCN2-NEXT: v_mov_b32_e32 v5, s5
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 26 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB6_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB6_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB6_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB6_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB7_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB7_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB7_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB7_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 25 Lines
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB8_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB8_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 14 Lines
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB8_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB8_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s2, s4, 32 ; GCN1-NEXT: s_add_u32 s2, s4, 32
; GCN1-NEXT: s_addc_u32 s3, s5, 0 ; GCN1-NEXT: s_addc_u32 s3, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB9_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB9_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v5, s3 ; GCN1-NEXT: v_mov_b32_e32 v5, s3
; GCN1-NEXT: v_mov_b32_e32 v4, s2 ; GCN1-NEXT: v_mov_b32_e32 v4, s2
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s2, s4, 32 ; GCN2-NEXT: s_add_u32 s2, s4, 32
; GCN2-NEXT: s_addc_u32 s3, s5, 0 ; GCN2-NEXT: s_addc_u32 s3, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB9_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB9_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v5, s3 ; GCN2-NEXT: v_mov_b32_e32 v5, s3
; GCN2-NEXT: v_mov_b32_e32 v4, s2 ; GCN2-NEXT: v_mov_b32_e32 v4, s2
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 29 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB10_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB10_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB10_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB10_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 24 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB11_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB11_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 21 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB11_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB11_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 24 Lines
; GCN1-LABEL: atomic_umax_i64: ; GCN1-LABEL: atomic_umax_i64:
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB12_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB12_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 12 Lines
; GCN2-LABEL: atomic_umax_i64: ; GCN2-LABEL: atomic_umax_i64:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB12_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB12_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB13_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB13_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v4, s4 ; GCN1-NEXT: v_mov_b32_e32 v4, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s5 ; GCN1-NEXT: v_mov_b32_e32 v5, s5
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 17 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB13_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB13_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v4, s4 ; GCN2-NEXT: v_mov_b32_e32 v4, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s5 ; GCN2-NEXT: v_mov_b32_e32 v5, s5
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 26 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB14_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB14_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB14_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB14_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB15_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB15_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB15_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB15_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 25 Lines
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB16_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB16_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 14 Lines
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB16_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB16_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s2, s4, 32 ; GCN1-NEXT: s_add_u32 s2, s4, 32
; GCN1-NEXT: s_addc_u32 s3, s5, 0 ; GCN1-NEXT: s_addc_u32 s3, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB17_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB17_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v5, s3 ; GCN1-NEXT: v_mov_b32_e32 v5, s3
; GCN1-NEXT: v_mov_b32_e32 v4, s2 ; GCN1-NEXT: v_mov_b32_e32 v4, s2
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s2, s4, 32 ; GCN2-NEXT: s_add_u32 s2, s4, 32
; GCN2-NEXT: s_addc_u32 s3, s5, 0 ; GCN2-NEXT: s_addc_u32 s3, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB17_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB17_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v5, s3 ; GCN2-NEXT: v_mov_b32_e32 v5, s3
; GCN2-NEXT: v_mov_b32_e32 v4, s2 ; GCN2-NEXT: v_mov_b32_e32 v4, s2
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 29 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB18_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB18_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB18_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB18_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 24 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB19_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB19_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 21 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB19_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB19_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 24 Lines
; GCN1-LABEL: atomic_min_i64: ; GCN1-LABEL: atomic_min_i64:
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB20_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB20_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 12 Lines
; GCN2-LABEL: atomic_min_i64: ; GCN2-LABEL: atomic_min_i64:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB20_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB20_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB21_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB21_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v4, s4 ; GCN1-NEXT: v_mov_b32_e32 v4, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s5 ; GCN1-NEXT: v_mov_b32_e32 v5, s5
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 17 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB21_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB21_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v4, s4 ; GCN2-NEXT: v_mov_b32_e32 v4, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s5 ; GCN2-NEXT: v_mov_b32_e32 v5, s5
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 26 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB22_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB22_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB22_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB22_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB23_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB23_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB23_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB23_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_ge_i64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 25 Lines
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB24_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB24_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 14 Lines
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB24_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB24_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s2, s4, 32 ; GCN1-NEXT: s_add_u32 s2, s4, 32
; GCN1-NEXT: s_addc_u32 s3, s5, 0 ; GCN1-NEXT: s_addc_u32 s3, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB25_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB25_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v5, s3 ; GCN1-NEXT: v_mov_b32_e32 v5, s3
; GCN1-NEXT: v_mov_b32_e32 v4, s2 ; GCN1-NEXT: v_mov_b32_e32 v4, s2
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s2, s4, 32 ; GCN2-NEXT: s_add_u32 s2, s4, 32
; GCN2-NEXT: s_addc_u32 s3, s5, 0 ; GCN2-NEXT: s_addc_u32 s3, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB25_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB25_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v5, s3 ; GCN2-NEXT: v_mov_b32_e32 v5, s3
; GCN2-NEXT: v_mov_b32_e32 v4, s2 ; GCN2-NEXT: v_mov_b32_e32 v4, s2
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 29 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB26_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB26_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB26_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB26_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 24 Lines
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: s_add_u32 s0, s0, 32 ; GCN1-NEXT: s_add_u32 s0, s0, 32
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB27_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB27_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 21 Lines
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: s_add_u32 s0, s0, 32 ; GCN2-NEXT: s_add_u32 s0, s0, 32
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB27_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB27_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 24 Lines
; GCN1-LABEL: atomic_umin_i64: ; GCN1-LABEL: atomic_umin_i64:
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB28_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB28_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 12 Lines
; GCN2-LABEL: atomic_umin_i64: ; GCN2-LABEL: atomic_umin_i64:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB28_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB28_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 18 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd ; GCN1-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB29_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB29_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s1 ; GCN1-NEXT: v_mov_b32_e32 v0, s1
; GCN1-NEXT: v_mov_b32_e32 v6, s0 ; GCN1-NEXT: v_mov_b32_e32 v6, s0
; GCN1-NEXT: v_mov_b32_e32 v4, s4 ; GCN1-NEXT: v_mov_b32_e32 v4, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s5 ; GCN1-NEXT: v_mov_b32_e32 v5, s5
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 17 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GCN2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB29_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB29_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[0:1], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s1 ; GCN2-NEXT: v_mov_b32_e32 v0, s1
; GCN2-NEXT: v_mov_b32_e32 v6, s0 ; GCN2-NEXT: v_mov_b32_e32 v6, s0
; GCN2-NEXT: v_mov_b32_e32 v4, s4 ; GCN2-NEXT: v_mov_b32_e32 v4, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s5 ; GCN2-NEXT: v_mov_b32_e32 v5, s5
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 26 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN1-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN1-NEXT: s_add_u32 s0, s0, s4 ; GCN1-NEXT: s_add_u32 s0, s0, s4
; GCN1-NEXT: s_addc_u32 s1, s1, s5 ; GCN1-NEXT: s_addc_u32 s1, s1, s5
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN1-NEXT: s_mov_b64 s[4:5], 0 ; GCN1-NEXT: s_mov_b64 s[4:5], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB30_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB30_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s3 ; GCN1-NEXT: v_mov_b32_e32 v0, s3
; GCN1-NEXT: v_mov_b32_e32 v6, s2 ; GCN1-NEXT: v_mov_b32_e32 v6, s2
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3 ; GCN2-NEXT: s_lshl_b64 s[4:5], s[4:5], 3
; GCN2-NEXT: s_add_u32 s0, s0, s4 ; GCN2-NEXT: s_add_u32 s0, s0, s4
; GCN2-NEXT: s_addc_u32 s1, s1, s5 ; GCN2-NEXT: s_addc_u32 s1, s1, s5
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GCN2-NEXT: s_mov_b64 s[4:5], 0 ; GCN2-NEXT: s_mov_b64 s[4:5], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB30_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB30_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[2:3], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s3 ; GCN2-NEXT: v_mov_b32_e32 v0, s3
; GCN2-NEXT: v_mov_b32_e32 v6, s2 ; GCN2-NEXT: v_mov_b32_e32 v6, s2
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v0, v6, v2, vcc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
Show All 21 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN1-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN1-NEXT: s_add_u32 s0, s0, s6 ; GCN1-NEXT: s_add_u32 s0, s0, s6
; GCN1-NEXT: s_addc_u32 s1, s1, s7 ; GCN1-NEXT: s_addc_u32 s1, s1, s7
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN1-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN1-NEXT: s_mov_b64 s[6:7], 0 ; GCN1-NEXT: s_mov_b64 s[6:7], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB31_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB31_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v3, v1 ; GCN1-NEXT: v_mov_b32_e32 v3, v1
; GCN1-NEXT: v_mov_b32_e32 v2, v0 ; GCN1-NEXT: v_mov_b32_e32 v2, v0
; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3] ; GCN1-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3]
; GCN1-NEXT: v_mov_b32_e32 v0, s5 ; GCN1-NEXT: v_mov_b32_e32 v0, s5
; GCN1-NEXT: v_mov_b32_e32 v6, s4 ; GCN1-NEXT: v_mov_b32_e32 v6, s4
; GCN1-NEXT: v_mov_b32_e32 v5, s1 ; GCN1-NEXT: v_mov_b32_e32 v5, s1
; GCN1-NEXT: v_mov_b32_e32 v4, s0 ; GCN1-NEXT: v_mov_b32_e32 v4, s0
; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN1-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 19 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3 ; GCN2-NEXT: s_lshl_b64 s[6:7], s[6:7], 3
; GCN2-NEXT: s_add_u32 s0, s0, s6 ; GCN2-NEXT: s_add_u32 s0, s0, s6
; GCN2-NEXT: s_addc_u32 s1, s1, s7 ; GCN2-NEXT: s_addc_u32 s1, s1, s7
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN2-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN2-NEXT: s_mov_b64 s[6:7], 0 ; GCN2-NEXT: s_mov_b64 s[6:7], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB31_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB31_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v3, v1 ; GCN2-NEXT: v_mov_b32_e32 v3, v1
; GCN2-NEXT: v_mov_b32_e32 v2, v0 ; GCN2-NEXT: v_mov_b32_e32 v2, v0
; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3] ; GCN2-NEXT: v_cmp_ge_u64_e32 vcc, s[4:5], v[2:3]
; GCN2-NEXT: v_mov_b32_e32 v0, s5 ; GCN2-NEXT: v_mov_b32_e32 v0, s5
; GCN2-NEXT: v_mov_b32_e32 v6, s4 ; GCN2-NEXT: v_mov_b32_e32 v6, s4
; GCN2-NEXT: v_mov_b32_e32 v5, s1 ; GCN2-NEXT: v_mov_b32_e32 v5, s1
; GCN2-NEXT: v_mov_b32_e32 v4, s0 ; GCN2-NEXT: v_mov_b32_e32 v4, s0
; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc ; GCN2-NEXT: v_cndmask_b32_e32 v1, v0, v3, vcc
Show All 21 Lines

llvm/test/CodeGen/AMDGPU/flat_atomics_min_max_system.ll

Show All 9 Lines
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s2, 16 ; GCN1-NEXT: s_add_u32 s0, s2, 16
; GCN1-NEXT: s_addc_u32 s1, s3, 0 ; GCN1-NEXT: s_addc_u32 s1, s3, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB0_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB0_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 9 Lines
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s2, 16 ; GCN2-NEXT: s_add_u32 s0, s2, 16
; GCN2-NEXT: s_addc_u32 s1, s3, 0 ; GCN2-NEXT: s_addc_u32 s1, s3, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB0_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB0_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GCN2-NEXT: s_cbranch_execnz .LBB0_1 ; GCN2-NEXT: s_cbranch_execnz .LBB0_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_max_i32_offset: ; GCN3-LABEL: atomic_max_i32_offset:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB0_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB0_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 15 Lines
; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s4, 16 ; GCN1-NEXT: s_add_u32 s0, s4, 16
; GCN1-NEXT: s_addc_u32 s1, s5, 0 ; GCN1-NEXT: s_addc_u32 s1, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB1_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB1_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 14 Lines
; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s4, 16 ; GCN2-NEXT: s_add_u32 s0, s4, 16
; GCN2-NEXT: s_addc_u32 s1, s5, 0 ; GCN2-NEXT: s_addc_u32 s1, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB1_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB1_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB1_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB1_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_max_i32_e32 v0, s2, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 25 Lines
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB2_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB2_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 13 Lines
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB2_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB2_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB2_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB2_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 20 Lines
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB3_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB3_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB3_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB3_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB3_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB3_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 20 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB4_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB4_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v2, s2 ; GCN1-NEXT: v_mov_b32_e32 v2, s2
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v3, s3 ; GCN1-NEXT: v_mov_b32_e32 v3, s3
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN1-NEXT: s_cbranch_execnz .LBB4_1 ; GCN1-NEXT: s_cbranch_execnz .LBB4_1
; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN1-NEXT: s_endpgm ; GCN1-NEXT: s_endpgm
; ;
; GCN2-LABEL: atomic_max_i32: ; GCN2-LABEL: atomic_max_i32:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB4_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB4_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v2, s2 ; GCN2-NEXT: v_mov_b32_e32 v2, s2
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v3, s3 ; GCN2-NEXT: v_mov_b32_e32 v3, s3
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN2-NEXT: s_cbranch_execnz .LBB4_1 ; GCN2-NEXT: s_cbranch_execnz .LBB4_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_max_i32: ; GCN3-LABEL: atomic_max_i32:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB4_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB4_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 12 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB5_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB5_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v2, s4 ; GCN1-NEXT: v_mov_b32_e32 v2, s4
; GCN1-NEXT: v_mov_b32_e32 v3, s5 ; GCN1-NEXT: v_mov_b32_e32 v3, s5
; GCN1-NEXT: v_max_i32_e32 v0, s2, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s2, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB5_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB5_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v2, s4 ; GCN2-NEXT: v_mov_b32_e32 v2, s4
; GCN2-NEXT: v_mov_b32_e32 v3, s5 ; GCN2-NEXT: v_mov_b32_e32 v3, s5
; GCN2-NEXT: v_max_i32_e32 v0, s2, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s2, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB5_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB5_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_max_i32_e32 v0, s2, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 22 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB6_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB6_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB6_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB6_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB6_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB6_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 17 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB7_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB7_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN1-NEXT: v_max_i32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB7_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB7_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN2-NEXT: v_max_i32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB7_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB7_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_max_i32_e32 v0, s8, v1 ; GCN3-NEXT: v_max_i32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 21 Lines
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s2, 16 ; GCN1-NEXT: s_add_u32 s0, s2, 16
; GCN1-NEXT: s_addc_u32 s1, s3, 0 ; GCN1-NEXT: s_addc_u32 s1, s3, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB8_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB8_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 9 Lines
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s2, 16 ; GCN2-NEXT: s_add_u32 s0, s2, 16
; GCN2-NEXT: s_addc_u32 s1, s3, 0 ; GCN2-NEXT: s_addc_u32 s1, s3, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB8_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB8_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GCN2-NEXT: s_cbranch_execnz .LBB8_1 ; GCN2-NEXT: s_cbranch_execnz .LBB8_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_umax_i32_offset: ; GCN3-LABEL: atomic_umax_i32_offset:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB8_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB8_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 15 Lines
; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s4, 16 ; GCN1-NEXT: s_add_u32 s0, s4, 16
; GCN1-NEXT: s_addc_u32 s1, s5, 0 ; GCN1-NEXT: s_addc_u32 s1, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB9_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB9_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 14 Lines
; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s4, 16 ; GCN2-NEXT: s_add_u32 s0, s4, 16
; GCN2-NEXT: s_addc_u32 s1, s5, 0 ; GCN2-NEXT: s_addc_u32 s1, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB9_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB9_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB9_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB9_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_max_u32_e32 v0, s2, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 25 Lines
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB10_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB10_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 13 Lines
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB10_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB10_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB10_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB10_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 20 Lines
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB11_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB11_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB11_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB11_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB11_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB11_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 20 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB12_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB12_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v2, s2 ; GCN1-NEXT: v_mov_b32_e32 v2, s2
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v3, s3 ; GCN1-NEXT: v_mov_b32_e32 v3, s3
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN1-NEXT: s_cbranch_execnz .LBB12_1 ; GCN1-NEXT: s_cbranch_execnz .LBB12_1
; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN1-NEXT: s_endpgm ; GCN1-NEXT: s_endpgm
; ;
; GCN2-LABEL: atomic_umax_i32: ; GCN2-LABEL: atomic_umax_i32:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB12_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB12_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v2, s2 ; GCN2-NEXT: v_mov_b32_e32 v2, s2
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v3, s3 ; GCN2-NEXT: v_mov_b32_e32 v3, s3
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN2-NEXT: s_cbranch_execnz .LBB12_1 ; GCN2-NEXT: s_cbranch_execnz .LBB12_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_umax_i32: ; GCN3-LABEL: atomic_umax_i32:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB12_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB12_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 12 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB13_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB13_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v2, s4 ; GCN1-NEXT: v_mov_b32_e32 v2, s4
; GCN1-NEXT: v_mov_b32_e32 v3, s5 ; GCN1-NEXT: v_mov_b32_e32 v3, s5
; GCN1-NEXT: v_max_u32_e32 v0, s2, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s2, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB13_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB13_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v2, s4 ; GCN2-NEXT: v_mov_b32_e32 v2, s4
; GCN2-NEXT: v_mov_b32_e32 v3, s5 ; GCN2-NEXT: v_mov_b32_e32 v3, s5
; GCN2-NEXT: v_max_u32_e32 v0, s2, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s2, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB13_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB13_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_max_u32_e32 v0, s2, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 22 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB14_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB14_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB14_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB14_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB14_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB14_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_max_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 17 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB15_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB15_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN1-NEXT: v_max_u32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB15_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB15_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN2-NEXT: v_max_u32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB15_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB15_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_max_u32_e32 v0, s8, v1 ; GCN3-NEXT: v_max_u32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 21 Lines
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s2, 16 ; GCN1-NEXT: s_add_u32 s0, s2, 16
; GCN1-NEXT: s_addc_u32 s1, s3, 0 ; GCN1-NEXT: s_addc_u32 s1, s3, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB16_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB16_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 9 Lines
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s2, 16 ; GCN2-NEXT: s_add_u32 s0, s2, 16
; GCN2-NEXT: s_addc_u32 s1, s3, 0 ; GCN2-NEXT: s_addc_u32 s1, s3, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB16_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB16_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GCN2-NEXT: s_cbranch_execnz .LBB16_1 ; GCN2-NEXT: s_cbranch_execnz .LBB16_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_min_i32_offset: ; GCN3-LABEL: atomic_min_i32_offset:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB16_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB16_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 15 Lines
; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s4, 16 ; GCN1-NEXT: s_add_u32 s0, s4, 16
; GCN1-NEXT: s_addc_u32 s1, s5, 0 ; GCN1-NEXT: s_addc_u32 s1, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB17_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB17_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 14 Lines
; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s4, 16 ; GCN2-NEXT: s_add_u32 s0, s4, 16
; GCN2-NEXT: s_addc_u32 s1, s5, 0 ; GCN2-NEXT: s_addc_u32 s1, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB17_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB17_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB17_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB17_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_min_i32_e32 v0, s2, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 25 Lines
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB18_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB18_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 13 Lines
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB18_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB18_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB18_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB18_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 20 Lines
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB19_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB19_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB19_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB19_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB19_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB19_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 20 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB20_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB20_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v2, s2 ; GCN1-NEXT: v_mov_b32_e32 v2, s2
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v3, s3 ; GCN1-NEXT: v_mov_b32_e32 v3, s3
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN1-NEXT: s_cbranch_execnz .LBB20_1 ; GCN1-NEXT: s_cbranch_execnz .LBB20_1
; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN1-NEXT: s_endpgm ; GCN1-NEXT: s_endpgm
; ;
; GCN2-LABEL: atomic_min_i32: ; GCN2-LABEL: atomic_min_i32:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB20_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB20_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v2, s2 ; GCN2-NEXT: v_mov_b32_e32 v2, s2
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v3, s3 ; GCN2-NEXT: v_mov_b32_e32 v3, s3
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN2-NEXT: s_cbranch_execnz .LBB20_1 ; GCN2-NEXT: s_cbranch_execnz .LBB20_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_min_i32: ; GCN3-LABEL: atomic_min_i32:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB20_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB20_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 12 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB21_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB21_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v2, s4 ; GCN1-NEXT: v_mov_b32_e32 v2, s4
; GCN1-NEXT: v_mov_b32_e32 v3, s5 ; GCN1-NEXT: v_mov_b32_e32 v3, s5
; GCN1-NEXT: v_min_i32_e32 v0, s2, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s2, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB21_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB21_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v2, s4 ; GCN2-NEXT: v_mov_b32_e32 v2, s4
; GCN2-NEXT: v_mov_b32_e32 v3, s5 ; GCN2-NEXT: v_mov_b32_e32 v3, s5
; GCN2-NEXT: v_min_i32_e32 v0, s2, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s2, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB21_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB21_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_min_i32_e32 v0, s2, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 22 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB22_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB22_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB22_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB22_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB22_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB22_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_i32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 17 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB23_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB23_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN1-NEXT: v_min_i32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB23_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB23_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN2-NEXT: v_min_i32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB23_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB23_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_min_i32_e32 v0, s8, v1 ; GCN3-NEXT: v_min_i32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 21 Lines
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s2, 16 ; GCN1-NEXT: s_add_u32 s0, s2, 16
; GCN1-NEXT: s_addc_u32 s1, s3, 0 ; GCN1-NEXT: s_addc_u32 s1, s3, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB24_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB24_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 9 Lines
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s2, 16 ; GCN2-NEXT: s_add_u32 s0, s2, 16
; GCN2-NEXT: s_addc_u32 s1, s3, 0 ; GCN2-NEXT: s_addc_u32 s1, s3, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB24_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB24_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[2:3]
; GCN2-NEXT: s_cbranch_execnz .LBB24_1 ; GCN2-NEXT: s_cbranch_execnz .LBB24_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_umin_i32_offset: ; GCN3-LABEL: atomic_umin_i32_offset:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB24_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB24_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 15 Lines
; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s8, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_add_u32 s0, s4, 16 ; GCN1-NEXT: s_add_u32 s0, s4, 16
; GCN1-NEXT: s_addc_u32 s1, s5, 0 ; GCN1-NEXT: s_addc_u32 s1, s5, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB25_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB25_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 14 Lines
; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s8, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_add_u32 s0, s4, 16 ; GCN2-NEXT: s_add_u32 s0, s4, 16
; GCN2-NEXT: s_addc_u32 s1, s5, 0 ; GCN2-NEXT: s_addc_u32 s1, s5, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB25_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB25_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB25_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB25_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_min_u32_e32 v0, s2, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 25 Lines
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB26_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB26_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 13 Lines
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB26_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB26_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v1, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB26_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB26_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 20 Lines
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: s_add_u32 s0, s0, 16 ; GCN1-NEXT: s_add_u32 s0, s0, 16
; GCN1-NEXT: s_addc_u32 s1, s1, 0 ; GCN1-NEXT: s_addc_u32 s1, s1, 0
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB27_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB27_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 18 Lines
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: s_add_u32 s0, s0, 16 ; GCN2-NEXT: s_add_u32 s0, s0, 16
; GCN2-NEXT: s_addc_u32 s1, s1, 0 ; GCN2-NEXT: s_addc_u32 s1, s1, 0
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB27_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB27_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16 ; GCN3-NEXT: flat_load_dword v0, v[0:1] offset:16
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB27_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB27_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] offset:16 glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 20 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb ; GCN1-NEXT: s_load_dword s4, s[0:1], 0xb
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s2 ; GCN1-NEXT: v_mov_b32_e32 v0, s2
; GCN1-NEXT: v_mov_b32_e32 v1, s3 ; GCN1-NEXT: v_mov_b32_e32 v1, s3
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB28_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB28_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v2, s2 ; GCN1-NEXT: v_mov_b32_e32 v2, s2
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v3, s3 ; GCN1-NEXT: v_mov_b32_e32 v3, s3
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN1-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN1-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN1-NEXT: s_cbranch_execnz .LBB28_1 ; GCN1-NEXT: s_cbranch_execnz .LBB28_1
; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN1-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN1-NEXT: s_endpgm ; GCN1-NEXT: s_endpgm
; ;
; GCN2-LABEL: atomic_umin_i32: ; GCN2-LABEL: atomic_umin_i32:
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN2-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s2 ; GCN2-NEXT: v_mov_b32_e32 v0, s2
; GCN2-NEXT: v_mov_b32_e32 v1, s3 ; GCN2-NEXT: v_mov_b32_e32 v1, s3
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB28_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB28_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v2, s2 ; GCN2-NEXT: v_mov_b32_e32 v2, s2
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v3, s3 ; GCN2-NEXT: v_mov_b32_e32 v3, s3
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN2-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GCN2-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GCN2-NEXT: s_cbranch_execnz .LBB28_1 ; GCN2-NEXT: s_cbranch_execnz .LBB28_1
; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end ; GCN2-NEXT: ; %bb.2: ; %atomicrmw.end
; GCN2-NEXT: s_endpgm ; GCN2-NEXT: s_endpgm
; ;
; GCN3-LABEL: atomic_umin_i32: ; GCN3-LABEL: atomic_umin_i32:
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c ; GCN3-NEXT: s_load_dword s4, s[0:1], 0x2c
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s2 ; GCN3-NEXT: v_mov_b32_e32 v0, s2
; GCN3-NEXT: v_mov_b32_e32 v1, s3 ; GCN3-NEXT: v_mov_b32_e32 v1, s3
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB28_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB28_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v2, s2 ; GCN3-NEXT: v_mov_b32_e32 v2, s2
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v3, s3 ; GCN3-NEXT: v_mov_b32_e32 v3, s3
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GCN3-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
Show All 12 Lines
; GCN1: ; %bb.0: ; %entry ; GCN1: ; %bb.0: ; %entry
; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 ; GCN1-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd ; GCN1-NEXT: s_load_dword s2, s[0:1], 0xd
; GCN1-NEXT: s_mov_b64 s[0:1], 0 ; GCN1-NEXT: s_mov_b64 s[0:1], 0
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v0, s4 ; GCN1-NEXT: v_mov_b32_e32 v0, s4
; GCN1-NEXT: v_mov_b32_e32 v1, s5 ; GCN1-NEXT: v_mov_b32_e32 v1, s5
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB29_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB29_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v2, s4 ; GCN1-NEXT: v_mov_b32_e32 v2, s4
; GCN1-NEXT: v_mov_b32_e32 v3, s5 ; GCN1-NEXT: v_mov_b32_e32 v3, s5
; GCN1-NEXT: v_min_u32_e32 v0, s2, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s2, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN2: ; %bb.0: ; %entry ; GCN2: ; %bb.0: ; %entry
; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN2-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN2-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN2-NEXT: s_mov_b64 s[0:1], 0 ; GCN2-NEXT: s_mov_b64 s[0:1], 0
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v0, s4 ; GCN2-NEXT: v_mov_b32_e32 v0, s4
; GCN2-NEXT: v_mov_b32_e32 v1, s5 ; GCN2-NEXT: v_mov_b32_e32 v1, s5
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB29_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB29_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v2, s4 ; GCN2-NEXT: v_mov_b32_e32 v2, s4
; GCN2-NEXT: v_mov_b32_e32 v3, s5 ; GCN2-NEXT: v_mov_b32_e32 v3, s5
; GCN2-NEXT: v_min_u32_e32 v0, s2, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s2, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 12 Lines
; GCN3: ; %bb.0: ; %entry ; GCN3: ; %bb.0: ; %entry
; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN3-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34 ; GCN3-NEXT: s_load_dword s2, s[0:1], 0x34
; GCN3-NEXT: s_mov_b64 s[0:1], 0 ; GCN3-NEXT: s_mov_b64 s[0:1], 0
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v0, s4 ; GCN3-NEXT: v_mov_b32_e32 v0, s4
; GCN3-NEXT: v_mov_b32_e32 v1, s5 ; GCN3-NEXT: v_mov_b32_e32 v1, s5
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB29_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB29_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v2, s4 ; GCN3-NEXT: v_mov_b32_e32 v2, s4
; GCN3-NEXT: v_mov_b32_e32 v3, s5 ; GCN3-NEXT: v_mov_b32_e32 v3, s5
; GCN3-NEXT: v_min_u32_e32 v0, s2, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s2, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 22 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s6, s0 ; GCN1-NEXT: s_add_u32 s0, s6, s0
; GCN1-NEXT: s_addc_u32 s1, s7, s1 ; GCN1-NEXT: s_addc_u32 s1, s7, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v1, v[0:1] ; GCN1-NEXT: flat_load_dword v1, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB30_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB30_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s4, v1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN1-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN1-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s6, s0 ; GCN2-NEXT: s_add_u32 s0, s6, s0
; GCN2-NEXT: s_addc_u32 s1, s7, s1 ; GCN2-NEXT: s_addc_u32 s1, s7, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v1, v[0:1] ; GCN2-NEXT: flat_load_dword v1, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB30_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB30_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s4, v1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN2-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN2-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 11 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s6, s0 ; GCN3-NEXT: s_add_u32 s0, s6, s0
; GCN3-NEXT: s_addc_u32 s1, s7, s1 ; GCN3-NEXT: s_addc_u32 s1, s7, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v1, v[0:1] ; GCN3-NEXT: flat_load_dword v1, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB30_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB30_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_min_u32_e32 v0, s4, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s4, v1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1 ; GCN3-NEXT: v_cmp_eq_u32_e32 vcc, v0, v1
; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GCN3-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
Show All 17 Lines
; GCN1-NEXT: s_waitcnt lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN1-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN1-NEXT: s_add_u32 s0, s4, s0 ; GCN1-NEXT: s_add_u32 s0, s4, s0
; GCN1-NEXT: s_addc_u32 s1, s5, s1 ; GCN1-NEXT: s_addc_u32 s1, s5, s1
; GCN1-NEXT: v_mov_b32_e32 v0, s0 ; GCN1-NEXT: v_mov_b32_e32 v0, s0
; GCN1-NEXT: v_mov_b32_e32 v1, s1 ; GCN1-NEXT: v_mov_b32_e32 v1, s1
; GCN1-NEXT: flat_load_dword v0, v[0:1] ; GCN1-NEXT: flat_load_dword v0, v[0:1]
; GCN1-NEXT: s_mov_b64 s[2:3], 0 ; GCN1-NEXT: s_mov_b64 s[2:3], 0
; GCN1-NEXT: s_waitcnt vmcnt(0)
; GCN1-NEXT: .LBB31_1: ; %atomicrmw.start ; GCN1-NEXT: .LBB31_1: ; %atomicrmw.start
; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN1-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt lgkmcnt(0)
; GCN1-NEXT: v_mov_b32_e32 v1, v0 ; GCN1-NEXT: v_mov_b32_e32 v1, v0
; GCN1-NEXT: v_mov_b32_e32 v3, s1 ; GCN1-NEXT: v_mov_b32_e32 v3, s1
; GCN1-NEXT: v_mov_b32_e32 v2, s0 ; GCN1-NEXT: v_mov_b32_e32 v2, s0
; GCN1-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN1-NEXT: v_min_u32_e32 v0, s8, v1
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN1-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN1-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN1-NEXT: buffer_wbinvl1_vol ; GCN1-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN2-NEXT: s_waitcnt lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN2-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN2-NEXT: s_add_u32 s0, s4, s0 ; GCN2-NEXT: s_add_u32 s0, s4, s0
; GCN2-NEXT: s_addc_u32 s1, s5, s1 ; GCN2-NEXT: s_addc_u32 s1, s5, s1
; GCN2-NEXT: v_mov_b32_e32 v0, s0 ; GCN2-NEXT: v_mov_b32_e32 v0, s0
; GCN2-NEXT: v_mov_b32_e32 v1, s1 ; GCN2-NEXT: v_mov_b32_e32 v1, s1
; GCN2-NEXT: flat_load_dword v0, v[0:1] ; GCN2-NEXT: flat_load_dword v0, v[0:1]
; GCN2-NEXT: s_mov_b64 s[2:3], 0 ; GCN2-NEXT: s_mov_b64 s[2:3], 0
; GCN2-NEXT: s_waitcnt vmcnt(0)
; GCN2-NEXT: .LBB31_1: ; %atomicrmw.start ; GCN2-NEXT: .LBB31_1: ; %atomicrmw.start
; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN2-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt lgkmcnt(0)
; GCN2-NEXT: v_mov_b32_e32 v1, v0 ; GCN2-NEXT: v_mov_b32_e32 v1, v0
; GCN2-NEXT: v_mov_b32_e32 v3, s1 ; GCN2-NEXT: v_mov_b32_e32 v3, s1
; GCN2-NEXT: v_mov_b32_e32 v2, s0 ; GCN2-NEXT: v_mov_b32_e32 v2, s0
; GCN2-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN2-NEXT: v_min_u32_e32 v0, s8, v1
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN2-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN2-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN2-NEXT: buffer_wbinvl1_vol ; GCN2-NEXT: buffer_wbinvl1_vol
Show All 16 Lines
; GCN3-NEXT: s_waitcnt lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2 ; GCN3-NEXT: s_lshl_b64 s[0:1], s[2:3], 2
; GCN3-NEXT: s_add_u32 s0, s4, s0 ; GCN3-NEXT: s_add_u32 s0, s4, s0
; GCN3-NEXT: s_addc_u32 s1, s5, s1 ; GCN3-NEXT: s_addc_u32 s1, s5, s1
; GCN3-NEXT: v_mov_b32_e32 v0, s0 ; GCN3-NEXT: v_mov_b32_e32 v0, s0
; GCN3-NEXT: v_mov_b32_e32 v1, s1 ; GCN3-NEXT: v_mov_b32_e32 v1, s1
; GCN3-NEXT: flat_load_dword v0, v[0:1] ; GCN3-NEXT: flat_load_dword v0, v[0:1]
; GCN3-NEXT: s_mov_b64 s[2:3], 0 ; GCN3-NEXT: s_mov_b64 s[2:3], 0
; GCN3-NEXT: s_waitcnt vmcnt(0)
; GCN3-NEXT: .LBB31_1: ; %atomicrmw.start ; GCN3-NEXT: .LBB31_1: ; %atomicrmw.start
; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN3-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt lgkmcnt(0)
; GCN3-NEXT: v_mov_b32_e32 v1, v0 ; GCN3-NEXT: v_mov_b32_e32 v1, v0
; GCN3-NEXT: v_mov_b32_e32 v3, s1 ; GCN3-NEXT: v_mov_b32_e32 v3, s1
; GCN3-NEXT: v_mov_b32_e32 v2, s0 ; GCN3-NEXT: v_mov_b32_e32 v2, s0
; GCN3-NEXT: v_min_u32_e32 v0, s8, v1 ; GCN3-NEXT: v_min_u32_e32 v0, s8, v1
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc ; GCN3-NEXT: flat_atomic_cmpswap v0, v[2:3], v[0:1] glc
; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN3-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN3-NEXT: buffer_wbinvl1_vol ; GCN3-NEXT: buffer_wbinvl1_vol
Show All 16 Lines

llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll

Show First 20 Lines • Show All 1,341 Lines • ▼ Show 20 Lines
} }
define double @global_atomic_fadd_f64_rtn_pat(ptr addrspace(1) %ptr, double %data) #1 { define double @global_atomic_fadd_f64_rtn_pat(ptr addrspace(1) %ptr, double %data) #1 {
; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat: ; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off ; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB47_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB47_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc ; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
} }
define double @global_atomic_fadd_f64_rtn_pat_system(ptr addrspace(1) %ptr, double %data) #1 { define double @global_atomic_fadd_f64_rtn_pat_system(ptr addrspace(1) %ptr, double %data) #1 {
; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat_system: ; GFX90A-LABEL: global_atomic_fadd_f64_rtn_pat_system:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off ; GFX90A-NEXT: global_load_dwordx2 v[2:3], v[0:1], off
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB49_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB49_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc ; GFX90A-NEXT: global_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5], off glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat(ptr %ptr) #1 { define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat: ; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: s_mov_b64 s[2:3], 0 ; GFX90A-NEXT: s_mov_b64 s[2:3], 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB53_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB53_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0 ; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_system(ptr %ptr) #1 { define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_system(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_system: ; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_system:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: s_mov_b64 s[2:3], 0 ; GFX90A-NEXT: s_mov_b64 s[2:3], 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB55_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB55_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0 ; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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} }
define double @flat_atomic_fadd_f64_rtn_pat(ptr %ptr) #1 { define double @flat_atomic_fadd_f64_rtn_pat(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat: ; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB56_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB56_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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} }
define double @flat_atomic_fadd_f64_rtn_pat_system(ptr %ptr) #1 { define double @flat_atomic_fadd_f64_rtn_pat_system(ptr %ptr) #1 {
; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat_system: ; GFX90A-LABEL: flat_atomic_fadd_f64_rtn_pat_system:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_mov_b64 s[4:5], 0 ; GFX90A-NEXT: s_mov_b64 s[4:5], 0
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB58_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB58_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], v[2:3], v[2:3] op_sel:[0,1]
; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0 ; GFX90A-NEXT: v_add_f64 v[2:3], v[4:5], 4.0
; GFX90A-NEXT: buffer_wbl2 ; GFX90A-NEXT: buffer_wbl2
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[2:3], v[0:1], v[2:5] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_invl2 ; GFX90A-NEXT: buffer_invl2
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
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define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_agent_safe(ptr %ptr) { define amdgpu_kernel void @flat_atomic_fadd_f64_noret_pat_agent_safe(ptr %ptr) {
; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_agent_safe: ; GFX90A-LABEL: flat_atomic_fadd_f64_noret_pat_agent_safe:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: s_mov_b64 s[2:3], 0 ; GFX90A-NEXT: s_mov_b64 s[2:3], 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1] ; GFX90A-NEXT: flat_load_dwordx2 v[2:3], v[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: .LBB61_1: ; %atomicrmw.start ; GFX90A-NEXT: .LBB61_1: ; %atomicrmw.start
; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX90A-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0 ; GFX90A-NEXT: v_add_f64 v[0:1], v[2:3], 4.0
; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[4:5], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc ; GFX90A-NEXT: flat_atomic_cmpswap_x2 v[0:1], v[4:5], v[0:3] glc
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
; GFX90A-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3] ; GFX90A-NEXT: v_cmp_eq_u64_e32 vcc, v[0:1], v[2:3]
; GFX90A-NEXT: s_or_b64 s[2:3], vcc, s[2:3] ; GFX90A-NEXT: s_or_b64 s[2:3], vcc, s[2:3]
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llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll

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; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GCN-NEXT: v_mov_b32_e32 v1, 0 ; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: s_movk_i32 s2, 0x100 ; GCN-NEXT: s_movk_i32 s2, 0x100
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: global_load_ushort v0, v1, s[0:1] glc ; GCN-NEXT: global_load_ushort v0, v1, s[0:1] glc
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: .LBB1_1: ; %bb3 ; GCN-NEXT: .LBB1_1: ; %bb3
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_lshlrev_b64 v[2:3], 1, v[0:1] ; GCN-NEXT: v_lshlrev_b64 v[2:3], 1, v[0:1]
; GCN-NEXT: v_mov_b32_e32 v0, s1 ; GCN-NEXT: v_mov_b32_e32 v0, s1
; GCN-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2 ; GCN-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2
; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v0, v3, vcc ; GCN-NEXT: v_addc_co_u32_e32 v3, vcc, v0, v3, vcc
; GCN-NEXT: global_load_short_d16_hi v0, v[2:3], off glc ; GCN-NEXT: global_load_short_d16_hi v0, v[2:3], off glc
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s2, v0 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, s2, v0
; GCN-NEXT: s_cbranch_vccz .LBB1_1 ; GCN-NEXT: s_cbranch_vccz .LBB1_1
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llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll

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; GFX9-LABEL: global_max_saddr_i32_rtn: ; GFX9-LABEL: global_max_saddr_i32_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] ; GFX9-NEXT: global_load_dword v0, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB0_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB0_1 ; GFX9-NEXT: s_cbranch_execnz .LBB0_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_max_saddr_i32_rtn: ; GFX10-LABEL: global_max_saddr_i32_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] ; GFX10-NEXT: global_load_dword v0, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB0_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
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; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB0_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB0_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 17 Lines
; GFX9-LABEL: global_max_saddr_i32_rtn_neg128: ; GFX9-LABEL: global_max_saddr_i32_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB1_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB1_1 ; GFX9-NEXT: s_cbranch_execnz .LBB1_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_max_saddr_i32_rtn_neg128: ; GFX10-LABEL: global_max_saddr_i32_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB1_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB1_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB1_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
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define amdgpu_ps void @global_max_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_max_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_max_saddr_i32_nortn: ; GFX9-LABEL: global_max_saddr_i32_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] ; GFX9-NEXT: global_load_dword v5, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB2_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB2_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB2_1 ; GFX9-NEXT: s_cbranch_execnz .LBB2_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_max_saddr_i32_nortn: ; GFX10-LABEL: global_max_saddr_i32_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] ; GFX10-NEXT: global_load_dword v5, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB2_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB2_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB2_1 ; GFX10-NEXT: s_cbranch_execnz .LBB2_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_max_saddr_i32_nortn: ; GFX11-LABEL: global_max_saddr_i32_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB2_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB2_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
Show All 13 Lines
define amdgpu_ps void @global_max_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_max_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_max_saddr_i32_nortn_neg128: ; GFX9-LABEL: global_max_saddr_i32_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB3_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB3_1 ; GFX9-NEXT: s_cbranch_execnz .LBB3_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_max_saddr_i32_nortn_neg128: ; GFX10-LABEL: global_max_saddr_i32_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB3_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB3_1 ; GFX10-NEXT: s_cbranch_execnz .LBB3_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_max_saddr_i32_nortn_neg128: ; GFX11-LABEL: global_max_saddr_i32_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB3_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB3_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
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define amdgpu_ps <2 x float> @global_max_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_max_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_max_saddr_i64_rtn: ; GFX9-LABEL: global_max_saddr_i64_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB4_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB4_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_max_saddr_i64_rtn: ; GFX10-LABEL: global_max_saddr_i64_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB4_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB4_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
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; GFX11-LABEL: global_max_saddr_i64_rtn: ; GFX11-LABEL: global_max_saddr_i64_rtn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB4_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB4_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps <2 x float> @global_max_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_max_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_max_saddr_i64_rtn_neg128: ; GFX9-LABEL: global_max_saddr_i64_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB5_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_max_saddr_i64_rtn_neg128: ; GFX10-LABEL: global_max_saddr_i64_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB5_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
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; GFX11-LABEL: global_max_saddr_i64_rtn_neg128: ; GFX11-LABEL: global_max_saddr_i64_rtn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB5_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB5_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps void @global_max_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_max_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_max_saddr_i64_nortn: ; GFX9-LABEL: global_max_saddr_i64_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB6_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB6_1 ; GFX9-NEXT: s_cbranch_execnz .LBB6_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_max_saddr_i64_nortn: ; GFX10-LABEL: global_max_saddr_i64_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB6_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_max_saddr_i64_nortn: ; GFX11-LABEL: global_max_saddr_i64_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB6_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB6_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 16 Lines
define amdgpu_ps void @global_max_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_max_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_max_saddr_i64_nortn_neg128: ; GFX9-LABEL: global_max_saddr_i64_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB7_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB7_1 ; GFX9-NEXT: s_cbranch_execnz .LBB7_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_max_saddr_i64_nortn_neg128: ; GFX10-LABEL: global_max_saddr_i64_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB7_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_max_saddr_i64_nortn_neg128: ; GFX11-LABEL: global_max_saddr_i64_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB7_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB7_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_gt_i64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 22 Lines
; GFX9-LABEL: global_min_saddr_i32_rtn: ; GFX9-LABEL: global_min_saddr_i32_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] ; GFX9-NEXT: global_load_dword v0, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB8_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB8_1 ; GFX9-NEXT: s_cbranch_execnz .LBB8_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_min_saddr_i32_rtn: ; GFX10-LABEL: global_min_saddr_i32_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] ; GFX10-NEXT: global_load_dword v0, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB8_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB8_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB8_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 17 Lines
; GFX9-LABEL: global_min_saddr_i32_rtn_neg128: ; GFX9-LABEL: global_min_saddr_i32_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB9_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB9_1 ; GFX9-NEXT: s_cbranch_execnz .LBB9_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_min_saddr_i32_rtn_neg128: ; GFX10-LABEL: global_min_saddr_i32_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB9_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB9_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB9_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
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define amdgpu_ps void @global_min_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_min_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_min_saddr_i32_nortn: ; GFX9-LABEL: global_min_saddr_i32_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] ; GFX9-NEXT: global_load_dword v5, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB10_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB10_1 ; GFX9-NEXT: s_cbranch_execnz .LBB10_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_min_saddr_i32_nortn: ; GFX10-LABEL: global_min_saddr_i32_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] ; GFX10-NEXT: global_load_dword v5, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB10_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB10_1 ; GFX10-NEXT: s_cbranch_execnz .LBB10_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_min_saddr_i32_nortn: ; GFX11-LABEL: global_min_saddr_i32_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB10_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB10_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
Show All 13 Lines
define amdgpu_ps void @global_min_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_min_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_min_saddr_i32_nortn_neg128: ; GFX9-LABEL: global_min_saddr_i32_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB11_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_i32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB11_1 ; GFX9-NEXT: s_cbranch_execnz .LBB11_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_min_saddr_i32_nortn_neg128: ; GFX10-LABEL: global_min_saddr_i32_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB11_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_i32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB11_1 ; GFX10-NEXT: s_cbranch_execnz .LBB11_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_min_saddr_i32_nortn_neg128: ; GFX11-LABEL: global_min_saddr_i32_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB11_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB11_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_i32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_i32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
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define amdgpu_ps <2 x float> @global_min_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_min_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_min_saddr_i64_rtn: ; GFX9-LABEL: global_min_saddr_i64_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB12_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_min_saddr_i64_rtn: ; GFX10-LABEL: global_min_saddr_i64_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB12_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
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; GFX11-LABEL: global_min_saddr_i64_rtn: ; GFX11-LABEL: global_min_saddr_i64_rtn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB12_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB12_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps <2 x float> @global_min_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_min_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_min_saddr_i64_rtn_neg128: ; GFX9-LABEL: global_min_saddr_i64_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB13_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_min_saddr_i64_rtn_neg128: ; GFX10-LABEL: global_min_saddr_i64_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB13_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
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; GFX11-LABEL: global_min_saddr_i64_rtn_neg128: ; GFX11-LABEL: global_min_saddr_i64_rtn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB13_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB13_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps void @global_min_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_min_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_min_saddr_i64_nortn: ; GFX9-LABEL: global_min_saddr_i64_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB14_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB14_1 ; GFX9-NEXT: s_cbranch_execnz .LBB14_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_min_saddr_i64_nortn: ; GFX10-LABEL: global_min_saddr_i64_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB14_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_min_saddr_i64_nortn: ; GFX11-LABEL: global_min_saddr_i64_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB14_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB14_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 16 Lines
define amdgpu_ps void @global_min_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_min_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_min_saddr_i64_nortn_neg128: ; GFX9-LABEL: global_min_saddr_i64_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB15_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB15_1 ; GFX9-NEXT: s_cbranch_execnz .LBB15_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_min_saddr_i64_nortn_neg128: ; GFX10-LABEL: global_min_saddr_i64_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB15_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_min_saddr_i64_nortn_neg128: ; GFX11-LABEL: global_min_saddr_i64_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB15_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB15_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_le_i64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 22 Lines
; GFX9-LABEL: global_umax_saddr_i32_rtn: ; GFX9-LABEL: global_umax_saddr_i32_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] ; GFX9-NEXT: global_load_dword v0, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB16_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB16_1 ; GFX9-NEXT: s_cbranch_execnz .LBB16_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umax_saddr_i32_rtn: ; GFX10-LABEL: global_umax_saddr_i32_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] ; GFX10-NEXT: global_load_dword v0, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB16_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB16_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB16_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 17 Lines
; GFX9-LABEL: global_umax_saddr_i32_rtn_neg128: ; GFX9-LABEL: global_umax_saddr_i32_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB17_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB17_1 ; GFX9-NEXT: s_cbranch_execnz .LBB17_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umax_saddr_i32_rtn_neg128: ; GFX10-LABEL: global_umax_saddr_i32_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB17_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB17_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB17_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 17 Lines
define amdgpu_ps void @global_umax_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_umax_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_umax_saddr_i32_nortn: ; GFX9-LABEL: global_umax_saddr_i32_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] ; GFX9-NEXT: global_load_dword v5, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB18_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB18_1 ; GFX9-NEXT: s_cbranch_execnz .LBB18_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umax_saddr_i32_nortn: ; GFX10-LABEL: global_umax_saddr_i32_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] ; GFX10-NEXT: global_load_dword v5, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB18_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB18_1 ; GFX10-NEXT: s_cbranch_execnz .LBB18_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_umax_saddr_i32_nortn: ; GFX11-LABEL: global_umax_saddr_i32_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB18_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB18_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
Show All 13 Lines
define amdgpu_ps void @global_umax_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_umax_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_umax_saddr_i32_nortn_neg128: ; GFX9-LABEL: global_umax_saddr_i32_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB19_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_max_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB19_1 ; GFX9-NEXT: s_cbranch_execnz .LBB19_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umax_saddr_i32_nortn_neg128: ; GFX10-LABEL: global_umax_saddr_i32_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB19_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_max_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB19_1 ; GFX10-NEXT: s_cbranch_execnz .LBB19_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_umax_saddr_i32_nortn_neg128: ; GFX11-LABEL: global_umax_saddr_i32_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB19_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB19_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_max_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_max_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
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define amdgpu_ps <2 x float> @global_umax_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_umax_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umax_saddr_i64_rtn: ; GFX9-LABEL: global_umax_saddr_i64_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB20_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umax_saddr_i64_rtn: ; GFX10-LABEL: global_umax_saddr_i64_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB20_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
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; GFX11-LABEL: global_umax_saddr_i64_rtn: ; GFX11-LABEL: global_umax_saddr_i64_rtn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB20_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB20_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps <2 x float> @global_umax_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_umax_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umax_saddr_i64_rtn_neg128: ; GFX9-LABEL: global_umax_saddr_i64_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB21_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umax_saddr_i64_rtn_neg128: ; GFX10-LABEL: global_umax_saddr_i64_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB21_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
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; GFX11-LABEL: global_umax_saddr_i64_rtn_neg128: ; GFX11-LABEL: global_umax_saddr_i64_rtn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB21_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB21_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps void @global_umax_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_umax_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umax_saddr_i64_nortn: ; GFX9-LABEL: global_umax_saddr_i64_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB22_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB22_1 ; GFX9-NEXT: s_cbranch_execnz .LBB22_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umax_saddr_i64_nortn: ; GFX10-LABEL: global_umax_saddr_i64_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB22_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_umax_saddr_i64_nortn: ; GFX11-LABEL: global_umax_saddr_i64_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB22_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB22_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 16 Lines
define amdgpu_ps void @global_umax_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_umax_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umax_saddr_i64_nortn_neg128: ; GFX9-LABEL: global_umax_saddr_i64_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB23_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB23_1 ; GFX9-NEXT: s_cbranch_execnz .LBB23_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umax_saddr_i64_nortn_neg128: ; GFX10-LABEL: global_umax_saddr_i64_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB23_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_umax_saddr_i64_nortn_neg128: ; GFX11-LABEL: global_umax_saddr_i64_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB23_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB23_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_gt_u64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 22 Lines
; GFX9-LABEL: global_umin_saddr_i32_rtn: ; GFX9-LABEL: global_umin_saddr_i32_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] ; GFX9-NEXT: global_load_dword v0, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB24_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB24_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB24_1 ; GFX9-NEXT: s_cbranch_execnz .LBB24_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umin_saddr_i32_rtn: ; GFX10-LABEL: global_umin_saddr_i32_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] ; GFX10-NEXT: global_load_dword v0, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB24_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB24_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB24_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB24_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 17 Lines
; GFX9-LABEL: global_umin_saddr_i32_rtn_neg128: ; GFX9-LABEL: global_umin_saddr_i32_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v2, v0 ; GFX9-NEXT: v_mov_b32_e32 v2, v0
; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB25_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB25_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB25_1 ; GFX9-NEXT: s_cbranch_execnz .LBB25_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_or_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_or_b64 exec, exec, s[0:1]
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umin_saddr_i32_rtn_neg128: ; GFX10-LABEL: global_umin_saddr_i32_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v0, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB25_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB25_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
Show All 9 Lines
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: v_mov_b32_e32 v2, v0 ; GFX11-NEXT: v_mov_b32_e32 v2, v0
; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v0, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v2
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB25_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB25_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v5, v0 ; GFX11-NEXT: v_mov_b32_e32 v5, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
Show All 17 Lines
define amdgpu_ps void @global_umin_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_umin_saddr_i32_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_umin_saddr_i32_nortn: ; GFX9-LABEL: global_umin_saddr_i32_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] ; GFX9-NEXT: global_load_dword v5, v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB26_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB26_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB26_1 ; GFX9-NEXT: s_cbranch_execnz .LBB26_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umin_saddr_i32_nortn: ; GFX10-LABEL: global_umin_saddr_i32_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] ; GFX10-NEXT: global_load_dword v5, v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB26_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB26_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB26_1 ; GFX10-NEXT: s_cbranch_execnz .LBB26_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_umin_saddr_i32_nortn: ; GFX11-LABEL: global_umin_saddr_i32_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB26_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB26_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
Show All 13 Lines
define amdgpu_ps void @global_umin_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) { define amdgpu_ps void @global_umin_saddr_i32_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i32 %data) {
; GFX9-LABEL: global_umin_saddr_i32_nortn_neg128: ; GFX9-LABEL: global_umin_saddr_i32_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB27_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX9-NEXT: v_min_u32_e32 v4, v5, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v0 ; GFX9-NEXT: v_mov_b32_e32 v5, v0
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB27_1 ; GFX9-NEXT: s_cbranch_execnz .LBB27_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umin_saddr_i32_nortn_neg128: ; GFX10-LABEL: global_umin_saddr_i32_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dword v5, v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v3, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB27_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX10-NEXT: v_min_u32_e32 v4, v5, v1
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap v0, v[2:3], v[4:5], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
; GFX10-NEXT: buffer_gl1_inv ; GFX10-NEXT: buffer_gl1_inv
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
; GFX10-NEXT: v_mov_b32_e32 v5, v0 ; GFX10-NEXT: v_mov_b32_e32 v5, v0
; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX10-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX10-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX10-NEXT: s_cbranch_execnz .LBB27_1 ; GFX10-NEXT: s_cbranch_execnz .LBB27_1
; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX10-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX11-LABEL: global_umin_saddr_i32_nortn_neg128: ; GFX11-LABEL: global_umin_saddr_i32_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b32 v5, v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v2, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v3, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB27_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB27_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_min_u32_e32 v4, v5, v1 ; GFX11-NEXT: v_min_u32_e32 v4, v5, v1
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b32 v0, v[2:3], v[4:5], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
; GFX11-NEXT: buffer_gl1_inv ; GFX11-NEXT: buffer_gl1_inv
; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5 ; GFX11-NEXT: v_cmp_eq_u32_e32 vcc, v0, v5
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define amdgpu_ps <2 x float> @global_umin_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_umin_saddr_i64_rtn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umin_saddr_i64_rtn: ; GFX9-LABEL: global_umin_saddr_i64_rtn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB28_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umin_saddr_i64_rtn: ; GFX10-LABEL: global_umin_saddr_i64_rtn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB28_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off glc
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; GFX11-LABEL: global_umin_saddr_i64_rtn: ; GFX11-LABEL: global_umin_saddr_i64_rtn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB28_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB28_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps <2 x float> @global_umin_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps <2 x float> @global_umin_saddr_i64_rtn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umin_saddr_i64_rtn_neg128: ; GFX9-LABEL: global_umin_saddr_i64_rtn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v6, s3 ; GFX9-NEXT: v_mov_b32_e32 v6, s3
; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v6, vcc, 0, v6, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB29_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-NEXT: v_mov_b32_e32 v10, v4
; GFX9-NEXT: v_mov_b32_e32 v9, v3 ; GFX9-NEXT: v_mov_b32_e32 v9, v3
; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2] ; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: global_umin_saddr_i64_rtn_neg128: ; GFX10-LABEL: global_umin_saddr_i64_rtn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[3:4], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v6, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB29_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v10, v4 ; GFX10-NEXT: v_mov_b32_e32 v10, v4
; GFX10-NEXT: v_mov_b32_e32 v9, v3 ; GFX10-NEXT: v_mov_b32_e32 v9, v3
; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2] ; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[5:6], v[7:10], off offset:-128 glc
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; GFX11-LABEL: global_umin_saddr_i64_rtn_neg128: ; GFX11-LABEL: global_umin_saddr_i64_rtn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[3:4], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v5, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v6, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB29_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB29_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_mov_b32_e32 v10, v4 ; GFX11-NEXT: v_mov_b32_e32 v10, v4
; GFX11-NEXT: v_mov_b32_e32 v9, v3 ; GFX11-NEXT: v_mov_b32_e32 v9, v3
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2] ; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[9:10], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v8, v2, v10, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v7, v1, v9, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
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define amdgpu_ps void @global_umin_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_umin_saddr_i64_nortn(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umin_saddr_i64_nortn: ; GFX9-LABEL: global_umin_saddr_i64_nortn:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB30_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB30_1 ; GFX9-NEXT: s_cbranch_execnz .LBB30_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umin_saddr_i64_nortn: ; GFX10-LABEL: global_umin_saddr_i64_nortn:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3]
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB30_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
Show All 10 Lines
; GFX11-LABEL: global_umin_saddr_i64_nortn: ; GFX11-LABEL: global_umin_saddr_i64_nortn:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3]
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB30_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB30_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
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define amdgpu_ps void @global_umin_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) { define amdgpu_ps void @global_umin_saddr_i64_nortn_neg128(ptr addrspace(1) inreg %sbase, i32 %voffset, i64 %data) {
; GFX9-LABEL: global_umin_saddr_i64_nortn_neg128: ; GFX9-LABEL: global_umin_saddr_i64_nortn_neg128:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX9-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0 ; GFX9-NEXT: v_add_co_u32_e32 v7, vcc, s2, v0
; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v8, vcc, 0, v3, vcc
; GFX9-NEXT: s_mov_b64 s[0:1], 0 ; GFX9-NEXT: s_mov_b64 s[0:1], 0
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: .LBB31_1: ; %atomicrmw.start ; GFX9-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2] ; GFX9-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX9-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: buffer_wbinvl1 ; GFX9-NEXT: buffer_wbinvl1
; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6] ; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, v[3:4], v[5:6]
; GFX9-NEXT: v_mov_b32_e32 v6, v4 ; GFX9-NEXT: v_mov_b32_e32 v6, v4
; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1] ; GFX9-NEXT: s_or_b64 s[0:1], vcc, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v5, v3 ; GFX9-NEXT: v_mov_b32_e32 v5, v3
; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1] ; GFX9-NEXT: s_andn2_b64 exec, exec, s[0:1]
; GFX9-NEXT: s_cbranch_execnz .LBB31_1 ; GFX9-NEXT: s_cbranch_execnz .LBB31_1
; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end ; GFX9-NEXT: ; %bb.2: ; %atomicrmw.end
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: global_umin_saddr_i64_nortn_neg128: ; GFX10-LABEL: global_umin_saddr_i64_nortn_neg128:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128 ; GFX10-NEXT: global_load_dwordx2 v[5:6], v0, s[2:3] offset:-128
; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX10-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1] ; GFX10-NEXT: v_add_co_ci_u32_e64 v8, s[0:1], s3, 0, s[0:1]
; GFX10-NEXT: s_mov_b64 s[0:1], 0 ; GFX10-NEXT: s_mov_b64 s[0:1], 0
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: .LBB31_1: ; %atomicrmw.start ; GFX10-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2] ; GFX10-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2]
; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX10-NEXT: global_atomic_cmpswap_x2 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_gl0_inv ; GFX10-NEXT: buffer_gl0_inv
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; GFX11-LABEL: global_umin_saddr_i64_nortn_neg128: ; GFX11-LABEL: global_umin_saddr_i64_nortn_neg128:
; GFX11: ; %bb.0: ; GFX11: ; %bb.0:
; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128 ; GFX11-NEXT: global_load_b64 v[5:6], v0, s[2:3] offset:-128
; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0 ; GFX11-NEXT: v_add_co_u32 v7, s[0:1], s2, v0
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1] ; GFX11-NEXT: v_add_co_ci_u32_e64 v8, null, s3, 0, s[0:1]
; GFX11-NEXT: s_mov_b64 s[0:1], 0 ; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_waitcnt_depctr 0xfffe ; GFX11-NEXT: s_waitcnt_depctr 0xfffe
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: .LBB31_1: ; %atomicrmw.start ; GFX11-NEXT: .LBB31_1: ; %atomicrmw.start
; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1 ; GFX11-NEXT: ; =>This Inner Loop Header: Depth=1
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2] ; GFX11-NEXT: v_cmp_le_u64_e32 vcc, v[5:6], v[1:2]
; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v4, v2, v6, vcc
; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc ; GFX11-NEXT: v_cndmask_b32_e32 v3, v1, v5, vcc
; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX11-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc ; GFX11-NEXT: global_atomic_cmpswap_b64 v[3:4], v[7:8], v[3:6], off offset:-128 glc
; GFX11-NEXT: s_waitcnt vmcnt(0) ; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: buffer_gl0_inv ; GFX11-NEXT: buffer_gl0_inv
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llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll

Show All 25 Lines
; GCN-NEXT: s_and_saveexec_b64 s[2:3], vcc ; GCN-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GCN-NEXT: s_cbranch_execz .LBB0_4 ; GCN-NEXT: s_cbranch_execz .LBB0_4
; GCN-NEXT: ; %bb.1: ; %atomic ; GCN-NEXT: ; %bb.1: ; %atomic
; GCN-NEXT: s_mov_b32 s8, s10 ; GCN-NEXT: s_mov_b32 s8, s10
; GCN-NEXT: s_mov_b32 s9, s10 ; GCN-NEXT: s_mov_b32 s9, s10
; GCN-NEXT: buffer_load_dword v4, v[1:2], s[8:11], 0 addr64 offset:400 ; GCN-NEXT: buffer_load_dword v4, v[1:2], s[8:11], 0 addr64 offset:400
; GCN-NEXT: s_load_dword s2, s[0:1], 0xf ; GCN-NEXT: s_load_dword s2, s[0:1], 0xf
; GCN-NEXT: s_mov_b64 s[0:1], 0 ; GCN-NEXT: s_mov_b64 s[0:1], 0
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: .LBB0_2: ; %atomicrmw.start ; GCN-NEXT: .LBB0_2: ; %atomicrmw.start
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_max_i32_e32 v3, s2, v4 ; GCN-NEXT: v_max_i32_e32 v3, s2, v4
; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v6, v4 ; GCN-NEXT: v_mov_b32_e32 v6, v4
; GCN-NEXT: v_mov_b32_e32 v5, v3 ; GCN-NEXT: v_mov_b32_e32 v5, v3
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN-NEXT: buffer_atomic_cmpswap v[5:6], v[1:2], s[8:11], 0 addr64 offset:400 glc ; GCN-NEXT: buffer_atomic_cmpswap v[5:6], v[1:2], s[8:11], 0 addr64 offset:400 glc
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_wbinvl1 ; GCN-NEXT: buffer_wbinvl1
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; GCN-NEXT: s_and_saveexec_b64 s[2:3], vcc ; GCN-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GCN-NEXT: s_cbranch_execz .LBB1_3 ; GCN-NEXT: s_cbranch_execz .LBB1_3
; GCN-NEXT: ; %bb.1: ; %atomic ; GCN-NEXT: ; %bb.1: ; %atomic
; GCN-NEXT: s_mov_b32 s4, s6 ; GCN-NEXT: s_mov_b32 s4, s6
; GCN-NEXT: s_mov_b32 s5, s6 ; GCN-NEXT: s_mov_b32 s5, s6
; GCN-NEXT: buffer_load_dword v4, v[1:2], s[4:7], 0 addr64 offset:400 ; GCN-NEXT: buffer_load_dword v4, v[1:2], s[4:7], 0 addr64 offset:400
; GCN-NEXT: s_load_dword s2, s[0:1], 0xf ; GCN-NEXT: s_load_dword s2, s[0:1], 0xf
; GCN-NEXT: s_mov_b64 s[0:1], 0 ; GCN-NEXT: s_mov_b64 s[0:1], 0
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: .LBB1_2: ; %atomicrmw.start ; GCN-NEXT: .LBB1_2: ; %atomicrmw.start
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_max_i32_e32 v3, s2, v4 ; GCN-NEXT: v_max_i32_e32 v3, s2, v4
; GCN-NEXT: s_waitcnt expcnt(0) ; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v6, v4 ; GCN-NEXT: v_mov_b32_e32 v6, v4
; GCN-NEXT: v_mov_b32_e32 v5, v3 ; GCN-NEXT: v_mov_b32_e32 v5, v3
; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GCN-NEXT: buffer_atomic_cmpswap v[5:6], v[1:2], s[4:7], 0 addr64 offset:400 glc ; GCN-NEXT: buffer_atomic_cmpswap v[5:6], v[1:2], s[4:7], 0 addr64 offset:400 glc
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_wbinvl1 ; GCN-NEXT: buffer_wbinvl1
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llvm/test/CodeGen/AMDGPU/waitcnt-vmcnt-loop.mir

Show First 20 Lines • Show All 108 Lines • ▼ Show 20 Linesbody: |
bb.2: bb.2:
S_ENDPGM 0 S_ENDPGM 0
... ...
--- ---
# The loop contains a store, a load, and uses values loaded both inside and # The loop contains a store, a load, and uses values loaded both inside and
# outside the loop. # outside the loop.
# We do not expect the waitcnt to be hoisted out of the loop. # We expect the waitcnt to be hoisted out of the loop.
# GFX9-LABEL: waitcnt_vm_loop_load # GFX9-LABEL: waitcnt_vm_loop_load
# GFX9-LABEL: bb.0: # GFX9-LABEL: bb.0:
# GFX9-NOT: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.1: # GFX9-LABEL: bb.1:
# GFX9: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.2: # GFX9-LABEL: bb.2:
# GFX10-LABEL: waitcnt_vm_loop_load # GFX10-LABEL: waitcnt_vm_loop_load
# GFX10-LABEL: bb.0: # GFX10-LABEL: bb.0:
# GFX10-NOT: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.1: # GFX10-LABEL: bb.1:
# GFX10: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.2: # GFX10-LABEL: bb.2:
name: waitcnt_vm_loop_load name: waitcnt_vm_loop_load
body: | body: |
bb.0: bb.0:
successors: %bb.1 successors: %bb.1
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bb.2: bb.2:
S_ENDPGM 0 S_ENDPGM 0
... ...
--- ---
# Same as loop2 but the value loaded inside the loop is also used in the loop. # Same as loop2 but the value loaded inside the loop is also used in the loop.
# We do not expect the waitcnt to be hoisted out of the loop. # We expect the waitcnt to be hoisted out of the loop.
# GFX9-LABEL: waitcnt_vm_loop2_use_in_loop # GFX9-LABEL: waitcnt_vm_loop2_use_in_loop
# GFX9-LABEL: bb.0: # GFX9-LABEL: bb.0:
# GFX9-NOT: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.1: # GFX9-LABEL: bb.1:
# GFX9: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.2: # GFX9-LABEL: bb.2:
# GFX10-LABEL: waitcnt_vm_loop2_use_in_loop # GFX10-LABEL: waitcnt_vm_loop2_use_in_loop
# GFX10-LABEL: bb.0: # GFX10-LABEL: bb.0:
# GFX10-NOT: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.1: # GFX10-LABEL: bb.1:
# GFX10: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.2: # GFX10-LABEL: bb.2:
name: waitcnt_vm_loop2_use_in_loop name: waitcnt_vm_loop2_use_in_loop
body: | body: |
bb.0: bb.0:
successors: %bb.1 successors: %bb.1
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... ...
--- ---
# Similar test case but for register intervals. # Similar test case but for register intervals.
# GFX9-LABEL: waitcnt_vm_loop2_reginterval2 # GFX9-LABEL: waitcnt_vm_loop2_reginterval2
# GFX9-LABEL: bb.0: # GFX9-LABEL: bb.0:
# GFX9-NOT: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.1: # GFX9-LABEL: bb.1:
# GFX9: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.2: # GFX9-LABEL: bb.2:
# GFX10-LABEL: waitcnt_vm_loop2_reginterval2 # GFX10-LABEL: waitcnt_vm_loop2_reginterval2
# GFX10-LABEL: bb.0: # GFX10-LABEL: bb.0:
# GFX10-NOT: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.1: # GFX10-LABEL: bb.1:
# GFX10: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.2: # GFX10-LABEL: bb.2:
name: waitcnt_vm_loop2_reginterval2 name: waitcnt_vm_loop2_reginterval2
body: | body: |
bb.0: bb.0:
successors: %bb.1 successors: %bb.1
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bb.3: bb.3:
S_ENDPGM 0 S_ENDPGM 0
... ...
--- ---
# The loop contains a store, a load, and uses values loaded both inside and # The loop contains a store, a load, and uses values loaded both inside and
# outside the loop. # outside the loop.
# We do not expect the waitcnt to be hoisted out of the loop. # We expect the waitcnt to be hoisted out of the loop.
# GFX9-LABEL: waitcnt_vm_loop_flat_load # GFX9-LABEL: waitcnt_vm_loop_flat_load
# GFX9-LABEL: bb.0: # GFX9-LABEL: bb.0:
# GFX9-NOT: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.1: # GFX9-LABEL: bb.1:
# GFX9: S_WAITCNT 39 # GFX9: S_WAITCNT 39
# GFX9-LABEL: bb.2: # GFX9-LABEL: bb.2:
# GFX10-LABEL: waitcnt_vm_loop_flat_load # GFX10-LABEL: waitcnt_vm_loop_flat_load
# GFX10-LABEL: bb.0: # GFX10-LABEL: bb.0:
# GFX10-NOT: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.1: # GFX10-LABEL: bb.1:
# GFX10: S_WAITCNT 16 # GFX10: S_WAITCNT 16
# GFX10-LABEL: bb.2: # GFX10-LABEL: bb.2:
name: waitcnt_vm_loop_flat_load name: waitcnt_vm_loop_flat_load
body: | body: |
bb.0: bb.0:
successors: %bb.1 successors: %bb.1
Show All 17 Lines