[test] Replace aarch64-*-eabi with aarch64

[michaelplatings]

Summary

Also replace aarch64_be-*-eabi with aarch64_be

Using "eabi" for aarch64 targets is a common mistake and warned by Clang Driver.
We want to avoid it elsewhere as well. Just use the common "aarch64" without
other triple components.

clang/test/CodeGen/aarch64-bf16-lane-intrinsics.c

 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
 // RUN: %clang_cc1 -triple aarch64 -target-feature +neon -target-feature +bf16 \
 // RUN:  -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-LE %s
-// RUN: %clang_cc1 -triple aarch64_be-arm-none-eabi -target-feature +neon -target-feature +bf16 \
+// RUN: %clang_cc1 -triple aarch64_be -target-feature +neon -target-feature +bf16 \
 // RUN:  -disable-O0-optnone -emit-llvm %s -o - | opt -S -passes=mem2reg | FileCheck --check-prefix=CHECK-BE %s
 
 // REQUIRES: aarch64-registered-target || arm-registered-target
 
 #include <arm_neon.h>
 
 // CHECK-LE-LABEL: @test_vcopy_lane_bf16_v1(
 // CHECK-LE-NEXT:  entry:

clang/test/CodeGen/aarch64-branch-protection-attr.c

 // REQUIRES: aarch64-registered-target
-// RUN: %clang_cc1 -triple aarch64-unknown-unknown-eabi -emit-llvm  -target-cpu generic -target-feature +v8.5a %s -o - \
+// RUN: %clang_cc1 -triple aarch64 -emit-llvm  -target-cpu generic -target-feature +v8.5a %s -o - \
 // RUN:                               | FileCheck %s --check-prefix=CHECK
 
 __attribute__ ((target("branch-protection=none")))
 void none() {}
 // CHECK: define{{.*}} void @none() #[[#NONE:]]
 
   __attribute__ ((target("branch-protection=standard")))
 void std() {}

clang/test/CodeGen/codemodels.c

 // RUN: %clang_cc1 -emit-llvm  %s -o - | FileCheck %s -check-prefix=CHECK-NOMODEL
-// RUN: %clang_cc1 -triple aarch64-unknown-none-eabi -emit-llvm -mcmodel=tiny %s -o - | FileCheck %s -check-prefix=CHECK-TINY
+// RUN: %clang_cc1 -triple aarch64 -emit-llvm -mcmodel=tiny %s -o - | FileCheck %s -check-prefix=CHECK-TINY
 // RUN: %clang_cc1 -emit-llvm -mcmodel=small %s -o - | FileCheck %s -check-prefix=CHECK-SMALL
 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm -mcmodel=kernel %s -o - | FileCheck %s -check-prefix=CHECK-KERNEL
 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm -mcmodel=medium %s -o - | FileCheck %s -check-prefix=CHECK-MEDIUM
 // RUN: %clang_cc1 -emit-llvm -mcmodel=large %s -o - | FileCheck %s -check-prefix=CHECK-LARGE
 
 // CHECK-TINY: !llvm.module.flags = !{{{.*}}}
 // CHECK-TINY: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 0}
 // CHECK-SMALL: !llvm.module.flags = !{{{.*}}}
 // CHECK-SMALL: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 1}
 // CHECK-KERNEL: !llvm.module.flags = !{{{.*}}}
 // CHECK-KERNEL: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 2}
 // CHECK-MEDIUM: !llvm.module.flags = !{{{.*}}}
 // CHECK-MEDIUM: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 3}
 // CHECK-LARGE: !llvm.module.flags = !{{{.*}}}
 // CHECK-LARGE: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 4}
 // CHECK-NOMODEL-NOT: Code Model

clang/test/CodeGenCXX/bitfield-layout.cpp

 // RUN: %clang_cc1 %s -triple=x86_64-apple-darwin10 -emit-llvm -o - -O3 | FileCheck -check-prefix=CHECK -check-prefix=CHECK-LP64 %s
 // RUN: %clang_cc1 %s -triple=i386-apple-darwin10 -emit-llvm -o - -O3 | FileCheck %s
-// RUN: %clang_cc1 %s -triple=aarch64_be-none-eabi -emit-llvm -o - -O3 | FileCheck %s
+// RUN: %clang_cc1 %s -triple=aarch64_be -emit-llvm -o - -O3 | FileCheck %s
 // RUN: %clang_cc1 %s -triple=thumbv7_be-none-eabi -emit-llvm -o - -O3 | FileCheck %s
 // RUN: %clang_cc1 %s -triple=x86_64-unknown-unknown -emit-llvm -o - -O3 -std=c++11 | FileCheck -check-prefix=CHECK -check-prefix=CHECK-LP64 %s
 
 // CHECK-LP64: %union.Test1 = type { i32, [4 x i8] }
 union Test1 {
   int a;
   int b: 39;
 };

clang/test/Driver/aarch64-features.c

 // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s
 
 // RUN: %clang --target=aarch64-linux-gnu -rtlib=compiler-rt \
 // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s
 
 // RUN: %clang --target=arm64-unknown-linux -rtlib=compiler-rt \
 // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-ON %s
 
-// RUN: %clang --target=aarch64--none-eabi -rtlib=compiler-rt \
+// RUN: %clang --target=aarch64 -rtlib=compiler-rt \
 // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s
 
 // RUN: %clang --target=aarch64-apple-darwin -rtlib=compiler-rt \
 // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s
 
 // RUN: %clang --target=aarch64-windows-gnu -rtlib=compiler-rt \
 // RUN: -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-OUTLINE-ATOMICS-OFF %s
 

clang/test/Driver/aarch64-security-options.c

 // Check the -msign-return-address= option, which has a required argument to
 // select scope.
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -msign-return-address=none                             2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -msign-return-address=none                             2>&1 | \
 // RUN: FileCheck %s --check-prefix=RA-OFF --check-prefix=KEY --check-prefix=BTE-OFF --check-prefix=WARN
 
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -msign-return-address=non-leaf                         2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -msign-return-address=non-leaf                         2>&1 | \
 // RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A --check-prefix=BTE-OFF --check-prefix=WARN
 
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -msign-return-address=all                              2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -msign-return-address=all                              2>&1 | \
 // RUN: FileCheck %s --check-prefix=RA-ALL      --check-prefix=KEY-A --check-prefix=BTE-OFF --check-prefix=WARN
 
 // -mbranch-protection with standard
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -mbranch-protection=standard                                2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -mbranch-protection=standard                                2>&1 | \
 // RUN: FileCheck %s --check-prefix=RA-NON-LEAF --check-prefix=KEY-A --check-prefix=BTE-ON --check-prefix=WARN
 
 // If the -msign-return-address and -mbranch-protection are both used, the
 // right-most one controls return address signing.
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -msign-return-address=non-leaf -mbranch-protection=none     2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -msign-return-address=non-leaf -mbranch-protection=none     2>&1 | \
 // RUN: FileCheck %s --check-prefix=CONFLICT --check-prefix=WARN
 
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -mbranch-protection=pac-ret -msign-return-address=none     2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -mbranch-protection=pac-ret -msign-return-address=none     2>&1 | \
 // RUN: FileCheck %s --check-prefix=CONFLICT --check-prefix=WARN
 
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -msign-return-address=foo     2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -msign-return-address=foo     2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-RA-PROTECTION --check-prefix=WARN
 
-// RUN: %clang --target=aarch64--none-eabi -c %s -### -mbranch-protection=bar     2>&1 | \
+// RUN: %clang --target=aarch64 -c %s -### -mbranch-protection=bar     2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-BP-PROTECTION --check-prefix=WARN
 
-// RUN: %clang --target=aarch64--none-eabi -### -o /dev/null -mbranch-protection=standard /dev/null 2>&1 | \
+// RUN: %clang --target=aarch64 -### -o /dev/null -mbranch-protection=standard /dev/null 2>&1 | \
 // RUN: FileCheck --allow-empty %s --check-prefix=LINKER-DRIVER
 
 // WARN-NOT: warning: ignoring '-mbranch-protection=' option because the 'aarch64' architecture does not support it [-Wbranch-protection]
 
 // RA-OFF: "-msign-return-address=none"
 // RA-NON-LEAF: "-msign-return-address=non-leaf"
 // RA-ALL: "-msign-return-address=all"
 

clang/test/Driver/arm-wchar_t-defaults.c

 // RUN: %clang -### -target armv7-unknown-none-eabi -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7-unknown-none-eabi -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
 // RUN: %clang -### -target armv7-unknown-none-eabi -mthumb -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7-unknown-none-eabi -mthumb -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
 // RUN: %clang -### -target armv7eb-unknown-none-eabi -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7eb-unknown-none-eabi -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
 // RUN: %clang -### -target armv7eb-unknown-none-eabi -mthumb -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7eb-unknown-none-eabi -mthumb -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
-// RUN: %clang -### -target aarch64-unknown-none-eabi -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
-// RUN: %clang -### -target aarch64-unknown-none-eabi -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
-// RUN: %clang -### -target aarch64_be-unknown-none-eabi -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
-// RUN: %clang -### -target aarch64_be-unknown-none-eabi -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
+// RUN: %clang -### -target aarch64 -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
+// RUN: %clang -### -target aarch64 -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
+// RUN: %clang -### -target aarch64_be -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
+// RUN: %clang -### -target aarch64_be -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-UNSIGNED %s
 
 // RUN: %clang -### -target armv7-unknown-netbsd -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7-unknown-netbsd -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-SIGNED %s
 // RUN: %clang -### -target armv7-unknown-netbsd -mthumb -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7-unknown-netbsd -mthumb -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-SIGNED %s
 // RUN: %clang -### -target armv7eb-unknown-netbsd -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s
 // RUN: %clang -### -target armv7eb-unknown-netbsd -fno-short-wchar -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-LONG-SIGNED %s
 // RUN: %clang -### -target armv7eb-unknown-netbsd -mthumb -c %s -o /dev/null 2>&1 | FileCheck -check-prefix CHECK-SHORT %s

clang/test/Driver/sls-hardening-options.c

 // Check the -mharden-sls= option, which has a required argument to select
 // scope.
-// RUN: %clang -target aarch64--none-eabi -c %s -### 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=none 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=none 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=none 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=blr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=blr -mharden-sls=none 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=blr -mharden-sls=none 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=blr -mharden-sls=none 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-OFF --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=blr -mharden-sls=retbr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=blr -mharden-sls=retbr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=blr -mharden-sls=retbr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-OFF --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr,blr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr,blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr,blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=all 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=all 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=all 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr,blr,retbr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr,blr,retbr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr,blr,retbr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT-OFF
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr,blr,r 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr,blr,r 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr,blr,r 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=none,blr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=none,blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=none,blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=all,-blr 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=all,-blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=all,-blr 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr,blr,nocomdat 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr,blr,nocomdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr,blr,nocomdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=all,nocomdat 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=all,nocomdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=all,nocomdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr,blr,retbr,nocomdat 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr,blr,retbr,nocomdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr,blr,retbr,nocomdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=RETBR-ON --check-prefix=BLR-ON --check-prefix=NOCOMDAT
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=retbr,comdat,r 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=retbr,comdat,r 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=retbr,comdat,r 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=none,comdat 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=none,comdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=none,comdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 
-// RUN: %clang -target aarch64--none-eabi -c %s -### -mharden-sls=all,-comdat 2>&1 | \
+// RUN: %clang -target aarch64 -c %s -### -mharden-sls=all,-comdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 // RUN: %clang -target armv7a--none-eabi -c %s -### -mharden-sls=all,-comdat 2>&1 | \
 // RUN: FileCheck %s --check-prefix=BAD-SLS-SPEC
 
 // RETBR-OFF-NOT: "harden-sls-retbr"
 // RETBR-ON:  "+harden-sls-retbr"
 
 // BLR-OFF-NOT: "harden-sls-blr"

clang/test/Preprocessor/init-arm.c

 
 // RUN: %clang -E -dM -ffreestanding -target arm-netbsd-eabihf %s -o - | FileCheck -match-full-lines -check-prefix ARMHF-NETBSD %s
 // ARMHF-NETBSD:#define __SIZE_WIDTH__ 32
 // ARMHF-NETBSD-NOT:#define __SOFTFP__ 1
 // ARMHF-NETBSD:#define __UINT16_C_SUFFIX__
 
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=arm-none-eabi < /dev/null | FileCheck -match-full-lines -check-prefix ARM-NONE-EABI %s
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=arm-none-eabihf < /dev/null | FileCheck -match-full-lines -check-prefix ARM-NONE-EABI %s
-// RUN: %clang_cc1 -E -dM -ffreestanding -triple=aarch64-none-eabi < /dev/null | FileCheck -match-full-lines -check-prefix ARM-NONE-EABI %s
-// RUN: %clang_cc1 -E -dM -ffreestanding -triple=aarch64-none-eabihf < /dev/null | FileCheck -match-full-lines -check-prefix ARM-NONE-EABI %s
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=aarch64-none-elf < /dev/null | FileCheck -match-full-lines -check-prefix ARM-NONE-EABI %s
 // ARM-NONE-EABI: #define __ELF__ 1
 
 // No MachO targets use the full EABI, even if AAPCS is used.
 // RUN: %clang -target x86_64-apple-darwin -arch armv7s -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARM-MACHO-NO-EABI %s
 // RUN: %clang -target x86_64-apple-darwin -arch armv6m -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARM-MACHO-NO-EABI %s
 // RUN: %clang -target x86_64-apple-darwin -arch armv7m -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARM-MACHO-NO-EABI %s
 // RUN: %clang -target x86_64-apple-darwin -arch armv7em -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=ARM-MACHO-NO-EABI %s

clang/test/Sema/aarch64-sve-alias-attribute.c

-// RUN: %clang_cc1 -triple aarch64-unknown-linux-gnu -aux-triple aarch64-none-unknown-eabi -target-feature +sve -fopenmp-is-device -fopenmp -verify -fsyntax-only %s
+// RUN: %clang_cc1 -triple aarch64-unknown-linux-gnu -aux-triple aarch64 -target-feature +sve -fopenmp-is-device -fopenmp -verify -fsyntax-only %s
 
 static __inline__ __attribute__((__clang_arm_builtin_alias(__builtin_sve_svabd_n_f64_m))) // expected-no-diagnostics
 void
 nop(void);

llvm/test/Analysis/MemorySSA/pr43320.ll

 ; RUN: opt -passes=licm -verify-memoryssa -S < %s | FileCheck %s
 ; REQUIRES: asserts
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-unknown-none-eabi"
+target triple = "aarch64"
 
 ; CHECK-LABEL: @e()
 define void @e() {
 entry:
   br label %g
 
 g:                                                ; preds = %cleanup, %entry
   %0 = load i32, ptr null, align 4

llvm/test/CodeGen/AArch64/arm64-aapcs-be.ll

-; RUN: llc -mtriple=aarch64_be-none-eabi -fast-isel=false < %s | FileCheck %s
-; RUN: llc -mtriple=aarch64_be-none-eabi -fast-isel=true < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64_be -fast-isel=false < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64_be -fast-isel=true < %s | FileCheck %s
 
 ; Check narrow argument passing via stack - callee end
 define i32 @test_narrow_args_callee(i64 %x0, i64 %x1, i64 %x2, i64 %x3, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i8 %c, i16 %s) #0 {
 entry:
   %conv = zext i8 %c to i32
   %conv1 = sext i16 %s to i32
   %add = add nsw i32 %conv1, %conv
 ; CHECK-LABEL: test_narrow_args_callee:

llvm/test/CodeGen/AArch64/arm64-big-endian-varargs.ll

 ; RUN: llc < %s | FileCheck %s
 
 ; Vararg saving must save Q registers using the equivalent of STR/STP.
 
 target datalayout = "E-m:e-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64_be-arm-none-eabi"
+target triple = "aarch64_be"
 
 %struct.__va_list = type { ptr, ptr, ptr, i32, i32 }
 
 declare void @llvm.va_start(ptr) nounwind
 declare void @llvm.va_end(ptr) nounwind
 
 define double @callee(i32 %a, ...) {
 ; CHECK: stp

llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64 -verify-machineinstrs | FileCheck %s
 
 define i64 @Str64Ldr64(ptr nocapture %P, i64 %v, i64 %n) {
 ; CHECK-LABEL: Str64Ldr64:
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    mov x8, x0
 ; CHECK-NEXT:    mov x0, x1
 ; CHECK-NEXT:    str x1, [x8, #8]
 ; CHECK-NEXT:    ret

llvm/test/CodeGen/AArch64/arm64-narrow-st-merge.ll

-; RUN: llc < %s -mtriple aarch64--none-eabi -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple aarch64--none-eabi -mattr=+strict-align -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-STRICT
+; RUN: llc < %s -mtriple aarch64 -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -mtriple aarch64 -mattr=+strict-align -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-STRICT
 
 ; CHECK-LABEL: Strh_zero
 ; CHECK: str wzr
 ; CHECK-STRICT-LABEL: Strh_zero
 ; CHECK-STRICT: strh wzr
 ; CHECK-STRICT: strh wzr
 define void @Strh_zero(ptr nocapture %P, i32 %n) {
 entry:

llvm/test/CodeGen/AArch64/arm64-trn.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECKLE
-; RUN: llc < %s -mtriple=aarch64_be-none-eabi | FileCheck %s --check-prefixes=CHECKBE
+; RUN: llc < %s -mtriple=aarch64_be | FileCheck %s --check-prefixes=CHECKBE
 
 define <8 x i8> @vtrni8(ptr %A, ptr %B) nounwind {
 ; CHECKLE-LABEL: vtrni8:
 ; CHECKLE:       // %bb.0:
 ; CHECKLE-NEXT:    ldr d0, [x0]
 ; CHECKLE-NEXT:    ldr d1, [x1]
 ; CHECKLE-NEXT:    trn1 v2.8b, v0.8b, v1.8b
 ; CHECKLE-NEXT:    trn2 v0.8b, v0.8b, v1.8b

llvm/test/CodeGen/AArch64/branch-target-enforcement-indirect-calls.ll

-; RUN: llc -mtriple aarch64--none-eabi -mattr=+bti < %s | FileCheck %s
-; RUN: llc -mtriple aarch64--none-eabi -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel* -mattr=+bti %s -verify-machineinstrs -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,FALLBACK
+; RUN: llc -mtriple aarch64 -mattr=+bti < %s | FileCheck %s
+; RUN: llc -mtriple aarch64 -global-isel -global-isel-abort=2 -pass-remarks-missed=gisel* -mattr=+bti %s -verify-machineinstrs -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,FALLBACK
 
 ; FALLBACK: remark: <unknown>:0:0: unable to translate instruction: call: '  tail call void %p()' (in function: bti_enabled)
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64"
 
 ; When BTI is enabled, all indirect tail-calls must use x16 or x17 (the intra
 ; procedure call scratch registers) to hold the address, as these instructions

llvm/test/CodeGen/AArch64/bti-branch-relaxation.ll

 ; RUN: llc %s -o - | FileCheck %s
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-unknown-unknown-eabi"
+target triple = "aarch64"
 
 ; Function Attrs: nounwind
 define dso_local void @f(i64 %v) local_unnamed_addr #0 {
 entry:
   %call = tail call i32 @test() #0
   %and = and i32 %call, 2
   %cmp = icmp eq i32 %and, 0
   br i1 %cmp, label %if.then, label %if.else

llvm/test/CodeGen/AArch64/combine-andintoload.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=aarch64_be-none-eabi -o - | FileCheck %s --check-prefix=CHECKBE
+; RUN: llc < %s -mtriple=aarch64_be -o - | FileCheck %s --check-prefix=CHECKBE
 
 define i64 @load32_and16_and(ptr %p, i64 %y) {
 ; CHECK-LABEL: load32_and16_and:
 ; CHECK:       // %bb.0:
 ; CHECK-NEXT:    ldr w8, [x0]
 ; CHECK-NEXT:    and w8, w1, w8
 ; CHECK-NEXT:    and x0, x8, #0xffff
 ; CHECK-NEXT:    ret

llvm/test/CodeGen/AArch64/machine-outliner-outline-bti.ll

-; RUN: llc -mtriple aarch64--none-eabi < %s | FileCheck %s
+; RUN: llc -mtriple aarch64 < %s | FileCheck %s
 
 ; The BTI instruction cannot be outlined, because it needs to be the very first
 ; instruction executed after an indirect call.
 
 @g = hidden global i32 0, align 4
 
 define hidden void @foo() minsize "branch-target-enforcement"="true" {
 entry:

llvm/test/CodeGen/AArch64/stack-tagging-ex-2.ll

 ;   }
 
 ;   return 0;
 ; }
 
 ; RUN: opt -S -aarch64-stack-tagging %s -o - | FileCheck %s
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-unknown-unknown-eabi"
+target triple = "aarch64"
 
 @_ZTIi = external dso_local constant ptr
 
 ; Function Attrs: noreturn sanitize_memtag
 define dso_local void @_Z3barv() local_unnamed_addr #0 {
 entry:
   %exception = tail call ptr @__cxa_allocate_exception(i64 4) #4
   store i32 42, ptr %exception, align 16, !tbaa !2

llvm/test/CodeGen/AArch64/tme.ll

 ; RUN: llc %s -verify-machineinstrs -o - | FileCheck %s
 
-target triple = "aarch64-unknown-unknown-eabi"
+target triple = "aarch64"
 
 define i64 @test_tstart() #0 {
   %r = tail call i64 @llvm.aarch64.tstart()
   ret i64 %r
 }
 declare i64 @llvm.aarch64.tstart() #1
 ; CHECK-LABEL: test_tstart
 ; CHECK: tstart x

llvm/test/DebugInfo/AArch64/big-endian.ll

 ; RUN: llc %s -filetype=asm -o -
 
 source_filename = "test/DebugInfo/AArch64/big-endian.ll"
 target datalayout = "E-m:e-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64_be--none-eabi"
+target triple = "aarch64_be"
 
 @a = common global i32 0, align 4, !dbg !0
 
 !llvm.dbg.cu = !{!4}
 !llvm.module.flags = !{!8, !9}
 !llvm.ident = !{!10}
 
 !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())

llvm/test/MC/AArch64/align.s

 // RUN: llvm-mc -filetype=obj -triple aarch64 %s | llvm-objdump -d - | FileCheck %s
-// RUN: llvm-mc -filetype=obj -triple aarch64_be-none-eabi %s | llvm-objdump -d - | FileCheck %s
+// RUN: llvm-mc -filetype=obj -triple aarch64_be %s | llvm-objdump -d - | FileCheck %s
 
 // CHECK:   0: d2800000   mov     x0, #0
 // CHECK:   4: d2800000   mov     x0, #0
 // CHECK:   8: d503201f   nop
 // CHECK:   c: d503201f   nop
 // CHECK:  10: d2800000   mov     x0, #0
 
        .text
        mov x0, #0
        mov x0, #0
        .p2align 4
        mov x0, #0

llvm/test/MC/AArch64/directive-arch-negative.s

-// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
 
   .arch axp64
 # CHECK: error: unknown arch name
 # CHECK-NEXT:   .arch axp64
 # CHECK-NEXT:       ^
 
   .arch armv8
   aese v0.8h, v1.8h

llvm/test/MC/AArch64/directive-arch.s

-// RUN: llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
+// RUN: llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
 
   .arch armv8-a+crypto
 
   aesd v0.16b, v2.16b
   eor v0.16b, v0.16b, v2.16b
 
 # CHECK:  aesd  v0.16b, v2.16b
 # CHECK:        eor     v0.16b, v0.16b, v2.16b

llvm/test/MC/AArch64/directive-cpu.s

-// RUN: llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
+// RUN: llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
 
 .cpu generic
 fminnm d0, d0, d1
 // CHECK: fminnm d0, d0, d1
 
 .cpu generic+fp
 fminnm d0, d0, d1
 // CHECK: fminnm d0, d0, d1

llvm/test/MC/AArch64/directive-variant_pcs-err.s

-// RUN: not llvm-mc -triple aarch64-unknown-none-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
 
 // CHECK:      [[#@LINE+1]]:13: error: expected symbol name
 .variant_pcs
 
 .global foo
 // CHECK:      [[#@LINE+1]]:18: error: expected newline
 .variant_pcs foo bar

llvm/test/MC/AArch64/error-location-during-layout.s

-// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
   .section a
   .space 8
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: invalid .org offset '4' (at offset '8')
   .org 4
 
   .section b
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: expected absolute expression
   .org undef
 
   .section c
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: expected assembly-time absolute expression
   .org -undef

llvm/test/MC/AArch64/error-location-ldr-pseudo.s

-// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
   .text
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: expected relocatable expression
   ldr x0, =(-undef)

llvm/test/MC/AArch64/error-location-post-layout.s

-// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
   .set v1, -undef
 // CHECK: 3:12: error: expression could not be evaluated
 
   .comm common, 4
   .set v3, common
 // CHECK: 7:12: error: Common symbol 'common' cannot be used in assignment expr
 
   .set v2, a-undef
 // CHECK: 10:13: error: symbol 'undef' could not be evaluated in a subtraction expression

llvm/test/MC/AArch64/error-location.s

-// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
 // Note: These errors are not always emitted in the order in which the relevant
 // source appears, this file is carefully ordered so that that is the case.
 
   .text
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: symbol 'undef' can not be undefined in a subtraction expression
   .word (0-undef)
 

llvm/test/MC/AArch64/fixup-absolute-signed.s

-// RUN: llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o - | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+// RUN: llvm-mc -triple aarch64 -filetype obj < %s -o - | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
 
 onepart_before = 12345
 twopart_before = -12345678
 threepart_before = -1234567890
 
 // CHECK: movn     x0, #0, lsl #32
 // CHECK: movn     x0, #0, lsl #32
 movz x0, #:abs_g2_s:threepart_before

llvm/test/MC/AArch64/fixup-absolute.s

-// RUN: llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o - | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
+// RUN: llvm-mc -triple aarch64 -filetype obj < %s -o - | llvm-objdump --no-print-imm-hex -d - | FileCheck %s
 
 onepart_before = 0x1234
 twopart_before = 0x12345678
 threepart_before = 0x1234567890AB
 fourpart_before = 0x1234567890ABCDEF
 
 // CHECK: mov     x0, #1311673391471656960
 // CHECK: mov     x0, #1311673391471656960

llvm/test/MC/AArch64/fixup-out-of-range-edge.s

-// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 
 // COM: Edge case testing for branches and ADR[P]
 // CHECK-LABEL: :{{[0-9]+}}:{{[0-9]+}}: error: fixup value out of range
 // CHECK-NEXT:  adr x0, adr_lower
 adr_lower:
   adr x0, adr_lower-(1<<20)-1
 
 // CHECK-LABEL: :{{[0-9]+}}:{{[0-9]+}}: error: fixup value out of range

llvm/test/MC/AArch64/fixup-out-of-range.s

-// RUN: not llvm-mc -triple aarch64--none-eabi -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple aarch64 -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s
 // RUN: not llvm-mc -triple aarch64-windows -filetype obj < %s -o /dev/null 2>&1 | FileCheck %s -check-prefixes=CHECK,CHECK-WIN
 
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: fixup value out of range
   adr x0, distant
 
 // CHECK: :[[@LINE+1]]:{{[0-9]+}}: error: fixup value out of range
   ldr x0, distant
 

llvm/test/Transforms/LoopVectorize/AArch64/maximize-bandwidth-invalidate.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; REQUIRES: asserts
 ; RUN: opt < %s -passes=loop-vectorize -vectorizer-maximize-bandwidth -S 2>&1 | FileCheck %s
 ; RUN: opt < %s -passes=loop-vectorize -vectorizer-maximize-bandwidth -S -debug-only=loop-vectorize 2>&1 -disable-output | FileCheck %s --check-prefix=COST
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
-target triple = "aarch64-none-unknown-eabi"
+target triple = "aarch64"
 
 ; Check that the maximize vector bandwidth option does not give incorrect costs
 ; due to invalid cost decisions. The loop below has a low maximum trip count,
 ; so will be masked.
 
 ; COST: LV: Found an estimated cost of 3000000 for VF 2 For instruction:   %0 = load
 ; COST: LV: Found an estimated cost of 3000000 for VF 4 For instruction:   %0 = load
 ; COST: LV: Found an estimated cost of 3000000 for VF 8 For instruction:   %0 = load