[ARM] allow long-call codegen for armv6-M eXecute Only (XO)

[stuij]

Summary

Recently eXecute Only (XO) codegen was also allowed for armv6-M. Previously this
was only implemented for ~armv7+, effectively if MOVW/MOVT is
available. Regarding long calls, we remove the check for MOVW/MOVT when
generating code for XO, which already was redundant as in the subtarget
initialization we already check if XO is valid for the target. And targets that
generate valid XO code should be able to handle the (wrapper globaladdress)
node.

[efriedma]

LGTM

llvm/lib/Target/ARM/ARMISelLowering.cpp

ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 
   if (Subtarget->genLongCalls()) {
     assert((!isPositionIndependent() || Subtarget->isTargetWindows()) &&
            "long-calls codegen is not position independent!");
     // Handle a global address or an external symbol. If it's not one of
     // those, the target's already in a register, so we don't need to do
     // anything extra.
     if (isa<GlobalAddressSDNode>(Callee)) {
-      // When generating execute-only code we use movw movt pair.
-      // Currently execute-only is only available for architectures that
-      // support movw movt, so we are safe to assume that.
       if (Subtarget->genExecuteOnly()) {
-        assert(Subtarget->useMovt() &&
-               "long-calls with execute-only requires movt and movw!");
+        if (Subtarget->useMovt())
           ++NumMovwMovt;
         Callee = DAG.getNode(ARMISD::Wrapper, dl, PtrVt,
                              DAG.getTargetGlobalAddress(GVal, dl, PtrVt));
       } else {
         // Create a constant pool entry for the callee address
         unsigned ARMPCLabelIndex = AFI->createPICLabelUId();
         ARMConstantPoolValue *CPV = ARMConstantPoolConstant::Create(
             GVal, ARMPCLabelIndex, ARMCP::CPValue, 0);
 
         // Get the address of the callee into a register
         SDValue Addr = DAG.getTargetConstantPool(CPV, PtrVt, Align(4));
         Addr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Addr);
         Callee = DAG.getLoad(
             PtrVt, dl, DAG.getEntryNode(), Addr,
             MachinePointerInfo::getConstantPool(DAG.getMachineFunction()));
       }
     } else if (ExternalSymbolSDNode *S=dyn_cast<ExternalSymbolSDNode>(Callee)) {
       const char *Sym = S->getSymbol();
 
-      // When generating execute-only code we use movw movt pair.
-      // Currently execute-only is only available for architectures that
-      // support movw movt, so we are safe to assume that.
       if (Subtarget->genExecuteOnly()) {
-        assert(Subtarget->useMovt() &&
-               "long-calls with execute-only requires movt and movw!");
+        if (Subtarget->useMovt())
           ++NumMovwMovt;
         Callee = DAG.getNode(ARMISD::Wrapper, dl, PtrVt,
                              DAG.getTargetGlobalAddress(GVal, dl, PtrVt));
       } else {
         // Create a constant pool entry for the callee address
         unsigned ARMPCLabelIndex = AFI->createPICLabelUId();
         ARMConstantPoolValue *CPV = ARMConstantPoolSymbol::Create(
             *DAG.getContext(), Sym, ARMPCLabelIndex, 0);
 

llvm/test/CodeGen/ARM/large-stack.ll

 ; RUN: llc -mtriple=arm-eabi %s -o /dev/null
+; RUN: llc -mtriple=thumbv6m-eabi -mattr=+execute-only %s -o -
 
 define void @test1() {
     %tmp = alloca [ 64 x i32 ] , align 4
     ret void
 }
 
 define void @test2() {
     %tmp = alloca [ 4168 x i8 ] , align 4

llvm/test/CodeGen/Thumb/thumb-execute-only-long-calls.ll

+; RUN: llc < %s -mtriple=thumbv6m-arm-none-eabi -relocation-model=static | FileCheck %s -check-prefixes=CHECK
+
+define void @fn() #0 {
+entry:
+; CHECK-LABEL: fn:
+; CHECK:       ldr [[REG:r[0-9]+]], .LCPI0_0
+; CHECK-NEXT:  blx [[REG]]
+; CHECK:       .LCPI0_0:
+; CHECK-NEXT:  .long   bar
+  call void @bar()
+  ret void
+}
+
+define void @execute_only_fn() #1 {
+; CHECK-LABEL: execute_only_fn:
+; CHECK:       movs    [[REG0:r[0-9]+]], :upper8_15:bar
+; CHECK-NEXT:  lsls    [[REG0]], r0, #8
+; CHECK-NEXT:  adds    [[REG0]], :upper0_7:bar
+; CHECK-NEXT:  lsls    [[REG0]], r0, #8
+; CHECK-NEXT:  adds    [[REG0]], :lower8_15:bar
+; CHECK-NEXT:  lsls    [[REG0]], r0, #8
+; CHECK-NEXT:  adds    [[REG0]], :lower0_7:bar
+; CHECK-NEXT:  blx     [[REG0]]
+; CHECK-NOT:   .LCPI1_0:
+
+entry:
+  call void @bar()
+  ret void
+}
+
+attributes #0 = { noinline optnone "target-features"="+thumb-mode,+long-calls" }
+attributes #1 = { noinline optnone "target-features"="+execute-only,+thumb-mode,+long-calls" }
+
+declare dso_local void @bar()

llvm/test/CodeGen/Thumb2/thumb2-execute-only-long-calls.ll

 ; STATIC-NEXT:  movt    [[REG0]], :upper16:bar
 ; STATIC-NEXT:  blx     [[REG0]]
 ; STATIC-NOT:   .LCPI0_0:
 
 ; RWPI-LABEL: execute_only_fn:
 ; RWPI:       movw    [[REG0:r[0-9]+]], :lower16:bar
 ; RWPI-NEXT:  movt    [[REG0]], :upper16:bar
 ; RWPI-NEXT:  blx     [[REG0]]
-; RWPI-NOT:   .LCPI0_0:
+; RWPI-NOT:   .LCPI1_0:
 entry:
   call void @bar()
   ret void
 }
 
 attributes #0 = { noinline optnone "target-features"="+thumb-mode,+long-calls" }
 attributes #1 = { noinline optnone "target-features"="+execute-only,+thumb-mode,+long-calls" }
 
 declare dso_local void @bar()