[llvm][test] Update SPL Vectorizer X86 metadata test to use check-globals

[jmciver]

Summary

The SPL Vectorizer X86 metadata test is updated to use update_test_checks.py
with the check-globals option. This replaces the metadata CHECK-DAG statements
with generated expressions.

[jmciver]

Regenerating test using D148216

[jmciver]

@jdoerfert thanks for the LGTM!

This patch was originally linked to D153190, but as @nikic pointed out D148216 will supersede D153190 by providing a generic solution.

I have arc patched and tested against D148216, which changes the variable names slightly. I am going to add D148216 as a parent and wait for it to land before landing this patch.

llvm/test/Transforms/SLPVectorizer/X86/metadata.ll

-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals
 ; RUN: opt < %s -passes=slp-vectorizer,dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.8.0"
 
 define void @test1(ptr %a, ptr %b, ptr %c) {
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8, !tbaa [[TBAA0:![0-9]+]]
-; CHECK-NEXT:    [[TMP3:%.*]] = load <2 x double>, ptr [[B:%.*]], align 8, !tbaa [[TBAA0]]
-; CHECK-NEXT:    [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[TMP3]], !fpmath !4
-; CHECK-NEXT:    store <2 x double> [[TMP4]], ptr [[C:%.*]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8, !tbaa [[TBAA0:![0-9]+]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, ptr [[B:%.*]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP2:%.*]] = fmul <2 x double> [[TMP0]], [[TMP1]], !fpmath [[META4:![0-9]+]]
+; CHECK-NEXT:    store <2 x double> [[TMP2]], ptr [[C:%.*]], align 8, !tbaa [[TBAA0]]
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %i0 = load double, ptr %a, align 8, !tbaa !4
   %i1 = load double, ptr %b, align 8, !tbaa !4
   %mul = fmul double %i0, %i1, !fpmath !0
   %arrayidx3 = getelementptr inbounds double, ptr %a, i64 1
   %i3 = load double, ptr %arrayidx3, align 8, !tbaa !4
   %arrayidx4 = getelementptr inbounds double, ptr %b, i64 1
   %i4 = load double, ptr %arrayidx4, align 8, !tbaa !4
   %mul5 = fmul double %i3, %i4, !fpmath !0
   store double %mul, ptr %c, align 8, !tbaa !4
   %arrayidx5 = getelementptr inbounds double, ptr %c, i64 1
   store double %mul5, ptr %arrayidx5, align 8, !tbaa !4
   ret void
 }
 
 define void @test2(ptr %a, ptr %b, ptr %e) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8, !tbaa [[TBAA0]]
-; CHECK-NEXT:    [[TMP3:%.*]] = load <2 x double>, ptr [[B:%.*]], align 8, !tbaa [[TBAA0]]
-; CHECK-NEXT:    [[TMP4:%.*]] = fmul <2 x double> [[TMP1]], [[TMP3]], !fpmath !5
-; CHECK-NEXT:    store <2 x double> [[TMP4]], ptr [[E:%.*]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP0:%.*]] = load <2 x double>, ptr [[A:%.*]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x double>, ptr [[B:%.*]], align 8, !tbaa [[TBAA0]]
+; CHECK-NEXT:    [[TMP2:%.*]] = fmul <2 x double> [[TMP0]], [[TMP1]], !fpmath [[META5:![0-9]+]]
+; CHECK-NEXT:    store <2 x double> [[TMP2]], ptr [[E:%.*]], align 8, !tbaa [[TBAA0]]
 ; CHECK-NEXT:    ret void
 ;
 entry:
   %i0 = load double, ptr %a, align 8, !tbaa !4
   %i1 = load double, ptr %b, align 8, !tbaa !4
   %mul = fmul double %i0, %i1, !fpmath !1
   %arrayidx3 = getelementptr inbounds double, ptr %a, i64 1
   %i3 = load double, ptr %arrayidx3, align 8, !tbaa !4
   %arrayidx4 = getelementptr inbounds double, ptr %b, i64 1
   %i4 = load double, ptr %arrayidx4, align 8, !tbaa !4
   %mul5 = fmul double %i3, %i4, !fpmath !1
   store double %mul, ptr %e, align 8, !tbaa !4
   %carrayidx5 = getelementptr inbounds i8, ptr %e, i64 8
   store double %mul5, ptr %carrayidx5, align 8, !tbaa !4
   ret void
 }
 
-;CHECK-DAG: !4 = !{float 5.000000e+00}
-;CHECK-DAG: !5 = !{float 2.500000e+00}
 !0 = !{ float 5.0 }
 !1 = !{ float 2.5 }
 !2 = !{!"Simple C/C++ TBAA"}
 !3 = !{!"omnipotent char", !2}
 !4 = !{!"double", !3}
+;.
+; CHECK: attributes #[[ATTR0:[0-9]+]] = { "target-cpu"="corei7-avx" }
+;.
+; CHECK: [[TBAA0]] = !{[[META1:![0-9]+]], [[META1]], i64 0}
+; CHECK: [[META1]] = !{!"double", [[META2:![0-9]+]]}
+; CHECK: [[META2]] = !{!"omnipotent char", [[META3:![0-9]+]]}
+; CHECK: [[META3]] = !{!"Simple C/C++ TBAA"}
+; CHECK: [[META4]] = !{float 5.000000e+00}
+; CHECK: [[META5]] = !{float 2.500000e+00}
+;.