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Differential D152271

[GlobalIsel][X86] Legalize G_SELECT
AbandonedPublic

Authored by tschuett on Jun 6 2023, 7:24 AM.

Details

Reviewers
RKSimon
arsenm
Summary

arc issues again

Diff Detail

Unit TestsFailed

TimeTest
100 msx64 debian > LLVM.CodeGen/X86/GlobalISel::legalize-leading-zeros.mir
50 msx64 debian > LLVM.CodeGen/X86/GlobalISel::legalize-select.mir
120 msx64 debian > LLVM.CodeGen/X86/GlobalISel::legalize-trailing-zeros-undef.mir
120 msx64 debian > LLVM.CodeGen/X86/GlobalISel::legalize-trailing-zeros.mir

Event Timeline

tschuett created this revision.Jun 6 2023, 7:24 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 6 2023, 7:24 AM
Herald added subscribers: pengfei, hiraditya. · View Herald Transcript
tschuett requested review of this revision.Jun 6 2023, 7:24 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 6 2023, 7:24 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
tschuett mentioned this in D152266: [GlobalIsel][X86] Legalize G_SELECT.Jun 6 2023, 7:25 AM
tschuett added reviewers: RKSimon, arsenm.
Herald added a subscriber: wdng. · View Herald TranscriptJun 6 2023, 7:26 AM
Harbormaster completed remote builds in B236942: Diff 528854.Jun 6 2023, 8:18 AM
tschuett updated this revision to Diff 528893.Jun 6 2023, 8:57 AM

remove comments

Harbormaster completed remote builds in B236970: Diff 528893.Jun 6 2023, 8:58 AM
tschuett updated this revision to Diff 528895.Jun 6 2023, 8:59 AM

restore

Harbormaster completed remote builds in B236971: Diff 528895.Jun 6 2023, 9:00 AM
tschuett abandoned this revision.Jun 6 2023, 9:44 AM
RKSimon added a comment.Jun 6 2023, 10:28 AM

@tschuett I'd highly recommend you use the web interface instead of arc: https://reviews.llvm.org/differential/diff/create/

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
9 lines
test/
CodeGen/
X86/
GlobalISel/
13 lines
83 lines
22 lines
22 lines

Diff 528854

llvm/lib/Target/X86/X86LegalizerInfo.cpp

Show First 20 Lines • Show All 283 Lines • ▼ Show 20 Lines getActionDefinitionsBuilder({G_SEXT, G_ZEXT, G_ANYEXT})
(Query.Opcode == G_ANYEXT && Query.Types[0] == s128) || (Query.Opcode == G_ANYEXT && Query.Types[0] == s128) ||
(Is64Bit && Query.Types[0] == s64); (Is64Bit && Query.Types[0] == s64);
}) })
.widenScalarToNextPow2(0, /*Min=*/8) .widenScalarToNextPow2(0, /*Min=*/8)
.clampScalar(0, s8, sMaxScalar) .clampScalar(0, s8, sMaxScalar)
.widenScalarToNextPow2(1, /*Min=*/8) .widenScalarToNextPow2(1, /*Min=*/8)
.clampScalar(1, s8, sMaxScalar); .clampScalar(1, s8, sMaxScalar);
// todo: vectors
getActionDefinitionsBuilder(G_SELECT)
// .legalFor({{s8, s8}, {s16, s16}, {s32, s32}, {s64, s64}, {p0, p0}})
.legalFor({s8, s16, s32, s64, p0})
.widenScalarToNextPow2(0, /*Min=*/8)
.clampScalar(0, s8, sMaxScalar)
.widenScalarToNextPow2(1, /*Min=*/8)
.clampScalar(1, s8, sMaxScalar);
setLegalizerInfo32bit(); setLegalizerInfo32bit();
setLegalizerInfo64bit(); setLegalizerInfo64bit();
setLegalizerInfoSSE1(); setLegalizerInfoSSE1();
setLegalizerInfoSSE2(); setLegalizerInfoSSE2();
setLegalizerInfoAVX(); setLegalizerInfoAVX();
setLegalizerInfoAVX2(); setLegalizerInfoAVX2();
setLegalizerInfoAVX512(); setLegalizerInfoAVX512();
▲ Show 20 Lines • Show All 313 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
# RUN: llc -mtriple=i386-linux-gnu -mattr=+lzcnt -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86 # RUN: llc -mtriple=i386-linux-gnu -mattr=+lzcnt -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %13:_(s32), %14:_(s1) = G_USUBE %8:_, %10:_, %12:_ (in function: test_ctlz35)
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_SELECT %6:_(s1), %9:_, %10:_ (in function: test_ctlz64)
# test count leading zeros for s16, s32, and s64 # test count leading zeros for s16, s32, and s64
--- ---
name: test_ctlz35 name: test_ctlz35
alignment: 16 alignment: 16
legalized: false legalized: false
regBankSelected: false regBankSelected: false
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines bb.1:
; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64) ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32) ; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTLZ_ZERO_UNDEF]] ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64) ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_UNDEF]](s64)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[UV2]], [[UV4]]
; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s8) = G_ZEXT [[ICMP]](s1)
; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s8), [[UV3]], [[UV5]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
; X86-NEXT: RET 0, implicit [[COPY]](s64) ; X86-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF %0:_(s64) = IMPLICIT_DEF
%1:_(s64) = G_CTLZ %0 %1:_(s64) = G_CTLZ %0
%2:_(s64) = COPY %1(s64) %2:_(s64) = COPY %1(s64)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_ctlz32 name: test_ctlz32
Show All 38 Lines

llvm/test/CodeGen/X86/GlobalISel/legalize-select.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X86
# test select
...
---
name: test_selectp0
body: |
bb.1:
; CHECK-LABEL: name: test_selectp0
; CHECK: [[DEF:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[DEF]](s1), [[DEF1]], [[DEF2]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[SELECT]](p0)
; CHECK-NEXT: RET 0, implicit [[COPY]](p0)
%0:_(s1) = IMPLICIT_DEF
%1:_(p0) = IMPLICIT_DEF
%2:_(p0) = IMPLICIT_DEF
%3:_(p0) = G_SELECT %0, %1, %2
%4:_(p0) = COPY %3(p0)
RET 0, implicit %4
...
---
name: test_selects10
body: |
bb.1:
; CHECK-LABEL: name: test_selects10
; CHECK: [[DEF:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s10) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s10) = IMPLICIT_DEF
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[DEF1]](s10)
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[DEF2]](s10)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[DEF]](s1), [[ANYEXT]], [[ANYEXT1]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s10) = G_TRUNC [[SELECT]](s16)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s10) = COPY [[TRUNC]](s10)
; CHECK-NEXT: RET 0, implicit [[COPY]](s10)
%0:_(s1) = IMPLICIT_DEF
%1:_(s10) = IMPLICIT_DEF
%2:_(s10) = IMPLICIT_DEF
%3:_(s10) = G_SELECT %0, %1, %2
%4:_(s10) = COPY %3(s10)
RET 0, implicit %4
...
---
name: test_select32
body: |
bb.1:
; CHECK-LABEL: name: test_select32
; CHECK: [[DEF:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s32) = IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[DEF]](s1), [[DEF1]], [[DEF2]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; CHECK-NEXT: RET 0, implicit [[COPY]](s32)
%0:_(s1) = IMPLICIT_DEF
%1:_(s32) = IMPLICIT_DEF
%2:_(s32) = IMPLICIT_DEF
%3:_(s32) = G_SELECT %0, %1, %2
%4:_(s32) = COPY %3(s32)
RET 0, implicit %4
...
---
name: test_select16
body: |
bb.1:
; CHECK-LABEL: name: test_select16
; CHECK: [[DEF:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s16) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s16) = IMPLICIT_DEF
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[DEF]](s1), [[DEF1]], [[DEF2]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[SELECT]](s16)
; CHECK-NEXT: RET 0, implicit [[COPY]](s16)
%0:_(s1) = IMPLICIT_DEF
%1:_(s16) = IMPLICIT_DEF
%2:_(s16) = IMPLICIT_DEF
%3:_(s16) = G_SELECT %0, %1, %2
%4:_(s16) = COPY %3(s16)
RET 0, implicit %4

llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86 # RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %4:_(s64) = G_SELECT %8:_(s1), %11:_, %12:_ (in function: test_cttz35)
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_SELECT %6:_(s1), %9:_, %10:_ (in function: test_cttz64)
# test count leading zeros for s16, s32, and s64 # test count leading zeros for s16, s32, and s64
--- ---
name: test_cttz35 name: test_cttz35
alignment: 16 alignment: 16
legalized: false legalized: false
regBankSelected: false regBankSelected: false
Show All 14 Lines bb.1:
; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[DEF]](s35) ; X86-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[DEF]](s35)
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ANYEXT]](s64) ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ANYEXT]](s64)
; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]] ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SELECT]](s64) ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTTZ_ZERO_UNDEF1]](s64)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[UV2]], [[UV4]]
; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s8) = G_ZEXT [[ICMP]](s1)
; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s8), [[UV3]], [[UV5]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[MV]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; X86-NEXT: RET 0, implicit [[COPY]](s35) ; X86-NEXT: RET 0, implicit [[COPY]](s35)
%0:_(s35) = IMPLICIT_DEF %0:_(s35) = IMPLICIT_DEF
%1:_(s35) = G_CTTZ_ZERO_UNDEF %0 %1:_(s35) = G_CTTZ_ZERO_UNDEF %0
%2:_(s35) = COPY %1(s35) %2:_(s35) = COPY %1(s35)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
Show All 37 Lines bb.1:
; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64) ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]] ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64) ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTTZ_ZERO_UNDEF1]](s64)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[UV2]], [[UV4]]
; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s8) = G_ZEXT [[ICMP]](s1)
; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s8), [[UV3]], [[UV5]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
; X86-NEXT: RET 0, implicit [[COPY]](s64) ; X86-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF %0:_(s64) = IMPLICIT_DEF
%1:_(s64) = G_CTTZ_ZERO_UNDEF %0 %1:_(s64) = G_CTTZ_ZERO_UNDEF %0
%2:_(s64) = COPY %1(s64) %2:_(s64) = COPY %1(s64)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_cttz32 name: test_cttz32
Show All 38 Lines

llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+bmi -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+bmi -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
# RUN: llc -mtriple=i386-linux-gnu -mattr=+bmi -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86 # RUN: llc -mtriple=i386-linux-gnu -mattr=+bmi -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %6:_(s64) = G_SELECT %10:_(s1), %13:_, %14:_ (in function: test_cttz35)
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_SELECT %6:_(s1), %9:_, %10:_ (in function: test_cttz64)
# test count leading zeros for s16, s32, and s64 # test count leading zeros for s16, s32, and s64
--- ---
name: test_cttz35 name: test_cttz35
alignment: 16 alignment: 16
legalized: false legalized: false
regBankSelected: false regBankSelected: false
Show All 18 Lines bb.1:
; X86-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ANYEXT]], [[C]] ; X86-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ANYEXT]], [[C]]
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[OR]](s64) ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[OR]](s64)
; X86-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; X86-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C1]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C2]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C2]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]] ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SELECT]](s64) ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTTZ_ZERO_UNDEF1]](s64)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[UV2]], [[UV4]]
; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s8) = G_ZEXT [[ICMP]](s1)
; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s8), [[UV3]], [[UV5]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[MV]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; X86-NEXT: RET 0, implicit [[COPY]](s35) ; X86-NEXT: RET 0, implicit [[COPY]](s35)
%0:_(s35) = IMPLICIT_DEF %0:_(s35) = IMPLICIT_DEF
%1:_(s35) = G_CTTZ %0 %1:_(s35) = G_CTTZ %0
%2:_(s35) = COPY %1(s35) %2:_(s35) = COPY %1(s35)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
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; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64) ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ:%[0-9]+]]:_(s64) = G_CTTZ [[UV1]](s32) ; X86-NEXT: [[CTTZ:%[0-9]+]]:_(s64) = G_CTTZ [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ]], [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF]] ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64) ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTTZ_ZERO_UNDEF]](s64)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s1), [[UV2]], [[UV4]]
; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s8) = G_ZEXT [[ICMP]](s1)
; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s8), [[UV3]], [[UV5]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
; X86-NEXT: RET 0, implicit [[COPY]](s64) ; X86-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF %0:_(s64) = IMPLICIT_DEF
%1:_(s64) = G_CTTZ %0 %1:_(s64) = G_CTTZ %0
%2:_(s64) = COPY %1(s64) %2:_(s64) = COPY %1(s64)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_cttz32 name: test_cttz32
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