[JITLink][AArch64] Implement R_AARCH64_ADR_PREL_LO21

[jobnoorman]

Summary

This relocation is used for the 21-bit immediate in ADR instructions.

[jobnoorman]

Fix typo

[jobnoorman]

Friendly ping.

[lhames]

LGTM. Thanks @jobnoorman!

llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h

enum EdgeKind_aarch64 : Edge::Kind {
   ///
   /// Errors:
   ///   - The result of the unshifted part of the fixup expression must be
   ///     32-bit aligned otherwise an alignment error will be returned.
   ///   - The result of the fixup expression must fit into an an int19 or an
   ///     out-of-range error will be returned.
   LDRLiteral19,
 
+  /// The signed 21-bit delta from the fixup to the target.
+  ///
+  /// Fixup expression:
+  ///
+  ///   Fixup <- Target - Fixup + Addend : int21
+  ///
+  /// Notes:
+  ///   For ADR fixups.
+  ///
+  /// Errors:
+  ///   - The result of the fixup expression must fit into an int21 otherwise an
+  ///     out-of-range error will be returned.
+  ADRLiteral21,
+
   /// The signed 21-bit delta from the fixup page to the page containing the
   /// target.
   ///
   /// Fixup expression:
   ///
   ///   Fixup <- (((Target + Addend) & ~0xfff) - (Fixup & ~0xfff)) >> 12 : int21
   ///
   /// Notes:
inline bool isCondBranchImm19(uint32_t Instr) {
   return (Instr & CondBranchImm19Mask) == 0x54000000;
 }
 
 inline bool isCompAndBranchImm19(uint32_t Instr) {
   constexpr uint32_t CompAndBranchImm19Mask = 0x7e000000;
   return (Instr & CompAndBranchImm19Mask) == 0x34000000;
 }
 
+inline bool isADR(uint32_t Instr) {
+  constexpr uint32_t ADRMask = 0x9f000000;
+  return (Instr & ADRMask) == 0x10000000;
+}
+
 // Returns the amount the address operand of LD/ST (imm12)
 // should be shifted right by.
 //
 // The shift value varies by the data size of LD/ST instruction.
 // For instance, LDH instructoin needs the address to be shifted
 // right by 1.
 inline unsigned getPageOffset12Shift(uint32_t Instr) {
   constexpr uint32_t Vec128Mask = 0x04800000;
case LDRLiteral19: {
     if (Delta < -(1 << 20) || Delta > ((1 << 20) - 1))
       return makeTargetOutOfRangeError(G, B, E);
 
     uint32_t EncodedImm = ((static_cast<uint32_t>(Delta) >> 2) & 0x7ffff) << 5;
     uint32_t FixedInstr = RawInstr | EncodedImm;
     *(ulittle32_t *)FixupPtr = FixedInstr;
     break;
   }
+  case ADRLiteral21: {
+    assert((FixupAddress.getValue() & 0x3) == 0 && "ADR is not 32-bit aligned");
+    uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
+    assert(isADR(RawInstr) && "RawInstr is not an ADR");
+    int64_t Delta = E.getTarget().getAddress() + E.getAddend() - FixupAddress;
+    if (!isInt<21>(Delta))
+      return makeTargetOutOfRangeError(G, B, E);
+    auto UDelta = static_cast<uint32_t>(Delta);
+    uint32_t EncodedImmHi = ((UDelta >> 2) & 0x7ffff) << 5;
+    uint32_t EncodedImmLo = (UDelta & 0x3) << 29;
+    uint32_t FixedInstr = RawInstr | EncodedImmHi | EncodedImmLo;
+    *(ulittle32_t *)FixupPtr = FixedInstr;
+    break;
+  }
   case TestAndBranch14PCRel: {
     assert((FixupAddress.getValue() & 0x3) == 0 &&
            "Test and branch is not 32-bit aligned");
     uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
     assert(isTestAndBranchImm14(RawInstr) &&
            "RawInstr is not a test and branch");
     int64_t Delta = E.getTarget().getAddress() + E.getAddend() - FixupAddress;
     if (Delta & 0x3)

llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp

private:
   }
 };
 
 template <typename ELFT>
 class ELFLinkGraphBuilder_aarch64 : public ELFLinkGraphBuilder<ELFT> {
 private:
   enum ELFAArch64RelocationKind : Edge::Kind {
     ELFCall26 = Edge::FirstRelocation,
+    ELFAdrLo21,
     ELFAdrPage21,
     ELFAddAbs12,
     ELFLdSt8Abs12,
     ELFLdSt16Abs12,
     ELFLdSt32Abs12,
     ELFLdSt64Abs12,
     ELFLdSt128Abs12,
     ELFMovwAbsG0,
private:
 
   static Expected<ELFAArch64RelocationKind>
   getRelocationKind(const uint32_t Type) {
     using namespace aarch64;
     switch (Type) {
     case ELF::R_AARCH64_CALL26:
     case ELF::R_AARCH64_JUMP26:
       return ELFCall26;
+    case ELF::R_AARCH64_ADR_PREL_LO21:
+      return ELFAdrLo21;
     case ELF::R_AARCH64_ADR_PREL_PG_HI21:
       return ELFAdrPage21;
     case ELF::R_AARCH64_ADD_ABS_LO12_NC:
       return ELFAddAbs12;
     case ELF::R_AARCH64_LDST8_ABS_LO12_NC:
       return ELFLdSt8Abs12;
     case ELF::R_AARCH64_LDST16_ABS_LO12_NC:
       return ELFLdSt16Abs12;
Error addSingleRelocation(const typename ELFT::Rela &Rel,
 
     Edge::Kind Kind = Edge::Invalid;
 
     switch (*RelocKind) {
     case ELFCall26: {
       Kind = aarch64::Branch26PCRel;
       break;
     }
+    case ELFAdrLo21: {
+      uint32_t Instr = *(const ulittle32_t *)FixupContent;
+      if (!aarch64::isADR(Instr))
+        return make_error<JITLinkError>(
+            "R_AARCH64_ADR_PREL_LO21 target is not an ADR instruction");
+
+      Kind = aarch64::ADRLiteral21;
+      break;
+    }
     case ELFAdrPage21: {
       Kind = aarch64::Page21;
       break;
     }
     case ELFAddAbs12: {
       Kind = aarch64::PageOffset12;
       break;
     }

llvm/lib/ExecutionEngine/JITLink/aarch64.cpp

const char *getEdgeKindName(Edge::Kind R) {
   case MoveWide16:
     return "MoveWide16";
   case LDRLiteral19:
     return "LDRLiteral19";
   case TestAndBranch14PCRel:
     return "TestAndBranch14PCRel";
   case CondBranch19PCRel:
     return "CondBranch19PCRel";
+  case ADRLiteral21:
+    return "ADRLiteral21";
   case Page21:
     return "Page21";
   case PageOffset12:
     return "PageOffset12";
   case RequestGOTAndTransformToPage21:
     return "RequestGOTAndTransformToPage21";
   case RequestGOTAndTransformToPageOffset12:
     return "RequestGOTAndTransformToPageOffset12";

llvm/test/ExecutionEngine/JITLink/AArch64/ELF_relocations.s

local_func_call26:
         .size   local_func_call26, .-local_func_call26
 
         .globl  local_func_jump26
         .p2align  2
 local_func_jump26:
         b local_func
         .size   local_func_jump26, .-local_func_jump26
 
+# Check R_AARCH64_ADR_PREL_LO21 relocation of a local symbol
+#
+# jitlink-check: decode_operand(test_adr_prel_lo21, 1) = (adr_data - test_adr_prel_lo21)[20:0]
+        .globl  test_adr_prel_lo21, adr_data
+        .p2align  2
+test_adr_prel_lo21:
+        adr x0, adr_data
+        .size test_adr_prel_lo21, .-test_adr_prel_lo21
+## ADR encoding is a bit tricky so use an offset with an irregular bit pattern
+## to test this bit better
+adr_data = test_adr_prel_lo21 + 0xe46f2
+
 # Check R_AARCH64_ADR_PREL_PG_HI21 / R_AARCH64_ADD_ABS_LO12_NC relocation of a local symbol
 #
 # For the ADR_PREL_PG_HI21/ADRP instruction we have the 21-bit delta to the 4k page
 # containing the global.
 #
 # jitlink-check: decode_operand(test_adr_prel, 1) = (named_data - test_adr_prel)[32:12]
 # jitlink-check: decode_operand(test_add_abs_lo12, 2) = (named_data + 0)[11:0]
         .globl  test_adr_prel