[AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)

[barannikov88]

Summary

D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

[foad]

D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

OK. I had been wondering if it made sense to treat 0 as a kind of empty register, i.e. no regunits, no subregs, no aliases, (not sure about superregs). But if the existing code did not allow you to iterate its regunits then I think it's pretty clear that this was not the intended design.

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

568

@arsenm will ask you to "De Morgan" this :)

[barannikov88]

Apply the suggestion and rebase on top of 8e16365c to get a green mark

[barannikov88]

In D151289#4367115, @foad wrote:

D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

OK. I had been wondering if it made sense to treat 0 as a kind of empty register, i.e. no regunits, no subregs, no aliases, (not sure about superregs). But if the existing code did not allow you to iterate its regunits then I think it's pretty clear that this was not the intended design.

I found only a few cases where this caused problems so far (see the stack). There may be more hidden, but overall I think this change is in the right direction.
I wish there was a way to enumerate all registers without a for-loop like for (i = 0( or 1?), e = TRI->getNumRegs(); i != e; ++i), this would halven the number of issues.

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

Register SIFrameLowering::getEntryFunctionReservedScratchRsrcReg(
   // Skip the last N reserved elements because they should have already been
   // reserved for VCC etc.
   Register GITPtrLoReg = MFI->getGITPtrLoReg(MF);
   for (MCPhysReg Reg : AllSGPR128s) {
     // Pick the first unallocated one. Make sure we don't clobber the other
     // reserved input we needed. Also for PAL, make sure we don't clobber
     // the GIT pointer passed in SGPR0 or SGPR8.
     if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
-        !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+        (!GITPtrLoReg || !TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
       MRI.replaceRegWith(ScratchRsrcReg, Reg);
       MFI->setScratchRSrcReg(Reg);
       return Reg;
     }
   }
 
   return ScratchRsrcReg;
 }