[ValueTracking] Handle bitcasts between vec-int-ptr in `isKnownNonZero`

[goldstein.w.n]

Summary

We where missing these cases so something like:
(bitcast to i32 (or v216 x, <2, 1>))

would not be found to be non-zero.

[nikic]

This needs to be much more careful about bitcasts between different lane counts. For your scalar to vector example it's fine, because if each vector element is non-zero then the scalar is also non-zero. The converse, however, is not true.

[goldstein.w.n]

Fix correctness issue with casting for larger element type to smaller element type

[goldstein.w.n]

In D149409#4304609, @nikic wrote:

This needs to be much more careful about bitcasts between different lane counts. For your scalar to vector example it's fine, because if each vector element is non-zero then the scalar is also non-zero. The converse, however, is not true.

Done. Only do bitcast now if its from smaller scalar type -> larger scalar type.

[nikic]

llvm/lib/Analysis/ValueTracking.cpp

2775

I think this special case is subsumed by the code below, via isPtrOtPtrVectorTy.

2779

two -> to

2795

I don't think this condition is sufficient. Consider a bitcast from <4 x i3> to <3 x i4>. The new element size needs to be a multiple.

[goldstein.w.n]

Fix case where src element size is not multiple of dst element size

[goldstein.w.n]

llvm/lib/Analysis/ValueTracking.cpp

2795

Fixed + added test

[nikic]

LGTM

llvm/lib/Analysis/ValueTracking.cpp

2770

guranteed -> guaranteed

2776

I believe we can return false here now.

[goldstein.w.n]

llvm/lib/Analysis/ValueTracking.cpp

2776

Think it makes sense to let computeKnownBits run. More future proof and could help in some cases (i.e the <4xi3> -> <3xi4> is provable in some cases (lsb + msb set in all i3 elements) and computeKnownBits could (although granted doesn't at the moment) get that.

[nikic]

llvm/lib/Analysis/ValueTracking.cpp

2776

Okay, fair enough. We'll almost always take this code path anyway.

[goldstein.w.n]

Rebase

llvm/lib/Analysis/ValueTracking.cpp

if (!I)
     return false;
 
   unsigned BitWidth = getBitWidth(V->getType()->getScalarType(), Q.DL);
   switch (I->getOpcode()) {
   case Instruction::GetElementPtr:
     if (I->getType()->isPointerTy())
       return isGEPKnownNonNull(cast<GEPOperator>(I), Depth, Q);
     break;
-  case Instruction::BitCast:
-    if (I->getType()->isPointerTy())
+  case Instruction::BitCast: {
+    // We need to be a bit careful here. We can only peek through the bitcast
+    // if the scalar size of elements in the operand are smaller than and a
+    // multiple of the size they are casting too. Take three cases:
+    //
+    // 1) Unsafe:
+    //        bitcast <2 x i16> %NonZero to <4 x i8>
+    //
+    //    %NonZero can have 2 non-zero i16 elements, but isKnownNonZero on a
+    //    <4 x i8> requires that all 4 i8 elements be non-zero which isn't
+    //    guranteed (imagine just sign bit set in the 2 i16 elements).
+    //
+    // 2) Unsafe:
+    //        bitcast <4 x i3> %NonZero to <3 x i4>
+    //
+    //    Even though the scalar size of the src (`i3`) is smaller than the
+    //    scalar size of the dst `i4`, because `i3` is not a multiple of `i4`
+    //    its possible for the `3 x i4` elements to be zero because there are
+    //    some elements in the destination that don't contain any full src
+    //    element.
+    //
+    // 3) Safe:
+    //        bitcast <4 x i8> %NonZero to <2 x i16>
+    //
+    //    This is always safe as non-zero in the 4 i8 elements implies
+    //    non-zero in the combination of any two adjacent ones. Since i8 is a
+    //    multiple of i16, each i16 is guranteed to have 2 full i8 elements.
+    //    This all implies the 2 i16 elements are non-zero.
+    Type *FromTy = I->getOperand(0)->getType();
+    if ((FromTy->isIntOrIntVectorTy() || FromTy->isPtrOrPtrVectorTy()) &&
+        (BitWidth % getBitWidth(FromTy->getScalarType(), Q.DL)) == 0)
       return isKnownNonZero(I->getOperand(0), Depth, Q);
-    break;
+  } break;
   case Instruction::IntToPtr:
     // Note that we have to take special care to avoid looking through
     // truncating casts, e.g., int2ptr/ptr2int with appropriate sizes, as well
     // as casts that can alter the value, e.g., AddrSpaceCasts.
     if (!isa<ScalableVectorType>(I->getType()) &&
         Q.DL.getTypeSizeInBits(I->getOperand(0)->getType()).getFixedValue() <=
             Q.DL.getTypeSizeInBits(I->getType()).getFixedValue())
       return isKnownNonZero(I->getOperand(0), Depth, Q);
     break;
   case Instruction::PtrToInt:
     // Similar to int2ptr above, we can look through ptr2int here if the cast
     // is a no-op or an extend and not a truncate.
     if (!isa<ScalableVectorType>(I->getType()) &&
         Q.DL.getTypeSizeInBits(I->getOperand(0)->getType()).getFixedValue() <=
             Q.DL.getTypeSizeInBits(I->getType()).getFixedValue())
       return isKnownNonZero(I->getOperand(0), Depth, Q);
     break;
   case Instruction::Sub:
     return isNonZeroSub(DemandedElts, Depth, Q, BitWidth, I->getOperand(0),
                         I->getOperand(1));
   case Instruction::Or:
     // X | Y != 0 if X != 0 or Y != 0.
     return isKnownNonZero(I->getOperand(0), DemandedElts, Depth, Q) ||
            isKnownNonZero(I->getOperand(1), DemandedElts, Depth, Q);
   case Instruction::SExt:
   case Instruction::ZExt:
     // ext X != 0 if X != 0.

llvm/test/Analysis/ValueTracking/known-non-zero.ll

;
   %v = tail call i8 @llvm.fshl.i8(i8 %x, i8 %w, i8 %y)
   %or = or i8 %v, %z
   %r = icmp eq i8 %or, 0
   ret i1 %r
 }
 
 define i1 @bitcast_nonzero(<2 x i8> %xx, i16 %ind) {
 ; CHECK-LABEL: @bitcast_nonzero(
-; CHECK-NEXT:    [[XA:%.*]] = add nuw nsw <2 x i8> [[XX:%.*]], <i8 1, i8 1>
-; CHECK-NEXT:    [[X:%.*]] = bitcast <2 x i8> [[XA]] to i16
-; CHECK-NEXT:    [[Z:%.*]] = or i16 [[X]], [[IND:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq i16 [[Z]], 0
-; CHECK-NEXT:    ret i1 [[R]]
+; CHECK-NEXT:    ret i1 false
 ;
   %xa = add nuw nsw <2 x i8> %xx, <i8 1, i8 1>
   %x = bitcast <2 x i8> %xa to i16
   %z = or i16 %x, %ind
   %r = icmp eq i16 %z, 0
   ret i1 %r
 }
 
;
   %x = bitcast i16 %xa to <2 x i8>
   %z = or <2 x i8> %x, %ind
   %r = icmp eq <2 x i8> %z, zeroinitializer
   ret <2 x i1> %r
 }
 
 define <2 x i1> @bitcast_veci8_to_veci16(<4 x i8> %xx, <2 x i16> %ind) {
 ; CHECK-LABEL: @bitcast_veci8_to_veci16(
-; CHECK-NEXT:    [[XA:%.*]] = add nuw nsw <4 x i8> [[XX:%.*]], <i8 1, i8 1, i8 1, i8 1>
-; CHECK-NEXT:    [[X:%.*]] = bitcast <4 x i8> [[XA]] to <2 x i16>
-; CHECK-NEXT:    [[Z:%.*]] = or <2 x i16> [[X]], [[IND:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp eq <2 x i16> [[Z]], zeroinitializer
-; CHECK-NEXT:    ret <2 x i1> [[R]]
+; CHECK-NEXT:    ret <2 x i1> zeroinitializer
 ;
   %xa = add nuw nsw <4 x i8> %xx, <i8 1, i8 1, i8 1, i8 1>
   %x = bitcast <4 x i8> %xa to <2 x i16>
   %z = or <2 x i16> %x, %ind
   %r = icmp eq <2 x i16> %z, zeroinitializer
   ret <2 x i1> %r
 }