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Differential D148241

[VP] Mark llvm.vp.copysign as a binary op
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Authored by luke on Apr 13 2023, 8:51 AM.

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Reviewers
fakepaper56
eopXD
craig.topper
Commits
rGcdb776344188: [VP] Mark llvm.vp.copysign as a binary op
Summary

I was working on legalising vector binary ops to their VP counterparts when I noticed that vp_copysign wasn't marked as a binary op. It looks like this might have been an oversight, so this marks it as one.

Diff Detail

Event Timeline

luke created this revision.Apr 13 2023, 8:51 AM
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luke requested review of this revision.Apr 13 2023, 8:51 AM
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luke edited the summary of this revision. (Show Details)Apr 13 2023, 8:53 AM
luke retitled this revision from [VP][RISCV] Mark llvm.vp.copysign as a binary op to [VP] Mark llvm.vp.copysign as a binary op.
luke updated this revision to Diff 513266.Apr 13 2023, 8:54 AM

Remove extraneous RISCV tag in commit message

craig.topper accepted this revision.Apr 13 2023, 9:53 AM

LGTM

This revision is now accepted and ready to land.Apr 13 2023, 9:53 AM
Harbormaster completed remote builds in B225376: Diff 513266.Apr 13 2023, 10:40 AM
This revision was landed with ongoing or failed builds.Apr 14 2023, 5:53 AM
Closed by commit rGcdb776344188: [VP] Mark llvm.vp.copysign as a binary op (authored by luke). · Explain Why
This revision was automatically updated to reflect the committed changes.
luke added a commit: rGcdb776344188: [VP] Mark llvm.vp.copysign as a binary op.

Revision Contents

PathSize
llvm/
include/
llvm/
IR/
1 line

Diff 513557

llvm/include/llvm/IR/VPIntrinsics.def

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// llvm.vp.fmuladd(x,y,z,mask,vlen) // llvm.vp.fmuladd(x,y,z,mask,vlen)
BEGIN_REGISTER_VP(vp_fmuladd, 3, 4, VP_FMULADD, -1) BEGIN_REGISTER_VP(vp_fmuladd, 3, 4, VP_FMULADD, -1)
VP_PROPERTY_CONSTRAINEDFP(1, 1, experimental_constrained_fmuladd) VP_PROPERTY_CONSTRAINEDFP(1, 1, experimental_constrained_fmuladd)
END_REGISTER_VP(vp_fmuladd, VP_FMULADD) END_REGISTER_VP(vp_fmuladd, VP_FMULADD)
// llvm.vp.copysign(x,y,mask,vlen) // llvm.vp.copysign(x,y,mask,vlen)
BEGIN_REGISTER_VP(vp_copysign, 2, 3, VP_FCOPYSIGN, -1) BEGIN_REGISTER_VP(vp_copysign, 2, 3, VP_FCOPYSIGN, -1)
VP_PROPERTY_BINARYOP
END_REGISTER_VP(vp_copysign, VP_FCOPYSIGN) END_REGISTER_VP(vp_copysign, VP_FCOPYSIGN)
// llvm.vp.minnum(x, y, mask,vlen) // llvm.vp.minnum(x, y, mask,vlen)
BEGIN_REGISTER_VP(vp_minnum, 2, 3, VP_FMINNUM, -1) BEGIN_REGISTER_VP(vp_minnum, 2, 3, VP_FMINNUM, -1)
VP_PROPERTY_BINARYOP VP_PROPERTY_BINARYOP
END_REGISTER_VP(vp_minnum, VP_FMINNUM) END_REGISTER_VP(vp_minnum, VP_FMINNUM)
// llvm.vp.maxnum(x, y, mask,vlen) // llvm.vp.maxnum(x, y, mask,vlen)
▲ Show 20 Lines • Show All 311 Lines • Show Last 20 Lines