This is an archive of the discontinued LLVM Phabricator instance.

[AMDGPU] Don't S_MOV_B32 into $scc
ClosedPublic

Authored by rovka on Apr 12 2023, 4:50 AM.

Details

Reviewers
Petar.Avramovic
arsenm
Group Reviewers
Restricted Project
Commits
rGb9ba05360e58: [AMDGPU] Don't S_MOV_B32 into $scc
Summary

The peephole optimizer tries to replace

%n:sgpr_32 = S_MOV_B32 x
$scc = COPY %n

with a S_MOV_B32 directly into $scc.

This crashes because S_MOV_B32 cannot take $scc as input.

We currently generate code like this from GlobalISel when lowering a
G_BRCOND with a constant condition. We should probably look into
removing this kind of branch altogether, but until then we should at
least not crash.

This patch fixes the issue by making sure we don't apply the peephole
optimization when trying to S_MOV_B32 into a physical register that
doesn't have the SReg_32 register class.

Diff Detail

Event Timeline

rovka created this revision.Apr 12 2023, 4:50 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 12 2023, 4:50 AM
rovka requested review of this revision.Apr 12 2023, 4:50 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 12 2023, 4:50 AM
rovka added reviewers: Petar.Avramovic, Restricted Project.Apr 12 2023, 4:52 AM
arsenm accepted this revision.Apr 12 2023, 4:55 AM
arsenm added inline comments.
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
3093–3094

Can check if the virtual register's class doesn't contain the physical register, don't need to hardcode the opcode/ class

This revision is now accepted and ready to land.Apr 12 2023, 4:55 AM
rovka updated this revision to Diff 512810.Apr 12 2023, 6:28 AM

Addressed the comment. Thanks for the quick review!

This revision was landed with ongoing or failed builds.Apr 14 2023, 1:25 AM
This revision was automatically updated to reflect the committed changes.