This is an archive of the discontinued LLVM Phabricator instance.

[ARM] Fix VMOVSR pattern requirements
ClosedPublic

Authored by miyuki on Apr 4 2023, 5:30 AM.

Details

Summary

The required target features for VMOVSR instruction (integer -> MVE
FP register copy) are HasFPRegs and UseVMOVSR (see
https://reviews.llvm.org/D60694).

The instruction selection pattern must use the same set of
requirements (i.e., HasFPRegs instead of HasVFP2). The discrepancy
can cause instruction selection failure when compiling code for
execute-only position-independence mode.

Diff Detail

Unit TestsFailed

Event Timeline

miyuki created this revision.Apr 4 2023, 5:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 4 2023, 5:30 AM
miyuki requested review of this revision.Apr 4 2023, 5:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptApr 4 2023, 5:30 AM

It looks like there is only one place where the VMOVSR is created, with execute-only. Can you use this as a test case: https://godbolt.org/z/zbhqr38xP.

miyuki updated this revision to Diff 510800.Apr 4 2023, 7:40 AM
miyuki edited the summary of this revision. (Show Details)

Sorry, I didn't realize that we have execute-only in upstream LLVM.

dmgreen accepted this revision.Apr 4 2023, 7:49 AM

Thanks. LGTM

This revision is now accepted and ready to land.Apr 4 2023, 7:49 AM
This revision was automatically updated to reflect the committed changes.