Move DBG_VALUE's that depend on loads to after a load if the load is moved due to the pre register allocation ld/st optimization pass

[rastogishubham]

Summary

The issue here is that there can be a scenario where debug information is lost because of the pre register allocation load store optimization pass, where a load who's result describes the debug infomation for a local variable gets moved below the load and that causes the debug information for that load to get lost.

Example:

Before the Pre Register Allocation Load Store Pass
inst_a
%2 = ld ...
inst_b
DBG_VALUE %2, "x", ...
%3 = ld ...

After the Pass:
inst_a
inst_b
DBG_VALUE %2, "x", ...
%2 = ld ...
%3 = ld ...

The load has now been moved to after the DBG_VAL that uses its result and the debug info for "x" has been lost. What we want is:

inst_a
inst_b
%2 = ld ...
DBG_VALUE %2, "x", ...
%3 = ld ...

Which is what this patch addresses

[aprantl]

Nice! I appreciate the detailed explanation of the algorithm. I have some suggestions for how to streamline it a bit and potentially make it easier to read inside.

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2633

typo: DBG_VALUEs (makes grepping easier)

2637

Maybe the entire sentence could be compressed to:

When a load is sunk beyond a DBG_VALUE that is referring to it, the reference to the load in the DBG_VALUE becomes undef, resulting in a loss of debug info.
Example:

2650

// DBG_VALUE undef, "x"

2653

The code below addresses this by moving the DBG_VALUE to the position immediately after the load. Example:

2667

I would move the block detailing the maps until after introducing the general idea of the algorithm, otherwise the reader won't know what problem they're solving. It might be good to very briefly outline the idea first before diving into the implementation. I.e., what are the condition the algorithm is checking for, what is it trying to avoid and why.

2674

maybe put these comments next to the variable declarations?

2681

There's a bunch of filler words that can be dropped without loosing any contents:

The algorithm works in two phases: First RescheduleOps() populates RegisterMap with the registers that were moved.

(Q: The wording is curious because it's loads that define registers that are being moved, maybe we can integrate this)

2686

Can you clarify "we can move forward"?

2686

If the first operand of the DBG_VAL ...
Could we also handle the variadic DBG_VALUE_LIST instructions?

2803

Might consider a SmallDenseMap<8> for better performance in the average case.
If you want to be really scientific about it you could compile a large file with optimizations and print the LocalVarMap.size() at the end of the function and then see if there is a sweet spot of small element size (<16) based on that data. But using 8 is fine, too!

2803

Would a name like DbgValueSinkCandidates be more descriptive? (Not sure if that captures the semantics perfectly).

2804

Same here.

2807

Are there isDebugInstr() that are not isDebugValueLike()?

2818

micro optimization: you're looking up Op.getReg twice here.

auto RegMapEntry = RegisterMap.find(Op.getReg())
if (Op.isReg() && RegMapEntry != RegisterMap.end()) {

RegMapEntry = &MI;

2821

Maybe focus on the high level goal in the documentation here:

If the current DBG_VALUE describes the same variable as one of the in-flight DBG_VALUEs, remove the candidate from the list and set it to undef. Moving one DBG_VALUE past another would result in the variable's value going back in time when stepping through the block in the debugger.

[aprantl]

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2828

double lookup

2830

as you already commented: double lookup

2844

!RegisterMap[Reg]
but also, double lookup

2850

Is this safe? Aren't we going to visit the instruction we just inserted next? I'm not sure how the semantics of the iterator are defined if inserting on the fly.

llvm/test/DebugInfo/ARM/move-dbg-values.mir

5

Nice. Looks like this covers all of the interesting cases?

70

You might be able to simplify the IR here, by just making up new variables with basic types and dropping most of the unnecessary debug info.

[jmorse]

This is a good improvement, many thanks for working in this area. The overall approach is good, I've got a couple of high level comments:

• I believe you'll need to erase elements from LocalVarMap once a DBG_VALUE is sunk -- if a later, unrelated DBG_VALUE for the same variable is encountered in the same block, then there's no need terminate the earlier sunk DBG_VALUE,
• You should use the DebugVariable class to identify variables, as that combines inlining and fragment information into a single object. Using just DILocalVariable risks duplicate instances of the same variable from different inlining contexts being merged.

Finally, I think that rather than just sinking the DBG_VALUE that used to refer to a load, it might be more correct to duplicate the DBG_VALUE to below the load, and mark the old one as undef/$noreg. Consider:

%0 = load, !dbg !0
DBG_VALUE %0
%1 = foo, !dbg !1
%2 = bar, !dbg !2
%3 = baz, !dbg !3

If we sink the load to below baz, and sink the DBG_VALUE too, we get:

%1 = foo, !dbg !1
%2 = bar, !dbg !2
%3 = baz, !dbg !3
%0 = load, !dbg !0
DBG_VALUE %0

Which means that whatever value the variable used to have at the start of the block extends over the "foo", "bar" and "baz" instructions, which risks giving a misleading variable value on those line numbers. It might be better to produce:

DBG_VALUE $noreg
%1 = foo, !dbg !1
%2 = bar, !dbg !2
%3 = baz, !dbg !3
%0 = load, !dbg !0
DBG_VALUE %0

instead.

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2656–2657

IMHO, describing this as a "use-before-def" would indicate to the reader exactly why the debug-info is being lost after the pass.

2807

DBG_LABEL, I believe -- isDebugValueLike should be sufficient.

2810–2813

I think there are some tests out there that deliberately give an empty variable to test things like the the MIR parser. IMHO, asserting here is acceptable as any "real" DBG_VALUE must have a variable.

[rastogishubham]

Addressed all the comments in the review including documentation, adding support for DBG_VALUE_LIST and small bug fixes

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2650

This is what would happen if we didn't do what we are doing in the patch. The DBG_VALUE would remain untouched

2803

I think that name makes sense

2807

We do not need to move DBG_INSTR_REFS, so I am going to use

isDebugValue()

instead.

2810–2813

Unfortunately that is not the case, when I tried to build compiler-rt with this patch, the assert

assert(DbgVar)

tripped. There is something that is letting DBG_VALUEs have no variable in them slip. I will look into it in a future patch

2850

This is safe, the MBBI is incremented again in the for loop, and this is the end of the loop.

[aprantl]

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2499

nit: static inline is effectively equivalent to static and thus LLVM code usually uses static alone.

Given the ratio of the parameter list and the function body, maybe this makes more sense as a lambda anyway?

2543

What happens if more than one DBG_VALUE use the same register?

int x, y;
x = y = *p;

-->

r0 = load ...
DBG_VALUE r0, 0, "x"
DBG_VALUE r0, 0, "y"

2797

It looks like you use the same pattern of for_each_reg_operand_in_dbg_intrinsic 4 times. Maybe create

forEachDbgRegOperand(MachineInstruction *MI, std::function<void(unsigned)> Fn)

helper function so you can write

forEachDbgRegOperand(MI, [&](unsigned Reg) {
   populateRegisterAndInstrMapForDebugInstr(Reg, RegisterMap, InstrMap, &MI);
 });

?

2803

I think this can just be else with no condition.

2861

if (!isLoadSingle(Opc))

continue

?

[rastogishubham]

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2499

I am still not used to writing lambdas, so they don't come to mind as a first thing, but I think it makes a lot of sense here, I also replaced

undefDbgValueList

with a lambda

2543

Good testcase, I have addressed that issue now.

2797

This is a great suggestion, thank you. There are actually 6 places :)

2861

Ah yes, llvm likes its early exists, good catch.

[rastogishubham]

Addressed review feedback:

1. Added lambdas where necessary.

2. Added support for multiple DBG_VALUEs mapping to the same virtual register.

3. minor code formatting and style changes

[rastogishubham]

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2499

Actually, I just removed

undefDbgValueList

I can use

forEachDbgRegOperand

to do the same thing

[aprantl]

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2480

This comment doesn't really tell the reader much that isn't already there in the code.
Shorter version:

// Populate RegisterMap with all Registers defined by loads.

2519

Why aren't you using forEachDbgRegOperand() here?

2522

Commented out code.

2792

You're looking up Reg twice here.

auto &Entry = RegisterMap.find(Reg);
if (Entry != RegisterMap.end())
  Entry.push_back(&MI);

2826

auto &?

2831

does this loop get shorter if you implement it in terms of std::remove_if?

https://en.cppreference.com/w/cpp/algorithm/remove

2844

Maybe comment here what the else branch means, since it's far below from the condition.

2848

Would Instr->getOperand(i).setReg(0) work here and be shorter?

2884

This is the second time you use this pattern. Maybe add a constructor to DebugVariable that takes a MachineInstr as parameter, or a static DebugVariable::createFromDebugValue() method?

2890

Is it really necessary to look it up before erasing it, or can you call straight into erase, too?

[rastogishubham]

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2519

I missed this one

2826

Registers are just integers with helper functions, it doesn't matter either way, but sure

2831

It reduces it by 2 lines and for some reason it doesn't seem to work?

auto IsDbgVar = [&] (MachineInstr* I) -> bool {
              DebugVariable Var(I);
              return Var == DbgVar;
            };

            std::remove_if(InstrVec.begin(), InstrVec.end(), IsDbgVar);

Does that look right to you? It seems like remove_if doesn't work correctly with only one element?

2848

This will not work, the operand is an immediate and cannot be set to a $noreg by doing

setReg()

the opcode of the operands are different and the only way to change it is to create a new instruction with a $noreg opcode for the first operand and erase the old Instr.

setReg()

calls

getReg()

if the operand is an immediate that will assert

2890

Apparently not, when I do

DbgValueSinkCandidates.erase(DbgValueSinkCandidates.find(DbgVar));

or

auto DbgIt = DbgValueSinkCandidates.find(DbgVar);
DbgValueSinkCandidates.erase(DbgIt);

I get an assert

[rastogishubham]

Addressed review feedback

[rastogishubham]

Used std::remove_if

[aprantl]

I think I'm happy with how the code looks now, maybe wait a few days to see if @jmorse has any more comments.

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

2783

This might make it easier to see what this look is doing:

for (auto MBBI = MBB->begin(),  E = MBB->end(); MBBI != E; ++MBBI)

2848

Too bad. I would probably factor out a replaceOperand helper here to keep the main algorithm as readable as possible.

2873

You could combine these two lines as:

MachineBasicblock::iterator InsertPos = std::next(MBBI);

[rastogishubham]

Addressed changes suggest by Adrian when he accepted the review

[rastogishubham]

Added new lines to end of test files

[MaskRay]

llvm/include/llvm/IR/DebugInfoMetadata.h

23 ↗

(On Diff #512935)

There is a library layering issue https://llvm.org/docs/CodingStandards.html#library-layering

LLVMCore cannot use LLVMCodeGen headers :)

[MaskRay]

I spot this issue with

# curl -s https://raw.githubusercontent.com/chromium/chromium/main/tools/clang/scripts/update.py | python3 - --output-dir=~/Stable

cd utils/bazel
PATH=~/Stable/bin:$PATH bazel-5.0.0 build --config=generic_clang @llvm-project//llvm:opt

In file included from external/llvm-project/llvm/lib/IR/VectorBuilder.cpp:18:
In file included from external/llvm-project/llvm/include/llvm/IR/IntrinsicInst.h:27:
external/llvm-project/llvm/include/llvm/IR/DebugInfoMetadata.h:23:10: fatal error: 'llvm/CodeGen/MachineInstr.h' file not found
#include "llvm/CodeGen/MachineInstr.h"
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[rastogishubham]

llvm/include/llvm/IR/DebugInfoMetadata.h

23 ↗

(On Diff #512935)

Thank you for bringing that to my attention!

[rastogishubham]

Removed the include "llvm/CodeGen/MachineInstr.h" in DebugInfoMetadata.h

Added a new test to check to make sure that DBG_VALUEs that use an immediate are not zero-ed out if another DBG_VALUE is seen later

I created a static function

createDebugVariableFromMachineInstr

to create a DebugVariable, because I was not sure if I could add an include to DebugInfoMetadata.h in the MachineInstr.h file.

[aprantl]

llvm/test/DebugInfo/ARM/move-dbg-values.mir

69

How did we end up with these anonymous variables, and do we actually need any of them?

[rastogishubham]

Reduced the testcases by removing uncessary debug info

[rastogishubham]

Removed a bunch of DILocations that were essentially the same and could be folded into one

llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp

void getAnalysisUsage(AnalysisUsage &AU) const override {
       MachineFunctionPass::getAnalysisUsage(AU);
     }
 
   private:
     bool CanFormLdStDWord(MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl,
                           unsigned &NewOpc, Register &EvenReg, Register &OddReg,
                           Register &BaseReg, int &Offset, Register &PredReg,
                           ARMCC::CondCodes &Pred, bool &isT2);
-    bool RescheduleOps(MachineBasicBlock *MBB,
-                       SmallVectorImpl<MachineInstr *> &Ops,
-                       unsigned Base, bool isLd,
-                       DenseMap<MachineInstr*, unsigned> &MI2LocMap);
+    bool RescheduleOps(
+        MachineBasicBlock *MBB, SmallVectorImpl<MachineInstr *> &Ops,
+        unsigned Base, bool isLd, DenseMap<MachineInstr *, unsigned> &MI2LocMap,
+        SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> &RegisterMap);
     bool RescheduleLoadStoreInstrs(MachineBasicBlock *MBB);
     bool DistributeIncrements();
     bool DistributeIncrements(Register Base);
   };
 
 } // end anonymous namespace
 
 char ARMPreAllocLoadStoreOpt::ID = 0;
bool ARMPreAllocLoadStoreOpt::CanFormLdStDWord(
   if (FirstReg == SecondReg)
     return false;
   BaseReg = Op0->getOperand(1).getReg();
   Pred = getInstrPredicate(*Op0, PredReg);
   dl = Op0->getDebugLoc();
   return true;
 }
 
-bool ARMPreAllocLoadStoreOpt::RescheduleOps(MachineBasicBlock *MBB,
-                                 SmallVectorImpl<MachineInstr *> &Ops,
-                                 unsigned Base, bool isLd,
-                                 DenseMap<MachineInstr*, unsigned> &MI2LocMap) {
+bool ARMPreAllocLoadStoreOpt::RescheduleOps(
+    MachineBasicBlock *MBB, SmallVectorImpl<MachineInstr *> &Ops, unsigned Base,
+    bool isLd, DenseMap<MachineInstr *, unsigned> &MI2LocMap,
+    SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> &RegisterMap) {
   bool RetVal = false;
 
   // Sort by offset (in reverse order).
   llvm::sort(Ops, [](const MachineInstr *LHS, const MachineInstr *RHS) {
     int LOffset = getMemoryOpOffset(*LHS);
     int ROffset = getMemoryOpOffset(*RHS);
     assert(LHS == RHS || LOffset != ROffset);
     return LOffset > ROffset;
else {
           if (!isT2) {
             // Add register allocation hints to form register pairs.
             MRI->setRegAllocationHint(FirstReg, ARMRI::RegPairEven, SecondReg);
             MRI->setRegAllocationHint(SecondReg,  ARMRI::RegPairOdd, FirstReg);
           }
         } else {
           for (unsigned i = 0; i != NumMove; ++i) {
             MachineInstr *Op = Ops.pop_back_val();
+            if (isLd) {
+              // Populate RegisterMap with all Registers defined by loads.
+              Register Reg = Op->getOperand(0).getReg();
+              RegisterMap[Reg];
+            }
+
             MBB->splice(InsertPos, MBB, Op);
           }
         }
 
         NumLdStMoved += NumMove;
         RetVal = true;
       }
     }
   }
 
   return RetVal;
 }
 
+static void forEachDbgRegOperand(MachineInstr *MI,
+                                 std::function<void(MachineOperand &)> Fn) {
+  if (MI->isNonListDebugValue()) {
+    auto &Op = MI->getOperand(0);
+    if (Op.isReg())
+      Fn(Op);
+  } else {
+    for (unsigned I = 2; I < MI->getNumOperands(); I++) {
+      auto &Op = MI->getOperand(I);
+      if (Op.isReg())
+        Fn(Op);
+    }
+  }
+}
+
+// Update the RegisterMap with the instruction that was moved because a
+// DBG_VALUE_LIST may need to be moved again.
+static void updateRegisterMapForDbgValueListAfterMove(
+    SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> &RegisterMap,
+    MachineInstr *DbgValueListInstr, MachineInstr *InstrToReplace) {
+
+  forEachDbgRegOperand(DbgValueListInstr, [&](MachineOperand &Op) {
+    auto RegIt = RegisterMap.find(Op.getReg());
+    if (RegIt == RegisterMap.end())
+      return;
+    auto &InstrVec = RegIt->getSecond();
+    for (unsigned I = 0; I < InstrVec.size(); I++)
+      if (InstrVec[I] == InstrToReplace)
+        InstrVec[I] = DbgValueListInstr;
+  });
+}
+
+static DebugVariable createDebugVariableFromMachineInstr(MachineInstr *MI) {
+  auto DbgVar = DebugVariable(MI->getDebugVariable(), MI->getDebugExpression(),
+                              MI->getDebugLoc()->getInlinedAt());
+  return DbgVar;
+}
+
 bool
 ARMPreAllocLoadStoreOpt::RescheduleLoadStoreInstrs(MachineBasicBlock *MBB) {
   bool RetVal = false;
 
   DenseMap<MachineInstr*, unsigned> MI2LocMap;
   using MapIt = DenseMap<unsigned, SmallVector<MachineInstr *, 4>>::iterator;
   using Base2InstMap = DenseMap<unsigned, SmallVector<MachineInstr *, 4>>;
   using BaseVec = SmallVector<unsigned, 4>;
   Base2InstMap Base2LdsMap;
   Base2InstMap Base2StsMap;
   BaseVec LdBases;
   BaseVec StBases;
+  // This map is used to track the relationship between the virtual
+  // register that is the result of a load that is moved and the DBG_VALUE
+  // MachineInstr pointer that uses that virtual register.
+  SmallDenseMap<Register, SmallVector<MachineInstr *>, 8> RegisterMap;
 
   unsigned Loc = 0;
   MachineBasicBlock::iterator MBBI = MBB->begin();
   MachineBasicBlock::iterator E = MBB->end();
   while (MBBI != E) {
     for (; MBBI != E; ++MBBI) {
       MachineInstr &MI = *MBBI;
       if (MI.isCall() || MI.isTerminator()) {
for (; MBBI != E; ++MBBI) {
       }
     }
 
     // Re-schedule loads.
     for (unsigned i = 0, e = LdBases.size(); i != e; ++i) {
       unsigned Base = LdBases[i];
       SmallVectorImpl<MachineInstr *> &Lds = Base2LdsMap[Base];
       if (Lds.size() > 1)
-        RetVal |= RescheduleOps(MBB, Lds, Base, true, MI2LocMap);
+        RetVal |= RescheduleOps(MBB, Lds, Base, true, MI2LocMap, RegisterMap);
     }
 
     // Re-schedule stores.
     for (unsigned i = 0, e = StBases.size(); i != e; ++i) {
       unsigned Base = StBases[i];
       SmallVectorImpl<MachineInstr *> &Sts = Base2StsMap[Base];
       if (Sts.size() > 1)
-        RetVal |= RescheduleOps(MBB, Sts, Base, false, MI2LocMap);
+        RetVal |= RescheduleOps(MBB, Sts, Base, false, MI2LocMap, RegisterMap);
     }
 
     if (MBBI != E) {
       Base2LdsMap.clear();
       Base2StsMap.clear();
       LdBases.clear();
       StBases.clear();
     }
   }
 
+  // Reschedule DBG_VALUEs to match any loads that were moved. When a load is
+  // sunk beyond a DBG_VALUE that is referring to it, the DBG_VALUE becomes a
+  // use-before-def, resulting in a loss of debug info.
+
+  // Example:
+  // Before the Pre Register Allocation Load Store Pass
+  // inst_a
+  // %2 = ld ...
+  // inst_b
+  // DBG_VALUE %2, "x", ...
+  // %3 = ld ...
+
+  // After the Pass:
+  // inst_a
+  // inst_b
+  // DBG_VALUE %2, "x", ...
+  // %2 = ld ...
+  // %3 = ld ...
+
+  // The code below addresses this by moving the DBG_VALUE to the position
+  // immediately after the load.
+
+  // Example:
+  // After the code below:
+  // inst_a
+  // inst_b
+  // %2 = ld ...
+  // DBG_VALUE %2, "x", ...
+  // %3 = ld ...
+
+  // The algorithm works in two phases: First RescheduleOps() populates the
+  // RegisterMap with registers that were moved as keys, there is no value
+  // inserted. In the next phase, every MachineInstr in a basic block is
+  // iterated over. If it is a valid DBG_VALUE or DBG_VALUE_LIST and it uses one
+  // or more registers in the RegisterMap, the RegisterMap and InstrMap are
+  // populated with the MachineInstr. If the DBG_VALUE or DBG_VALUE_LIST
+  // describes debug information for a variable that already exists in the
+  // DbgValueSinkCandidates, the MachineInstr in the DbgValueSinkCandidates must
+  // be set to undef. If the current MachineInstr is a load that was moved,
+  // undef the corresponding DBG_VALUE or DBG_VALUE_LIST and clone it to below
+  // the load.
+
+  // To illustrate the above algorithm visually let's take this example.
+
+  // Before the Pre Register Allocation Load Store Pass:
+  // %2 = ld ...
+  // DBG_VALUE %2, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // %3 = ld ...
+  // DBG_VALUE %3, A, ..., # Z
+  // %4 = ld ...
+
+  // After Pre Register Allocation Load Store Pass:
+  // DBG_VALUE %2, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE %3, A, ..., # Z
+  // %2 = ld ...
+  // %3 = ld ...
+  // %4 = ld ...
+
+  // The algorithm below does the following:
+
+  // In the beginning, the RegisterMap will have been populated with the virtual
+  // registers %2, and %3, the DbgValueSinkCandidates and the InstrMap will be
+  // empty. DbgValueSinkCandidates = {}, RegisterMap = {2 -> {}, 3 -> {}},
+  // InstrMap {}
+  // -> DBG_VALUE %2, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE %3, A, ..., # Z
+  // %2 = ld ...
+  // %3 = ld ...
+  // %4 = ld ...
+
+  // After the first DBG_VALUE (denoted with an X) is processed, the
+  // DbgValueSinkCandidates and InstrMap will be populated and the RegisterMap
+  // entry for %2 will be populated as well. DbgValueSinkCandidates = {A -> X},
+  // RegisterMap = {2 -> {X}, 3 -> {}}, InstrMap {X -> 2}
+  // DBG_VALUE %2, A, .... # X
+  // -> DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE %3, A, ..., # Z
+  // %2 = ld ...
+  // %3 = ld ...
+  // %4 = ld ...
+
+  // After the DBG_VALUE Y is processed, the DbgValueSinkCandidates is updated
+  // to now hold Y for A and the RegisterMap is also updated to remove X from
+  // %2, this is because both X and Y describe the same debug variable A. X is
+  // also updated to have a $noreg as the first operand.
+  // DbgValueSinkCandidates = {A -> {Y}}, RegisterMap = {2 -> {}, 3 -> {}},
+  // InstrMap = {X-> 2}
+  // DBG_VALUE $noreg, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // -> DBG_VALUE %3, A, ..., # Z
+  // %2 = ld ...
+  // %3 = ld ...
+  // %4 = ld ...
+
+  // After DBG_VALUE Z is processed, the DbgValueSinkCandidates is updated to
+  // hold Z fr A, the RegisterMap is updated to hold Z for %3, and the InstrMap
+  // is updated to have Z mapped to %3. This is again because Z describes the
+  // debug variable A, Y is not updated to have $noreg as first operand because
+  // its first operand is an immediate, not a register.
+  // DbgValueSinkCandidates = {A -> {Z}}, RegisterMap = {2 -> {}, 3 -> {Z}},
+  // InstrMap = {X -> 2, Z -> 3}
+  // DBG_VALUE $noreg, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE %3, A, ..., # Z
+  // -> %2 = ld ...
+  // %3 = ld ...
+  // %4 = ld ...
+
+  // Nothing happens here since the RegisterMap for %2 contains no value.
+  // DbgValueSinkCandidates = {A -> {Z}}, RegisterMap = {2 -> {}, 3 -> {Z}},
+  // InstrMap = {X -> 2, Z -> 3}
+  // DBG_VALUE $noreg, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE %3, A, ..., # Z
+  // %2 = ld ...
+  // -> %3 = ld ...
+  // %4 = ld ...
+
+  // Since the RegisterMap contains Z as a value for %3, the MachineInstr
+  // pointer Z is copied to come after the load for %3 and the old Z's first
+  // operand is changed to $noreg the Basic Block iterator is moved to after the
+  // DBG_VALUE Z's new position.
+  // DbgValueSinkCandidates = {A -> {Z}}, RegisterMap = {2 -> {}, 3 -> {Z}},
+  // InstrMap = {X -> 2, Z -> 3}
+  // DBG_VALUE $noreg, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE $noreg, A, ..., # Old Z
+  // %2 = ld ...
+  // %3 = ld ...
+  // DBG_VALUE %3, A, ..., # Z
+  // -> %4 = ld ...
+
+  // Nothing happens for %4 and the algorithm exits having processed the entire
+  // Basic Block.
+  // DbgValueSinkCandidates = {A -> {Z}}, RegisterMap = {2 -> {}, 3 -> {Z}},
+  // InstrMap = {X -> 2, Z -> 3}
+  // DBG_VALUE $noreg, A, .... # X
+  // DBG_VALUE 0, A, ... # Y
+  // DBG_VALUE $noreg, A, ..., # Old Z
+  // %2 = ld ...
+  // %3 = ld ...
+  // DBG_VALUE %3, A, ..., # Z
+  // %4 = ld ...
+
+  // This map is used to track the relationship between
+  // a Debug Variable and the DBG_VALUE MachineInstr pointer that describes the
+  // debug information for that Debug Variable.
+  SmallDenseMap<DebugVariable, MachineInstr *, 8> DbgValueSinkCandidates;
+  // This map is used to track the relationship between a DBG_VALUE or
+  // DBG_VALUE_LIST MachineInstr pointer and Registers that it uses.
+  SmallDenseMap<MachineInstr *, SmallVector<Register>, 8> InstrMap;
+  for (MBBI = MBB->begin(), E = MBB->end(); MBBI != E; ++MBBI) {
+    MachineInstr &MI = *MBBI;
+
+    auto PopulateRegisterAndInstrMapForDebugInstr = [&](Register Reg) {
+      auto RegIt = RegisterMap.find(Reg);
+      if (RegIt == RegisterMap.end())
+        return;
+      auto &InstrVec = RegIt->getSecond();
+      InstrVec.push_back(&MI);
+      InstrMap[&MI].push_back(Reg);
+    };
+
+    if (MI.isDebugValue()) {
+      auto *DILocalVar = MI.getDebugVariable();
+      // TODO: This should not happen, have to fix the MIR verifier to check for
+      // such instances and fix them.
+      if (!DILocalVar)
+        continue;
+      auto DbgVar = createDebugVariableFromMachineInstr(&MI);
+      // If the first operand is a register and it exists in the RegisterMap, we
+      // know this is a DBG_VALUE that uses the result of a load that was moved,
+      // and is therefore a candidate to also be moved, add it to the
+      // RegisterMap and InstrMap.
+      forEachDbgRegOperand(&MI, [&](MachineOperand &Op) {
+        PopulateRegisterAndInstrMapForDebugInstr(Op.getReg());
+      });
+
+      // If the current DBG_VALUE describes the same variable as one of the
+      // in-flight DBG_VALUEs, remove the candidate from the list and set it to
+      // undef. Moving one DBG_VALUE past another would result in the variable's
+      // value going back in time when stepping through the block in the
+      // debugger.
+      auto InstrIt = DbgValueSinkCandidates.find(DbgVar);
+      if (InstrIt != DbgValueSinkCandidates.end()) {
+        auto *Instr = InstrIt->getSecond();
+        auto RegIt = InstrMap.find(Instr);
+        if (RegIt != InstrMap.end()) {
+          const auto &RegVec = RegIt->getSecond();
+          // For every Register in the RegVec, remove the MachineInstr in the
+          // RegisterMap that describes the DbgVar.
+          for (auto &Reg : RegVec) {
+            auto RegIt = RegisterMap.find(Reg);
+            if (RegIt == RegisterMap.end())
+              continue;
+            auto &InstrVec = RegIt->getSecond();
+            auto IsDbgVar = [&](MachineInstr *I) -> bool {
+              auto Var = createDebugVariableFromMachineInstr(I);
+              return Var == DbgVar;
+            };
+
+            InstrVec.erase(
+                std::remove_if(InstrVec.begin(), InstrVec.end(), IsDbgVar),
+                InstrVec.end());
+          }
+          forEachDbgRegOperand(Instr,
+                               [&](MachineOperand &Op) { Op.setReg(0); });
+        }
+      }
+      DbgValueSinkCandidates[DbgVar] = &MI;
+    } else {
+      // If the first operand of a load matches with a DBG_VALUE in RegisterMap,
+      // then move that DBG_VALUE to below the load.
+      auto Opc = MI.getOpcode();
+      if (!isLoadSingle(Opc))
+        continue;
+      auto Reg = MI.getOperand(0).getReg();
+      auto RegIt = RegisterMap.find(Reg);
+      if (RegIt == RegisterMap.end())
+        continue;
+      auto &DbgInstrVec = RegIt->getSecond();
+      if (!DbgInstrVec.size())
+        continue;
+      for (auto *DbgInstr : DbgInstrVec) {
+        MachineBasicBlock::iterator InsertPos = std::next(MBBI);
+        auto *ClonedMI = MI.getMF()->CloneMachineInstr(DbgInstr);
+        MBB->insert(InsertPos, ClonedMI);
+        MBBI++;
+        //  Erase the entry into the DbgValueSinkCandidates for the DBG_VALUE
+        //  that was moved.
+        auto DbgVar = createDebugVariableFromMachineInstr(DbgInstr);
+        auto DbgIt = DbgValueSinkCandidates.find(DbgVar);
+        // If the instruction is a DBG_VALUE_LIST, it may have already been
+        // erased from the DbgValueSinkCandidates. Only erase if it exists in
+        // the DbgValueSinkCandidates.
+        if (DbgIt != DbgValueSinkCandidates.end())
+          DbgValueSinkCandidates.erase(DbgIt);
+        // Zero out original dbg instr
+        forEachDbgRegOperand(DbgInstr,
+                             [&](MachineOperand &Op) { Op.setReg(0); });
+        // Update RegisterMap with ClonedMI because it might have to be moved
+        // again.
+        if (DbgInstr->isDebugValueList())
+          updateRegisterMapForDbgValueListAfterMove(RegisterMap, ClonedMI,
+                                                    DbgInstr);
+      }
+    }
+  }
   return RetVal;
 }
 
 // Get the Base register operand index from the memory access MachineInst if we
 // should attempt to distribute postinc on it. Return -1 if not of a valid
 // instruction type. If it returns an index, it is assumed that instruction is a
 // r+i indexing mode, and getBaseOperandIndex() + 1 is the Offset index.
 static int getBaseOperandIndex(MachineInstr &MI) {
   switch (MI.getOpcode()) {
   case ARM::MVE_VLDRBS16:
   case ARM::MVE_VLDRBS32:
   case ARM::MVE_VLDRBU16:
   case ARM::MVE_VLDRBU32:
   case ARM::MVE_VLDRHS32:
   case ARM::MVE_VLDRHU32:

llvm/test/DebugInfo/ARM/move-dbg-value-after-value-list.mir

+# RUN: llc %s -start-after=arm-mve-vpt-opts -stop-after=arm-prera-ldst-opt -o - | FileCheck %s
+# CHECK: %5:rgpr = t2MOVCCr %3, killed %4, 0 /* CC::eq */, $cpsr, debug-location !14
+# CHECK-NEXT: DBG_VALUE 0, $noreg, !10, !DIExpression(), debug-location !14
+# CHECK-NEXT: DBG_VALUE 1, $noreg, !10, !DIExpression(), debug-location !14
+# CHECK-NEXT: DBG_VALUE_LIST !10, !DIExpression(), $noreg, $noreg, debug-location !14
+# CHECK-NEXT: DBG_VALUE $noreg, $noreg, !10, !DIExpression(), debug-location !14
+# CHECK-NEXT: %0:rgpr = t2LDRi12 %5, 0, 14 /* CC::al */, $noreg, debug-location !14 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+# CHECK-NEXT: %6:rgpr = t2LDRi12 %5, 4, 14 /* CC::al */, $noreg, debug-location !14 :: (load (s32) from %ir.btc_user_copy)
+# CHECK-NEXT: %2:gpr = t2LDRi12 %5, 8, 14 /* CC::al */, $noreg, debug-location !14 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+# CHECK-NEXT: DBG_VALUE %2, $noreg, !10, !DIExpression(), debug-location !14
+# CHECK-NEXT: %7:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+# CHECK-NEXT: %8:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+# CHECK-NEXT: %9:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+# CHECK-NEXT: %10:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+
+# This test specifically checks if a DBG_VALUE_LIST that is succeeded by a DBG_VALUE can be properly undefed and the DBG_VALUE is the one that is moved. Assuming both instructions describe the same local variable. 
+
+--- |
+  target triple = "thumbv7k-apple-watchos8.0.0"
+  %struct.backtrace_control = type {}
+  @backtrace_user.ctl_default = internal unnamed_addr constant %struct.backtrace_control zeroinitializer, !dbg !0
+  define i32 @backtrace_user(ptr nocapture noundef writeonly %bt, i32 noundef %max_frames, ptr noundef readonly %ctl_in, ptr nocapture noundef readnone %info_out) local_unnamed_addr #0 !dbg !2 {entry:
+    %tobool.not = icmp eq ptr %ctl_in, null, !dbg !95
+    %.backtrace_user.ctl_default = select i1 %tobool.not, ptr @backtrace_user.ctl_default, ptr %ctl_in, !dbg !95
+    %btc_user_copy = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    %btc_user_copy_context = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    ret i32 undef, !dbg !95
+  }
+  !llvm.module.flags = !{!88, !93}
+  !llvm.dbg.cu = !{!32}
+  !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+  !1 = distinct !DIGlobalVariable(type: !11, isDefinition: true)
+  !2 = distinct !DISubprogram(unit: !32, retainedNodes: !38)
+  !3 = !DIFile(filename: "backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !11 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !12)
+  !12 = distinct !DICompositeType(tag: DW_TAG_member, offset: 32)
+  !32 = distinct !DICompileUnit(language: DW_LANG_C11, file: !33, sdk: "MacOSX13.0.sdk")
+  !33 = !DIFile(filename: "/Users/shubham/Development/Delta/backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !38 = !{!60, !85}
+  !60 = !DILocalVariable(scope: !2, type: !62)
+  !62 = distinct !DICompositeType(tag: DW_TAG_union_type, size: 128)
+  !85 = !DILabel(scope: !2, name: "out", file: !3, line: 102)
+  !88 = !{i32 2, !"Debug Info Version", i32 3}
+  !93 = !{i32 7, !"frame-pointer", i32 1}
+  !95 = !DILocation(line: 5, column: 10, scope: !2)
+name:            backtrace_user
+registers:
+  - {id: 0, class: rgpr, }
+  - {id: 1, class: gpr, }
+  - {id: 2, class: gpr, }
+body:             |
+  bb.0.entry:
+    %10:rgpr = COPY $r2
+    %13:rgpr = t2MOV_ga_pcrel target-flags(arm-nonlazy) @backtrace_user.ctl_default, debug-location !95
+    %15:rgpr = t2MOVCCr %10, killed %13, 0 /* CC::eq */, $cpsr, debug-location !95
+    DBG_VALUE 0, $noreg, !60, !DIExpression(), debug-location !95
+    %0:rgpr = t2LDRi12 %15, 0, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+    DBG_VALUE 1, $noreg, !60, !DIExpression(), debug-location !95
+    %16:rgpr = t2LDRi12 %15, 4, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy)
+    DBG_VALUE_LIST !60, !DIExpression(), %16, %0, debug-location !95
+    %2:gpr = t2LDRi12 %15, 8, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+    DBG_VALUE %2, $noreg, !60, !DIExpression(), debug-location !95
+    %31:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr
+    %32:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr
+    %33:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr
+    %34:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr

llvm/test/DebugInfo/ARM/move-dbg-value-lists.mir

+# RUN: llc %s -start-after=arm-mve-vpt-opts -stop-after=arm-prera-ldst-opt -o - | FileCheck %s
+# CHECK: %5:rgpr = t2MOVCCr %3, killed %4, 0 /* CC::eq */, $cpsr, debug-location !14
+# CHECK-NEXT: DBG_VALUE 0, $noreg, !10, !DIExpression(), debug-location !14
+# CHECK-NEXT: DBG_VALUE 1, $noreg, !10, !DIExpression(), debug-location !14
+# CHECK-NEXT: DBG_VALUE_LIST !10, !DIExpression(), $noreg, $noreg, debug-location !14
+# CHECK-NEXT: %0:rgpr = t2LDRi12 %5, 0, 14 /* CC::al */, $noreg, debug-location !14 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+# CHECK-NEXT: DBG_VALUE_LIST !10, !DIExpression(), $noreg, $noreg, debug-location !14
+# CHECK-NEXT: %6:rgpr = t2LDRi12 %5, 4, 14 /* CC::al */, $noreg, debug-location !14 :: (load (s32) from %ir.btc_user_copy)
+# CHECK-NEXT: DBG_VALUE_LIST !10, !DIExpression(), %6, %0, debug-location !14
+# CHECK-NEXT: %2:gpr = t2LDRi12 %5, 8, 14 /* CC::al */, $noreg, debug-location !14 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+# CHECK-NEXT: %7:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+# CHECK-NEXT: DBG_VALUE %2, $noreg, !10, !DIExpression(), debug-location !14
+--- |
+  target triple = "thumbv7k-apple-watchos8.0.0"
+  %struct.backtrace_control = type {}
+  @backtrace_user.ctl_default = internal unnamed_addr constant %struct.backtrace_control zeroinitializer, !dbg !0
+  define i32 @backtrace_user(ptr nocapture noundef writeonly %bt, i32 noundef %max_frames, ptr noundef readonly %ctl_in, ptr nocapture noundef readnone %info_out) local_unnamed_addr #0 !dbg !2 {entry:
+    %tobool.not = icmp eq ptr %ctl_in, null, !dbg !95
+    %.backtrace_user.ctl_default = select i1 %tobool.not, ptr @backtrace_user.ctl_default, ptr %ctl_in, !dbg !95
+    %btc_user_copy = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    %btc_user_copy_context = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    ret i32 undef, !dbg !95
+  }
+  !llvm.module.flags = !{!88, !93}
+  !llvm.dbg.cu = !{!32}
+  !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+  !1 = distinct !DIGlobalVariable(type: !11, isDefinition: true)
+  !2 = distinct !DISubprogram(unit: !32, retainedNodes: !38)
+  !3 = !DIFile(filename: "backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !11 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !12)
+  !12 = distinct !DICompositeType(tag: DW_TAG_member, offset: 32)
+  !32 = distinct !DICompileUnit(language: DW_LANG_C11, file: !33, sdk: "MacOSX13.0.sdk")
+  !33 = !DIFile(filename: "/Users/shubham/Development/Delta/backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !38 = !{!60, !85}
+  !60 = !DILocalVariable(scope: !2, type: !62)
+  !62 = distinct !DICompositeType(tag: DW_TAG_union_type, size: 64)
+  !85 = !DILabel(scope: !2, name: "out", file: !3, line: 102)
+  !88 = !{i32 2, !"Debug Info Version", i32 3}
+  !93 = !{i32 7, !"frame-pointer", i32 1}
+  !95 = !DILocation(line: 5, column: 10, scope: !2)
+name:            backtrace_user
+registers:
+  - {id: 0, class: rgpr, }
+  - {id: 1, class: gpr, }
+  - {id: 2, class: gpr, }
+body:             |
+  bb.0.entry:
+    %10:rgpr = COPY $r2
+    %13:rgpr = t2MOV_ga_pcrel target-flags(arm-nonlazy) @backtrace_user.ctl_default, debug-location !95
+    %15:rgpr = t2MOVCCr %10, killed %13, 0 /* CC::eq */, $cpsr, debug-location !95
+    DBG_VALUE 0, $noreg, !60, !DIExpression(), debug-location !95
+    %0:rgpr = t2LDRi12 %15, 0, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+    DBG_VALUE 1, $noreg, !60, !DIExpression(), debug-location !95
+    %16:rgpr = t2LDRi12 %15, 4, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy)
+    DBG_VALUE_LIST !60, !DIExpression(), %16, %0, debug-location !95
+    %2:gpr = t2LDRi12 %15, 8, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+    %31:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr
+    DBG_VALUE %2, $noreg, !60, !DIExpression(), debug-location !95

llvm/test/DebugInfo/ARM/move-dbg-value-same-reg.mir

+# RUN: llc %s -start-after=arm-mve-vpt-opts -stop-after=arm-prera-ldst-opt -o - | FileCheck %s
+# CHECK: %5:rgpr = t2MOVCCr %3, killed %4, 0 /* CC::eq */, $cpsr, debug-location !{{[0-9]+}}
+# CHECK-NEXT: DBG_VALUE 0, $noreg, ![[DBG:[0-9]+]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-NEXT: DBG_VALUE $noreg, $noreg, ![[DBG]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-NEXT: DBG_VALUE $noreg, $noreg, !{{[0-9]+}}, !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-NEXT: %0:rgpr = t2LDRi12 %5, 0, 14 /* CC::al */, $noreg, debug-location !{{[0-9]+}} :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+# CHECK-NEXT: DBG_VALUE %0, $noreg, ![[DBG]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-NEXT: DBG_VALUE %0, $noreg, !{{[0-9]+}}, !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-NEXT: %6:rgpr = t2LDRi12 %5, 4, 14 /* CC::al */, $noreg, debug-location !{{[0-9]+}} :: (load (s32) from %ir.btc_user_copy)
+# CHECK-NEXT: %2:gpr = t2LDRi12 %5, 8, 14 /* CC::al */, $noreg, debug-location !{{[0-9]+}} :: (load (s32) from %ir.btc_user_copy_context, align 8)
+# CHECK-NEXT: %7:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+# CHECK-NEXT: DBG_VALUE %2, $noreg, ![[DBG]], !DIExpression(), debug-location !{{[0-9]+}}
+
+# This test checks the case where two DBG_VALUEs share the same virtual register but describe different local variables.
+
+--- |
+  target triple = "thumbv7k-apple-watchos8.0.0"
+  %struct.backtrace_control = type {}
+  @backtrace_user.ctl_default = internal unnamed_addr constant %struct.backtrace_control zeroinitializer, !dbg !0
+  define i32 @backtrace_user(ptr nocapture noundef writeonly %bt, i32 noundef %max_frames, ptr noundef readonly %ctl_in, ptr nocapture noundef readnone %info_out) local_unnamed_addr #0 !dbg !2 {entry:
+    %tobool.not = icmp eq ptr %ctl_in, null, !dbg !95
+    %.backtrace_user.ctl_default = select i1 %tobool.not, ptr @backtrace_user.ctl_default, ptr %ctl_in, !dbg !95
+    %btc_user_copy = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    %btc_user_copy_context = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    ret i32 undef, !dbg !95
+  }
+  !llvm.module.flags = !{!88, !93}
+  !llvm.dbg.cu = !{!32}
+  !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+  !1 = distinct !DIGlobalVariable(type: !11, isDefinition: true)
+  !2 = distinct !DISubprogram(unit: !32, retainedNodes: !38)
+  !3 = !DIFile(filename: "backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !11 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !12)
+  !12 = distinct !DICompositeType(tag: DW_TAG_member, offset: 32)
+  !16 = !DIDerivedType(tag: DW_TAG_typedef, baseType: !21)
+  !21 = !DIBasicType()
+  !32 = distinct !DICompileUnit(language: DW_LANG_C11, file: !33, sdk: "MacOSX13.0.sdk")
+  !33 = !DIFile(filename: "/Users/shubham/Development/Delta/backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !38 = !{!59, !60, !85}
+  !59 = !DILocalVariable(scope: !2, type: !16)
+  !60 = !DILocalVariable(scope: !2, type: !62)
+  !62 = distinct !DICompositeType(tag: DW_TAG_union_type, size: 128)
+  !85 = !DILabel(scope: !2, name: "out", file: !3, line: 102)
+  !88 = !{i32 2, !"Debug Info Version", i32 3}
+  !93 = !{i32 7, !"frame-pointer", i32 1}
+  !95 = !DILocation(line: 5, column: 10, scope: !2)
+name:            backtrace_user
+registers:
+  - {id: 0, class: rgpr, }
+  - {id: 1, class: gpr, }
+  - {id: 2, class: gpr, }
+body:             |
+  bb.0.entry:
+    %10:rgpr = COPY $r2
+    %13:rgpr = t2MOV_ga_pcrel target-flags(arm-nonlazy) @backtrace_user.ctl_default, debug-location !95
+    %15:rgpr = t2MOVCCr %10, killed %13, 0 /* CC::eq */, $cpsr, debug-location !95
+    DBG_VALUE 0, $noreg, !60, !DIExpression(), debug-location !95
+    %0:rgpr = t2LDRi12 %15, 0, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+    DBG_VALUE %0, $noreg, !60, !DIExpression(), debug-location !95
+    DBG_VALUE %0, $noreg, !59, !DIExpression(), debug-location !95
+    %16:rgpr = t2LDRi12 %15, 4, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy)
+    %2:gpr = t2LDRi12 %15, 8, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+    %31:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr
+    DBG_VALUE %2, $noreg, !60, !DIExpression(), debug-location !95

llvm/test/DebugInfo/ARM/move-dbg-values-imm-test.mir

+# RUN: llc -O2 %s -start-after=arm-mve-vpt-opts -stop-after=arm-prera-ldst-opt -o -  | FileCheck %s
+# CHECK: DBG_VALUE 13, $noreg, !11, !DIExpression(), debug-location !13
+
+
+# This test checks to make sure that a DBG_VALUE that uses an immediate doesn't get zero-ed out by a DBG_VALUE that comes later in the basic block, and describes the same variable.
+
+--- |
+  ; ModuleID = '/Users/shubham/Development/llvm-project/llvm/test/DebugInfo/Generic/incorrect-variable-debugloc1.ll'
+  source_filename = "/Users/shubham/Development/llvm-project/llvm/test/DebugInfo/Generic/incorrect-variable-debugloc1.ll"
+  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+  target triple = "armv8-unknown-linux"
+  
+  ; Function Attrs: uwtable
+  define i32 @main() #0 !dbg !6 {
+  entry:
+    %c = alloca i32, align 4
+    tail call void @llvm.dbg.value(metadata i32 13, metadata !11, metadata !DIExpression()), !dbg !13
+    store volatile i32 13, ptr %c, align 4, !dbg !14
+    %call = tail call i32 @_Z4funcv(), !dbg !15
+    tail call void @llvm.dbg.value(metadata i32 %call, metadata !11, metadata !DIExpression()), !dbg !13
+    store volatile i32 %call, ptr %c, align 4, !dbg !15
+    tail call void @llvm.dbg.value(metadata ptr %c, metadata !11, metadata !DIExpression(DW_OP_deref)), !dbg !13
+    %c.0.c.0. = load volatile i32, ptr %c, align 4, !dbg !16
+    ret i32 %c.0.c.0., !dbg !16
+  }
+  
+  declare i32 @_Z4funcv() #1
+  
+  ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
+  declare void @llvm.dbg.value(metadata, metadata, metadata) #2
+  
+  attributes #0 = { uwtable "frame-pointer"="none" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+  attributes #1 = { "frame-pointer"="none" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+  attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
+  
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!3, !4}
+  !llvm.ident = !{!5}
+  
+  !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 3.6.0 (trunk 223522)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2, globals: !2, imports: !2)
+  !1 = !DIFile(filename: "test.cpp", directory: "/home/kromanova/ngh/ToT_latest/llvm/test/DebugInfo")
+  !2 = !{}
+  !3 = !{i32 2, !"Dwarf Version", i32 2}
+  !4 = !{i32 2, !"Debug Info Version", i32 3}
+  !5 = !{!"clang version 3.6.0 (trunk 223522)"}
+  !6 = distinct !DISubprogram(name: "main", scope: !1, file: !1, line: 3, type: !7, scopeLine: 4, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !10)
+  !7 = !DISubroutineType(types: !8)
+  !8 = !{!9}
+  !9 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
+  !10 = !{!11}
+  !11 = !DILocalVariable(name: "c", scope: !6, file: !1, line: 5, type: !12)
+  !12 = !DIDerivedType(tag: DW_TAG_volatile_type, baseType: !9)
+  !13 = !DILocation(line: 5, column: 16, scope: !6)
+  !14 = !DILocation(line: 5, column: 3, scope: !6)
+  !15 = !DILocation(line: 6, column: 7, scope: !6)
+  !16 = !DILocation(line: 7, column: 3, scope: !6)
+
+...
+---
+name:            main
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+failedISel:      false
+tracksRegLiveness: true
+hasWinCFI:       false
+callsEHReturn:   false
+callsUnwindInit: false
+hasEHCatchret:   false
+hasEHScopes:     false
+hasEHFunclets:   false
+isOutlined:      false
+debugInstrRef:   false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+  - { id: 0, class: gpr, preferred-register: '' }
+  - { id: 1, class: gpr, preferred-register: '' }
+  - { id: 2, class: gpr, preferred-register: '' }
+liveins:         []
+frameInfo:
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       0
+  offsetAdjustment: 0
+  maxAlignment:    4
+  adjustsStack:    true
+  hasCalls:        true
+  stackProtector:  ''
+  functionContext: ''
+  maxCallFrameSize: 0
+  cvBytesOfCalleeSavedRegisters: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  hasTailCall:     false
+  localFrameSize:  4
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      []
+stack:
+  - { id: 0, name: c, type: default, offset: 0, size: 4, alignment: 4, 
+      stack-id: default, callee-saved-register: '', callee-saved-restored: true, 
+      local-offset: -4, debug-info-variable: '', debug-info-expression: '', 
+      debug-info-location: '' }
+callSites:       []
+debugValueSubstitutions: []
+constants:       []
+machineFunctionInfo: {}
+body:             |
+  bb.0.entry:
+    DBG_VALUE 13, $noreg, !11, !DIExpression(), debug-location !13
+    %0:gpr = MOVi 13, 14 /* CC::al */, $noreg, $noreg
+    STRi12 killed %0, %stack.0.c, 0, 14 /* CC::al */, $noreg, debug-location !14 :: (volatile store (s32) into %ir.c)
+    ADJCALLSTACKDOWN 0, 0, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp, debug-location !15
+    BL @_Z4funcv, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0, debug-location !15
+    ADJCALLSTACKUP 0, -1, 14 /* CC::al */, $noreg, implicit-def dead $sp, implicit $sp, debug-location !15
+    %1:gpr = COPY $r0, debug-location !15
+    DBG_VALUE %1, $noreg, !11, !DIExpression(), debug-location !13
+    STRi12 %1, %stack.0.c, 0, 14 /* CC::al */, $noreg, debug-location !15 :: (volatile store (s32) into %ir.c)
+    DBG_VALUE %stack.0.c, $noreg, !11, !DIExpression(DW_OP_deref), debug-location !13
+    %2:gpr = LDRi12 %stack.0.c, 0, 14 /* CC::al */, $noreg, debug-location !16 :: (volatile dereferenceable load (s32) from %ir.c)
+    $r0 = COPY %2, debug-location !16
+    BX_RET 14 /* CC::al */, $noreg, implicit $r0, debug-location !16
+
+...

llvm/test/DebugInfo/ARM/move-dbg-values.mir

+# RUN: llc %s -start-after=arm-mve-vpt-opts -stop-after=arm-prera-ldst-opt -o - | FileCheck %s
+# CHECK: %5:rgpr = t2MOVCCr %3, killed %4, 0 /* CC::eq */, $cpsr, debug-location !15
+# CHECK-NEXT: DBG_VALUE 0, $noreg, !10, !DIExpression(), debug-location !15
+# CHECK-NEXT: DBG_VALUE $noreg, $noreg, !10, !DIExpression(), debug-location !15
+# CHECK-NEXT: DBG_VALUE $noreg, $noreg, !10, !DIExpression(), debug-location !15
+# CHECK-NEXT: %0:rgpr = t2LDRi12 %5, 0, 14 /* CC::al */, $noreg, debug-location !15 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+# CHECK-NEXT: %6:rgpr = t2LDRi12 %5, 4, 14 /* CC::al */, $noreg, debug-location !15 :: (load (s32) from %ir.btc_user_copy)
+# CHECK-NEXT: DBG_VALUE %6, $noreg, !10, !DIExpression(), debug-location !15
+# CHECK-NEXT: %2:gpr = t2LDRi12 %5, 8, 14 /* CC::al */, $noreg, debug-location !15 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+# CHECK-NEXT: %7:rgpr = t2ANDrr %6, %0, 14 /* CC::al */, $noreg, def $cpsr
+# CHECK-NEXT: DBG_VALUE %2, $noreg, !10, !DIExpression(), debug-location !15
+--- |
+  target triple = "thumbv7k-apple-watchos8.0.0"
+  %struct.backtrace_control = type {}
+  @backtrace_user.ctl_default = internal unnamed_addr constant %struct.backtrace_control zeroinitializer, !dbg !0
+  define i32 @backtrace_user(ptr nocapture noundef writeonly %bt, i32 noundef %max_frames, ptr noundef readonly %ctl_in, ptr nocapture noundef readnone %info_out) local_unnamed_addr #0 !dbg !2 {entry:
+    %tobool.not = icmp eq ptr %ctl_in, null, !dbg !95
+    %.backtrace_user.ctl_default = select i1 %tobool.not, ptr @backtrace_user.ctl_default, ptr %ctl_in, !dbg !95
+    %btc_user_copy = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    %btc_user_copy_context = getelementptr inbounds %struct.backtrace_control, ptr %.backtrace_user.ctl_default, !dbg !95
+    ret i32 undef, !dbg !95
+  }
+  !llvm.module.flags = !{!88,
+   !93}
+  !llvm.dbg.cu = !{!32}
+  !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+  !1 = distinct !DIGlobalVariable(type: !11, isDefinition: true)
+  !2 = distinct !DISubprogram(unit: !32, retainedNodes: !38)
+  !3 = !DIFile(filename: "backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !8 = !DIDerivedType(tag: DW_TAG_typedef, baseType: !11, size: 32)
+  !11 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !12)
+  !12 = distinct !DICompositeType(tag: DW_TAG_structure_type, size: 32)
+  !22 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !31, size: 32)
+  !31 = !DICompositeType(tag: DW_TAG_structure_type, flags: DIFlagFwdDecl)
+  !32 = distinct !DICompileUnit(language: DW_LANG_C11, file: !33, sdk: "MacOSX13.0.sdk")
+  !33 = !DIFile(filename: "/Users/shubham/Development/Delta/backtrace.pp.c", directory: "/Users/shubham/Development/Delta")
+  !38 = !{!60, !85}
+  !60 = !DILocalVariable(scope: !2, type: !22)
+  !85 = !DILabel(scope: !2, name: "out", file: !3, line: 102)
+  !88 = !{i32 2, !"Debug Info Version", i32 3}
+  !93 = !{i32 7, !"frame-pointer", i32 1}
+  !95 = !DILocation(line: 5, column: 10, scope: !2)
+name:            backtrace_user
+registers:
+  - {id: 0, class: rgpr, }
+  - {id: 1, class: gpr, }
+  - {id: 2, class: gpr, }
+body:             |
+  bb.0.entry:
+    %10:rgpr = COPY $r2
+    %13:rgpr = t2MOV_ga_pcrel target-flags(arm-nonlazy) @backtrace_user.ctl_default, debug-location !95
+    %15:rgpr = t2MOVCCr %10, killed %13, 0 /* CC::eq */, $cpsr, debug-location !95
+    DBG_VALUE 0, $noreg, !60, !DIExpression(), debug-location !95
+    %0:rgpr = t2LDRi12 %15, 0, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir..backtrace_user.ctl_default, align 8)
+    DBG_VALUE %0, $noreg, !60, !DIExpression(), debug-location !95
+    %16:rgpr = t2LDRi12 %15, 4, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy)
+    DBG_VALUE %16, $noreg, !60, !DIExpression(), debug-location !95
+    %2:gpr = t2LDRi12 %15, 8, 14 /* CC::al */, $noreg, debug-location !95 :: (load (s32) from %ir.btc_user_copy_context, align 8)
+    %31:rgpr = t2ANDrr %16, %0, 14 /* CC::al */, $noreg, def $cpsr
+    DBG_VALUE %2, $noreg, !60, !DIExpression(), debug-location !95