[NFC] Make FPClassTest a bitmask enumeration

[sepavloff]

Summary

With this change bitwise operations are allowed for FPClassTest
enumeration, it must simplify using this type. Also some functions
changed to get argument of type FPClassTest instead of unsigned.

[arsenm]

LGTM. I was working on this but only got halfway through the prerequisite patch

[sepavloff]

Thanks!

llvm/include/llvm/ADT/FloatingPointMode.h

 /// Utilities for dealing with flags related to floating point properties and
 /// mode controls.
 ///
 //===----------------------------------------------------------------------===/
 
 #ifndef LLVM_ADT_FLOATINGPOINTMODE_H
 #define LLVM_ADT_FLOATINGPOINTMODE_H
 
+#include "llvm/ADT/BitmaskEnum.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Support/raw_ostream.h"
 
 namespace llvm {
 
 /// Rounding mode.
 ///
 /// Enumerates supported rounding modes, as well as some special values. The set
inline DenormalMode parseDenormalFPAttribute(StringRef Str) {
 
   return Mode;
 }
 
 void DenormalMode::print(raw_ostream &OS) const {
   OS << denormalModeKindName(Output) << ',' << denormalModeKindName(Input);
 }
 
-} // namespace llvm
-
 /// Floating-point class tests, supported by 'is_fpclass' intrinsic. Actual
 /// test may be an OR combination of basic tests.
-enum FPClassTest {
+enum FPClassTest : unsigned {
+  fcNone = 0,
+
   fcSNan = 0x0001,
   fcQNan = 0x0002,
   fcNegInf = 0x0004,
   fcNegNormal = 0x0008,
   fcNegSubnormal = 0x0010,
   fcNegZero = 0x0020,
   fcPosZero = 0x0040,
   fcPosSubnormal = 0x0080,
   fcPosNormal = 0x0100,
   fcPosInf = 0x0200,
 
   fcNan = fcSNan | fcQNan,
   fcInf = fcPosInf | fcNegInf,
   fcNormal = fcPosNormal | fcNegNormal,
   fcSubnormal = fcPosSubnormal | fcNegSubnormal,
   fcZero = fcPosZero | fcNegZero,
   fcPosFinite = fcPosNormal | fcPosSubnormal | fcPosZero,
   fcNegFinite = fcNegNormal | fcNegSubnormal | fcNegZero,
   fcFinite = fcPosFinite | fcNegFinite,
-  fcAllFlags = fcNan | fcInf | fcFinite
+  fcAllFlags = fcNan | fcInf | fcFinite,
 };
 
+LLVM_DECLARE_ENUM_AS_BITMASK(FPClassTest, /* LargestValue */ fcPosInf);
+
+} // namespace llvm
+
 #endif // LLVM_ADT_FLOATINGPOINTMODE_H

llvm/include/llvm/CodeGen/CodeGenCommonISel.h

 #ifndef LLVM_CODEGEN_CODEGENCOMMONISEL_H
 #define LLVM_CODEGEN_CODEGENCOMMONISEL_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include <cassert>
 namespace llvm {
 
 class BasicBlock;
+enum FPClassTest : unsigned;
+
 /// Encapsulates all of the information needed to generate a stack protector
 /// check, and signals to isel when initialized that one needs to be generated.
 ///
 /// *NOTE* The following is a high level documentation of SelectionDAG Stack
 /// Protector Generation. This is now also ported be shared with GlobalISel,
 /// but without any significant changes.
 ///
 /// High Level Overview of ISel Stack Protector Generation:

 findSplitPointForStackProtector(MachineBasicBlock *BB,
                                 const TargetInstrInfo &TII);
 /// Evaluates if the specified FP class test is an inversion of a simpler test.
 /// An example is the test "inf|normal|subnormal|zero", which is an inversion
 /// of "nan".
 /// \param Test The test as specified in 'is_fpclass' intrinsic invocation.
 /// \returns The inverted test, or zero, if inversion does not produce simpler
 /// test.
-unsigned getInvertedFPClassTest(unsigned Test);
+FPClassTest getInvertedFPClassTest(FPClassTest Test);
 
 /// Assuming the instruction \p MI is going to be deleted, attempt to salvage
 /// debug users of \p MI by writing the effect of \p MI in a DIExpression.
 void salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI,
                                  MachineInstr &MI,
                                  ArrayRef<MachineOperand *> DbgUsers);
 
 } // namespace llvm
 
 #endif // LLVM_CODEGEN_CODEGENCOMMONISEL_H

llvm/include/llvm/CodeGen/TargetLowering.h

   SDValue expandFP_TO_INT_SAT(SDNode *N, SelectionDAG &DAG) const;
 
   /// Expand check for floating point class.
   /// \param ResultVT The type of intrinsic call result.
   /// \param Op The tested value.
   /// \param Test The test to perform.
   /// \param Flags The optimization flags.
   /// \returns The expansion result or SDValue() if it fails.
-  SDValue expandIS_FPCLASS(EVT ResultVT, SDValue Op, unsigned Test,
+  SDValue expandIS_FPCLASS(EVT ResultVT, SDValue Op, FPClassTest Test,
                            SDNodeFlags Flags, const SDLoc &DL,
                            SelectionDAG &DAG) const;
 
   /// Expand CTPOP nodes. Expands vector/scalar CTPOP nodes,
   /// vector nodes can only succeed if all operations are legal/custom.
   /// \param N Node to expand
   /// \returns The expansion result or SDValue() if it fails.
   SDValue expandCTPOP(SDNode *N, SelectionDAG &DAG) const;

llvm/lib/CodeGen/CodeGenCommonISel.cpp

while (MIIsInTerminatorSequence(*Previous)) {
     if (Previous == Start)
       break;
     --Previous;
   }
 
   return SplitPoint;
 }
 
-unsigned llvm::getInvertedFPClassTest(unsigned Test) {
-  unsigned InvertedTest = ~Test & fcAllFlags;
+FPClassTest llvm::getInvertedFPClassTest(FPClassTest Test) {
+  FPClassTest InvertedTest = ~Test & fcAllFlags;
   switch (InvertedTest) {
   default:
     break;
   case fcNan:
   case fcSNan:
   case fcQNan:
   case fcInf:
   case fcPosInf:
   case fcNegInf:
   case fcNormal:
   case fcPosNormal:
   case fcNegNormal:
   case fcSubnormal:
   case fcPosSubnormal:
   case fcNegSubnormal:
   case fcZero:
   case fcPosZero:
   case fcNegZero:
   case fcFinite:
   case fcPosFinite:
   case fcNegFinite:
     return InvertedTest;
   }
-  return 0;
+  return fcNone;
 }
 
 static MachineOperand *getSalvageOpsForCopy(const MachineRegisterInfo &MRI,
                                             MachineInstr &Copy) {
   assert(Copy.getOpcode() == TargetOpcode::COPY && "Must be a COPY");
 
   return &Copy.getOperand(1);
 }

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Res = DAG.getNode(ISD::SET_ROUNDING, sdl, MVT::Other,
                       {getRoot(), getValue(I.getArgOperand(0))});
     setValue(&I, Res);
     DAG.setRoot(Res.getValue(0));
     return;
   case Intrinsic::is_fpclass: {
     const DataLayout DLayout = DAG.getDataLayout();
     EVT DestVT = TLI.getValueType(DLayout, I.getType());
     EVT ArgVT = TLI.getValueType(DLayout, I.getArgOperand(0)->getType());
-    unsigned Test = cast<ConstantInt>(I.getArgOperand(1))->getZExtValue();
+    FPClassTest Test = static_cast<FPClassTest>(
+        cast<ConstantInt>(I.getArgOperand(1))->getZExtValue());
     MachineFunction &MF = DAG.getMachineFunction();
     const Function &F = MF.getFunction();
     SDValue Op = getValue(I.getArgOperand(0));
     SDNodeFlags Flags;
     Flags.setNoFPExcept(
         !F.getAttributes().hasFnAttr(llvm::Attribute::StrictFP));
     // If ISD::IS_FPCLASS should be expanded, do it right now, because the
     // expansion can use illegal types. Making expansion early allows

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode *Node,
 
   if (SDValue SelCC = createSelectForFMINNUM_FMAXNUM(Node, DAG))
     return SelCC;
 
   return SDValue();
 }
 
 SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op,
-                                         unsigned Test, SDNodeFlags Flags,
+                                         FPClassTest Test, SDNodeFlags Flags,
                                          const SDLoc &DL,
                                          SelectionDAG &DAG) const {
   EVT OperandVT = Op.getValueType();
   assert(OperandVT.isFloatingPoint());
 
   // Degenerated cases.
   if (Test == 0)
     return DAG.getBoolConstant(false, DL, ResultVT, OperandVT);
   if ((Test & fcAllFlags) == fcAllFlags)
     return DAG.getBoolConstant(true, DL, ResultVT, OperandVT);
 
   // PPC double double is a pair of doubles, of which the higher part determines
   // the value class.
   if (OperandVT == MVT::ppcf128) {
     Op = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::f64, Op,
                      DAG.getConstant(1, DL, MVT::i32));
     OperandVT = MVT::f64;
   }
 
   // Some checks may be represented as inversion of simpler check, for example
   // "inf|normal|subnormal|zero" => !"nan".
   bool IsInverted = false;
-  if (unsigned InvertedCheck = getInvertedFPClassTest(Test)) {
+  if (FPClassTest InvertedCheck = getInvertedFPClassTest(Test)) {
     IsInverted = true;
     Test = InvertedCheck;
   }
 
   // Floating-point type properties.
   EVT ScalarFloatVT = OperandVT.getScalarType();
   const Type *FloatTy = ScalarFloatVT.getTypeForEVT(*DAG.getContext());
   const llvm::fltSemantics &Semantics = FloatTy->getFltSemantics();

llvm/lib/IR/Verifier.cpp

case Intrinsic::coro_id: {
     Constant *Init = GV->getInitializer();
     Check(isa<ConstantStruct>(Init) || isa<ConstantArray>(Init),
           "info argument of llvm.coro.id must refer to either a struct or "
           "an array");
     break;
   }
   case Intrinsic::is_fpclass: {
     const ConstantInt *TestMask = cast<ConstantInt>(Call.getOperand(1));
-    Check((TestMask->getZExtValue() & ~fcAllFlags) == 0,
+    Check((TestMask->getZExtValue() & ~static_cast<unsigned>(fcAllFlags)) == 0,
           "unsupported bits for llvm.is.fpclass test mask");
     break;
   }
   case Intrinsic::fptrunc_round: {
     // Check the rounding mode
     Metadata *MD = nullptr;
     auto *MAV = dyn_cast<MetadataAsValue>(Call.getOperand(1));
     if (MAV)