AMDGPU: Teach getNegatedExpression about rcp

[arsenm]

4f0eb57222deae1df329539e8179bc95d4f4df6d

[foad]

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

809

Depth + 1?

llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll

2033

This codegen isn't actually any better, is it?

[arsenm]

llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll

2033

No, this particular test is just cosmetic. I'm mostly trying to avoid regressions from turning 0 into -0 in a future patch

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

SDValue AMDGPUTargetLowering::getNegatedExpression(
   switch (Op.getOpcode()) {
   case ISD::FMA:
   case ISD::FMAD: {
     // Negating a fma is not free if it has users without source mods.
     if (!allUsesHaveSourceMods(Op.getNode()))
       return SDValue();
     break;
   }
+  case AMDGPUISD::RCP: {
+    SDValue Src = Op.getOperand(0);
+    EVT VT = Op.getValueType();
+    SDLoc SL(Op);
+
+    SDValue NegSrc = getNegatedExpression(Src, DAG, LegalOperations,
+                                          ForCodeSize, Cost, Depth);
+    if (NegSrc)
+      return DAG.getNode(AMDGPUISD::RCP, SL, VT, NegSrc, Op->getFlags());
+    return SDValue();
+  }
   default:
     break;
   }
 
   return TargetLowering::getNegatedExpression(Op, DAG, LegalOperations,
                                               ForCodeSize, Cost, Depth);
 }
 

llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll

; GCN-NEXT:    s_setpc_b64 s[30:31]
   ret { float, float } %insert.1
 }
 
 ; Test getNegatedExpression works for rcp nodes
 define float @v_negated_rcp_f32(float %arg0, float %arg1) #1 {
 ; GCN-LABEL: v_negated_rcp_f32:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT:    v_fma_f32 v0, -v0, v1, -2.0
+; GCN-NEXT:    v_fma_f32 v0, v0, v1, 2.0
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    v_sub_f32_e32 v0, v1, v0
+; GCN-NEXT:    v_add_f32_e32 v0, v1, v0
 ; GCN-NEXT:    s_setpc_b64 s[30:31]
   %neg.arg0 = fneg float %arg0
   %fma = call nsz float @llvm.fma.f32(float %neg.arg0, float %arg1, float -2.0)
   %rcp0 = call float @llvm.amdgcn.rcp.f32(float %fma)
   %mul = fsub nsz float %arg1, %rcp0
   ret float %mul
 }