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Differential D143905

[LV] Harden the test of the minmax with index pattern. (NFC)
ClosedPublic

Authored by Mel-Chen on Feb 13 2023, 5:47 AM.

Details

Reviewers
fhahn
Commits
rG3e84fc857f28: [LV] Harden the test of the minmax with index pattern. (NFC)
Summary
  • Add test config: -force-vector-width=4 -force-vector-interleave=1
  • New test case: The test case both returns the minimum value and the index.

Diff Detail

Event Timeline

Mel-Chen created this revision.Feb 13 2023, 5:47 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 13 2023, 5:47 AM
Herald added a subscriber: arphaman. · View Herald Transcript
Mel-Chen requested review of this revision.Feb 13 2023, 5:47 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 13 2023, 5:47 AM
Herald added subscribers: llvm-commits, • pcwang-thead. · View Herald Transcript
Mel-Chen added a child revision: D143465: [LoopVectorize] Vectorize the reduction pattern of integer min/max with index..Feb 13 2023, 5:53 AM
Mel-Chen added a reviewer: fhahn.Feb 13 2023, 5:58 AM
Herald added a subscriber: StephenFan. · View Herald TranscriptFeb 13 2023, 5:58 AM
Mel-Chen edited the summary of this revision. (Show Details)Feb 13 2023, 5:58 AM
Harbormaster completed remote builds in B213405: Diff 496943.Feb 13 2023, 6:36 AM
fhahn accepted this revision.Feb 19 2023, 3:28 AM

LGTM, thanks!

This revision is now accepted and ready to land.Feb 19 2023, 3:28 AM
Mel-Chen updated this revision to Diff 498782.Feb 20 2023, 3:14 AM

Rebase.

This revision was landed with ongoing or failed builds.Feb 20 2023, 3:16 AM
Closed by commit rG3e84fc857f28: [LV] Harden the test of the minmax with index pattern. (NFC) (authored by Mel-Chen). · Explain Why
This revision was automatically updated to reflect the committed changes.
Mel-Chen added a commit: rG3e84fc857f28: [LV] Harden the test of the minmax with index pattern. (NFC).
Harbormaster completed remote builds in B214717: Diff 498782.Feb 20 2023, 4:14 AM

Revision Contents

PathSize
llvm/
test/
Transforms/
LoopVectorize/
28 lines

Diff 498782

llvm/test/Transforms/LoopVectorize/select-min-index.ll

; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S %s | FileCheck %s
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S %s | FileCheck %s ; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=2 -S %s | FileCheck %s
; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck %s ; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck %s
; Test cases for selecting the index with the minimum value. ; Test cases for selecting the index with the minimum value.
define i64 @test_vectorize_select_umin_idx(ptr %src) { define i64 @test_vectorize_select_umin_idx(ptr %src) {
; CHECK-LABEL: @test_vectorize_select_umin_idx( ; CHECK-LABEL: @test_vectorize_select_umin_idx(
; CHECK-NOT: vector.body: ; CHECK-NOT: vector.body:
Show All 14 Linesloop:
%exitcond.not = icmp eq i64 %iv.next, 0 %exitcond.not = icmp eq i64 %iv.next, 0
br i1 %exitcond.not, label %exit, label %loop br i1 %exitcond.not, label %exit, label %loop
exit: exit:
%res = phi i64 [ %min.idx.next, %loop ] %res = phi i64 [ %min.idx.next, %loop ]
ret i64 %res ret i64 %res
} }
define i64 @test_vectorize_select_umin_idx_all_exit_inst(ptr %src, ptr %umin) {
; CHECK-LABEL: @test_vectorize_select_umin_idx_all_exit_inst(
; CHECK-NOT: vector.body:
;
entry:
br label %loop
loop:
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
%min.idx = phi i64 [ 0, %entry ], [ %min.idx.next, %loop ]
%min.val = phi i64 [ 0, %entry ], [ %min.val.next, %loop ]
%gep = getelementptr i64, ptr %src, i64 %iv
%l = load i64, ptr %gep
%cmp = icmp ugt i64 %min.val, %l
%min.val.next = tail call i64 @llvm.umin.i64(i64 %min.val, i64 %l)
%min.idx.next = select i1 %cmp, i64 %iv, i64 %min.idx
%iv.next = add nuw nsw i64 %iv, 1
%exitcond.not = icmp eq i64 %iv.next, 0
br i1 %exitcond.not, label %exit, label %loop
exit:
%res = phi i64 [ %min.idx.next, %loop ]
%res.umin = phi i64 [ %min.val.next, %loop ]
store i64 %res.umin, ptr %umin
ret i64 %res
}
define i64 @test_vectorize_select_umin_idx_min_ops_switched(ptr %src) { define i64 @test_vectorize_select_umin_idx_min_ops_switched(ptr %src) {
; CHECK-LABEL: @test_vectorize_select_umin_idx_min_ops_switched( ; CHECK-LABEL: @test_vectorize_select_umin_idx_min_ops_switched(
; CHECK-NOT: vector.body: ; CHECK-NOT: vector.body:
; ;
entry: entry:
br label %loop br label %loop
loop: loop:
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